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体验新版 GitCode,发现更多精彩内容 >>
提交
e22ba101
编写于
4月 25, 2011
作者:
W
Wolfgang Denk
浏览文件
操作
浏览文件
下载
差异文件
Merge branch 'master' of
git://git.denx.de/u-boot-ppc4xx
上级
c1fa1b7d
6cfa9eec
变更
6
显示空白变更内容
内联
并排
Showing
6 changed file
with
118 addition
and
24 deletion
+118
-24
board/gdsys/405ep/405ep.c
board/gdsys/405ep/405ep.c
+8
-1
board/gdsys/405ep/dlvision-10g.c
board/gdsys/405ep/dlvision-10g.c
+33
-8
board/gdsys/common/osd.c
board/gdsys/common/osd.c
+54
-3
boards.cfg
boards.cfg
+5
-5
include/configs/dlvision-10g.h
include/configs/dlvision-10g.h
+10
-2
include/gdsys_fpga.h
include/gdsys_fpga.h
+8
-5
未找到文件。
board/gdsys/405ep/405ep.c
浏览文件 @
e22ba101
...
@@ -110,6 +110,11 @@ int board_early_init_f(void)
...
@@ -110,6 +110,11 @@ int board_early_init_f(void)
for
(
k
=
0
;
k
<
CONFIG_SYS_FPGA_COUNT
;
++
k
)
{
for
(
k
=
0
;
k
<
CONFIG_SYS_FPGA_COUNT
;
++
k
)
{
ihs_fpga_t
*
fpga
=
(
ihs_fpga_t
*
)
CONFIG_SYS_FPGA_BASE
(
k
);
ihs_fpga_t
*
fpga
=
(
ihs_fpga_t
*
)
CONFIG_SYS_FPGA_BASE
(
k
);
#ifdef CONFIG_SYS_FPGA_NO_RFL_HI
u16
*
reflection_target
=
&
fpga
->
reflection_low
;
#else
u16
*
reflection_target
=
&
fpga
->
reflection_high
;
#endif
/*
/*
* wait for fpga out of reset
* wait for fpga out of reset
*/
*/
...
@@ -117,9 +122,11 @@ int board_early_init_f(void)
...
@@ -117,9 +122,11 @@ int board_early_init_f(void)
while
(
1
)
{
while
(
1
)
{
out_le16
(
&
fpga
->
reflection_low
,
out_le16
(
&
fpga
->
reflection_low
,
REFLECTION_TESTPATTERN
);
REFLECTION_TESTPATTERN
);
if
(
in_le16
(
&
fpga
->
reflection_high
)
==
if
(
in_le16
(
reflection_target
)
==
REFLECTION_TESTPATTERN_INV
)
REFLECTION_TESTPATTERN_INV
)
break
;
break
;
udelay
(
100000
);
udelay
(
100000
);
if
(
ctr
++
>
5
)
{
if
(
ctr
++
>
5
)
{
gd
->
fpga_state
[
k
]
|=
gd
->
fpga_state
[
k
]
|=
...
...
board/gdsys/405ep/dlvision-10g.c
浏览文件 @
e22ba101
...
@@ -31,6 +31,11 @@
...
@@ -31,6 +31,11 @@
#include "../common/osd.h"
#include "../common/osd.h"
#define LATCH2_BASE (CONFIG_SYS_LATCH_BASE + 0x200)
#define LATCH2_MC2_PRESENT_N 0x0080
#define LATCH3_BASE (CONFIG_SYS_LATCH_BASE + 0x300)
enum
{
enum
{
UNITTYPE_VIDEO_USER
=
0
,
UNITTYPE_VIDEO_USER
=
0
,
UNITTYPE_MAIN_USER
=
1
,
UNITTYPE_MAIN_USER
=
1
,
...
@@ -60,6 +65,20 @@ enum {
...
@@ -60,6 +65,20 @@ enum {
RAM_DDR2_64
=
2
,
RAM_DDR2_64
=
2
,
};
};
static
unsigned
int
get_hwver
(
void
)
{
u16
latch3
=
in_le16
((
void
*
)
LATCH3_BASE
);
return
latch3
&
0x0003
;
}
static
unsigned
int
get_mc2_present
(
void
)
{
u16
latch2
=
in_le16
((
void
*
)
LATCH2_BASE
);
return
!
(
latch2
&
LATCH2_MC2_PRESENT_N
);
}
static
void
print_fpga_info
(
unsigned
dev
)
static
void
print_fpga_info
(
unsigned
dev
)
{
{
ihs_fpga_t
*
fpga
=
(
ihs_fpga_t
*
)
CONFIG_SYS_FPGA_BASE
(
dev
);
ihs_fpga_t
*
fpga
=
(
ihs_fpga_t
*
)
CONFIG_SYS_FPGA_BASE
(
dev
);
...
@@ -206,7 +225,6 @@ static void print_fpga_info(unsigned dev)
...
@@ -206,7 +225,6 @@ static void print_fpga_info(unsigned dev)
*/
*/
int
checkboard
(
void
)
int
checkboard
(
void
)
{
{
unsigned
k
;
char
*
s
=
getenv
(
"serial#"
);
char
*
s
=
getenv
(
"serial#"
);
printf
(
"Board: "
);
printf
(
"Board: "
);
...
@@ -220,20 +238,27 @@ int checkboard(void)
...
@@ -220,20 +238,27 @@ int checkboard(void)
puts
(
"
\n
"
);
puts
(
"
\n
"
);
for
(
k
=
0
;
k
<
CONFIG_SYS_FPGA_COUNT
;
++
k
)
print_fpga_info
(
0
);
print_fpga_info
(
k
);
if
(
get_mc2_present
())
print_fpga_info
(
1
);
return
0
;
return
0
;
}
}
int
last_stage_init
(
void
)
int
last_stage_init
(
void
)
{
{
unsigned
k
;
ihs_fpga_t
*
fpga
=
(
ihs_fpga_t
*
)
CONFIG_SYS_FPGA_BASE
(
0
);
u16
versions
=
in_le16
(
&
fpga
->
versions
);
if
(((
versions
>>
4
)
&
0x000f
)
!=
UNITTYPE_MAIN_USER
)
return
0
;
if
(
!
get_fpga_state
(
0
)
||
(
get_hwver
()
==
HWVER_101
))
osd_probe
(
0
);
for
(
k
=
0
;
k
<
CONFIG_SYS_OSD_SCREENS
;
++
k
)
if
(
get_mc2_present
()
&&
if
(
!
get_fpga_state
(
k
)
(
!
get_fpga_state
(
1
)
||
(
get_hwver
()
==
HWVER_101
)))
||
(
get_fpga_state
(
k
)
==
FPGA_STATE_DONE_FAILED
))
osd_probe
(
1
);
osd_probe
(
k
);
return
0
;
return
0
;
}
}
board/gdsys/common/osd.c
浏览文件 @
e22ba101
...
@@ -30,7 +30,12 @@
...
@@ -30,7 +30,12 @@
#define CH7301_I2C_ADDR 0x75
#define CH7301_I2C_ADDR 0x75
#define ICS8N3QV01_I2C_ADDR 0x6E
#define ICS8N3QV01_I2C_ADDR 0x6E
#define ICS8N3QV01_FREF 114285
#define ICS8N3QV01_FREF 114285000
#define ICS8N3QV01_FREF_LL 114285000LL
#define ICS8N3QV01_F_DEFAULT_0 156250000LL
#define ICS8N3QV01_F_DEFAULT_1 125000000LL
#define ICS8N3QV01_F_DEFAULT_2 100000000LL
#define ICS8N3QV01_F_DEFAULT_3 25175000LL
#define SIL1178_MASTER_I2C_ADDRESS 0x38
#define SIL1178_MASTER_I2C_ADDRESS 0x38
#define SIL1178_SLAVE_I2C_ADDRESS 0x39
#define SIL1178_SLAVE_I2C_ADDRESS 0x39
...
@@ -150,6 +155,41 @@ static void mpc92469ac_set(unsigned screen, unsigned int fout)
...
@@ -150,6 +155,41 @@ static void mpc92469ac_set(unsigned screen, unsigned int fout)
#endif
#endif
#ifdef CONFIG_SYS_ICS8N3QV01
#ifdef CONFIG_SYS_ICS8N3QV01
static
unsigned
int
ics8n3qv01_get_fout_calc
(
unsigned
screen
,
unsigned
index
)
{
unsigned
long
long
n
;
unsigned
long
long
mint
;
unsigned
long
long
mfrac
;
u8
reg_a
,
reg_b
,
reg_c
,
reg_d
,
reg_f
;
unsigned
long
long
fout_calc
;
if
(
index
>
3
)
return
0
;
reg_a
=
fpga_iic_read
(
screen
,
ICS8N3QV01_I2C_ADDR
,
0
+
index
);
reg_b
=
fpga_iic_read
(
screen
,
ICS8N3QV01_I2C_ADDR
,
4
+
index
);
reg_c
=
fpga_iic_read
(
screen
,
ICS8N3QV01_I2C_ADDR
,
8
+
index
);
reg_d
=
fpga_iic_read
(
screen
,
ICS8N3QV01_I2C_ADDR
,
12
+
index
);
reg_f
=
fpga_iic_read
(
screen
,
ICS8N3QV01_I2C_ADDR
,
20
+
index
);
mint
=
((
reg_a
>>
1
)
&
0x1f
)
|
(
reg_f
&
0x20
);
mfrac
=
((
reg_a
&
0x01
)
<<
17
)
|
(
reg_b
<<
9
)
|
(
reg_c
<<
1
)
|
(
reg_d
>>
7
);
n
=
reg_d
&
0x7f
;
fout_calc
=
(
mint
*
ICS8N3QV01_FREF_LL
+
mfrac
*
ICS8N3QV01_FREF_LL
/
262144LL
+
ICS8N3QV01_FREF_LL
/
524288LL
+
n
/
2
)
/
n
*
1000000
/
(
1000000
-
100
);
return
fout_calc
;
}
static
void
ics8n3qv01_calc_parameters
(
unsigned
int
fout
,
static
void
ics8n3qv01_calc_parameters
(
unsigned
int
fout
,
unsigned
int
*
_mint
,
unsigned
int
*
_mfrac
,
unsigned
int
*
_mint
,
unsigned
int
*
_mfrac
,
unsigned
int
*
_n
)
unsigned
int
*
_n
)
...
@@ -160,7 +200,7 @@ static void ics8n3qv01_calc_parameters(unsigned int fout,
...
@@ -160,7 +200,7 @@ static void ics8n3qv01_calc_parameters(unsigned int fout,
unsigned
int
mint
;
unsigned
int
mint
;
unsigned
long
long
mfrac
;
unsigned
long
long
mfrac
;
n
=
2550000000U
/
fout
;
n
=
(
2215000000U
+
fout
/
2
)
/
fout
;
if
((
n
&
1
)
&&
(
n
>
5
))
if
((
n
&
1
)
&&
(
n
>
5
))
n
-=
1
;
n
-=
1
;
...
@@ -184,9 +224,18 @@ static void ics8n3qv01_set(unsigned screen, unsigned int fout)
...
@@ -184,9 +224,18 @@ static void ics8n3qv01_set(unsigned screen, unsigned int fout)
unsigned
int
n
;
unsigned
int
n
;
unsigned
int
mint
;
unsigned
int
mint
;
unsigned
int
mfrac
;
unsigned
int
mfrac
;
unsigned
int
fout_calc
;
unsigned
long
long
fout_prog
;
long
long
off_ppm
;
u8
reg0
,
reg4
,
reg8
,
reg12
,
reg18
,
reg20
;
u8
reg0
,
reg4
,
reg8
,
reg12
,
reg18
,
reg20
;
ics8n3qv01_calc_parameters
(
fout
,
&
mint
,
&
mfrac
,
&
n
);
fout_calc
=
ics8n3qv01_get_fout_calc
(
screen
,
1
);
off_ppm
=
(
fout_calc
-
ICS8N3QV01_F_DEFAULT_1
)
*
1000000
/
ICS8N3QV01_F_DEFAULT_1
;
printf
(
" PLL is off by %lld ppm
\n
"
,
off_ppm
);
fout_prog
=
(
unsigned
long
long
)
fout
*
(
unsigned
long
long
)
fout_calc
/
ICS8N3QV01_F_DEFAULT_1
;
ics8n3qv01_calc_parameters
(
fout_prog
,
&
mint
,
&
mfrac
,
&
n
);
reg0
=
fpga_iic_read
(
screen
,
ICS8N3QV01_I2C_ADDR
,
0
)
&
0xc0
;
reg0
=
fpga_iic_read
(
screen
,
ICS8N3QV01_I2C_ADDR
,
0
)
&
0xc0
;
reg0
|=
(
mint
&
0x1f
)
<<
1
;
reg0
|=
(
mint
&
0x1f
)
<<
1
;
...
@@ -327,6 +376,8 @@ int osd_probe(unsigned screen)
...
@@ -327,6 +376,8 @@ int osd_probe(unsigned screen)
out_le16
(
&
osd
->
control
,
0x0049
);
out_le16
(
&
osd
->
control
,
0x0049
);
out_le16
(
&
osd
->
xy_size
,
((
32
-
1
)
<<
8
)
|
(
16
-
1
));
out_le16
(
&
osd
->
xy_size
,
((
32
-
1
)
<<
8
)
|
(
16
-
1
));
out_le16
(
&
osd
->
x_pos
,
0x007f
);
out_le16
(
&
osd
->
y_pos
,
0x005f
);
return
0
;
return
0
;
}
}
...
...
boards.cfg
浏览文件 @
e22ba101
...
@@ -718,9 +718,9 @@ yellowstone powerpc ppc4xx yosemite amcc
...
@@ -718,9 +718,9 @@ yellowstone powerpc ppc4xx yosemite amcc
yosemite powerpc ppc4xx yosemite amcc - yosemite:YOSEMITE
yosemite powerpc ppc4xx yosemite amcc - yosemite:YOSEMITE
yucca powerpc ppc4xx - amcc
yucca powerpc ppc4xx - amcc
AP1000 powerpc ppc4xx ap1000 amirix
AP1000 powerpc ppc4xx ap1000 amirix
fx12mm powerpc ppc4xx fx12mm avnet - fx12mm:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x0
3FFFFFC
,INIT_TLB=board/xilinx/ppc405-generic/init.o
fx12mm powerpc ppc4xx fx12mm avnet - fx12mm:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x0
4100000
,INIT_TLB=board/xilinx/ppc405-generic/init.o
fx12mm_flash powerpc ppc4xx fx12mm avnet - fx12mm:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc405-generic/init.o
fx12mm_flash powerpc ppc4xx fx12mm avnet - fx12mm:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc405-generic/init.o
v5fx30teval powerpc ppc4xx v5fx30teval avnet - v5fx30teval:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x0
3FFFFFC
,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o
v5fx30teval powerpc ppc4xx v5fx30teval avnet - v5fx30teval:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x0
4100000
,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o
v5fx30teval_flash powerpc ppc4xx v5fx30teval avnet - v5fx30teval:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc440-generic/init.o
v5fx30teval_flash powerpc ppc4xx v5fx30teval avnet - v5fx30teval:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc440-generic/init.o
CRAYL1 powerpc ppc4xx L1 cray
CRAYL1 powerpc ppc4xx L1 cray
CATcenter powerpc ppc4xx PPChameleonEVB dave - CATcenter:PPCHAMELEON_MODULE_MODEL=1
CATcenter powerpc ppc4xx PPChameleonEVB dave - CATcenter:PPCHAMELEON_MODULE_MODEL=1
...
@@ -780,11 +780,11 @@ p3p440 powerpc ppc4xx - prodriv
...
@@ -780,11 +780,11 @@ p3p440 powerpc ppc4xx - prodriv
KAREF powerpc ppc4xx karef sandburst
KAREF powerpc ppc4xx karef sandburst
METROBOX powerpc ppc4xx metrobox sandburst
METROBOX powerpc ppc4xx metrobox sandburst
xpedite1000 powerpc ppc4xx - xes
xpedite1000 powerpc ppc4xx - xes
ml507 powerpc ppc4xx ml507 xilinx - ml507:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x0
3FFFFFC
,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o
ml507 powerpc ppc4xx ml507 xilinx - ml507:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x0
4100000
,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o
ml507_flash powerpc ppc4xx ml507 xilinx - ml507:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc440-generic/init.o
ml507_flash powerpc ppc4xx ml507 xilinx - ml507:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc440-generic/init.o
xilinx-ppc405-generic powerpc ppc4xx ppc405-generic xilinx - xilinx-ppc405-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x0
3FFFFFC
xilinx-ppc405-generic powerpc ppc4xx ppc405-generic xilinx - xilinx-ppc405-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x0
4100000
xilinx-ppc405-generic_flash powerpc ppc4xx ppc405-generic xilinx - xilinx-ppc405-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC
xilinx-ppc405-generic_flash powerpc ppc4xx ppc405-generic xilinx - xilinx-ppc405-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC
xilinx-ppc440-generic powerpc ppc4xx ppc440-generic xilinx - xilinx-ppc440-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x0
3FFFFFC
,BOOT_FROM_XMD=1
xilinx-ppc440-generic powerpc ppc4xx ppc440-generic xilinx - xilinx-ppc440-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x0
4100000
,BOOT_FROM_XMD=1
xilinx-ppc440-generic_flash powerpc ppc4xx ppc440-generic xilinx - xilinx-ppc440-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC
xilinx-ppc440-generic_flash powerpc ppc4xx ppc440-generic xilinx - xilinx-ppc440-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC
rsk7203 sh sh2 rsk7203 renesas -
rsk7203 sh sh2 rsk7203 renesas -
mpr2 sh sh3 mpr2 - -
mpr2 sh sh3 mpr2 - -
...
...
include/configs/dlvision-10g.h
浏览文件 @
e22ba101
...
@@ -42,6 +42,10 @@
...
@@ -42,6 +42,10 @@
#define CONFIG_SYS_CLK_FREQ 33333333
/* external frequency to pll */
#define CONFIG_SYS_CLK_FREQ 33333333
/* external frequency to pll */
#undef CONFIG_ZERO_BOOTDELAY_CHECK
/* ignore keypress on bootdelay==0 */
#define CONFIG_AUTOBOOT_KEYED
/* use key strings to stop autoboot */
#define CONFIG_AUTOBOOT_STOP_STR " "
/*
/*
* Configure PLL
* Configure PLL
*/
*/
...
@@ -111,9 +115,10 @@
...
@@ -111,9 +115,10 @@
/* Temp sensor/hwmon/dtt */
/* Temp sensor/hwmon/dtt */
#define CONFIG_DTT_LM63 1
/* National LM63 */
#define CONFIG_DTT_LM63 1
/* National LM63 */
#define CONFIG_DTT_SENSORS { 0 }
/* Sensor addresses */
#define CONFIG_DTT_SENSORS { 0
x4c, 0x4e
}
/* Sensor addresses */
#define CONFIG_DTT_PWM_LOOKUPTABLE \
#define CONFIG_DTT_PWM_LOOKUPTABLE \
{ { 40, 10 }, { 50, 20 }, { 60, 40 } }
{ { 40, 10 }, { 43, 13 }, { 46, 16 }, \
{ 50, 20 }, { 53, 27 }, { 56, 34 }, { 60, 40 } }
#define CONFIG_DTT_TACH_LIMIT 0xa10
#define CONFIG_DTT_TACH_LIMIT 0xa10
/* EBC peripherals */
/* EBC peripherals */
...
@@ -136,6 +141,8 @@
...
@@ -136,6 +141,8 @@
#define CONFIG_SYS_LATCH1_RESET 0xffcf
#define CONFIG_SYS_LATCH1_RESET 0xffcf
#define CONFIG_SYS_LATCH1_BOOT 0xffff
#define CONFIG_SYS_LATCH1_BOOT 0xffff
#define CONFIG_SYS_FPGA_NO_RFL_HI
/*
/*
* FLASH organization
* FLASH organization
*/
*/
...
@@ -310,6 +317,7 @@
...
@@ -310,6 +317,7 @@
* OSD Setup
* OSD Setup
*/
*/
#define CONFIG_SYS_ICS8N3QV01
#define CONFIG_SYS_ICS8N3QV01
#define CONFIG_SYS_MPC92469AC
#define CONFIG_SYS_SIL1178
#define CONFIG_SYS_SIL1178
#define CONFIG_SYS_OSD_SCREENS CONFIG_SYS_FPGA_COUNT
#define CONFIG_SYS_OSD_SCREENS CONFIG_SYS_FPGA_COUNT
...
...
include/gdsys_fpga.h
浏览文件 @
e22ba101
...
@@ -50,6 +50,9 @@ typedef struct ihs_osd {
...
@@ -50,6 +50,9 @@ typedef struct ihs_osd {
u16
features
;
u16
features
;
u16
control
;
u16
control
;
u16
xy_size
;
u16
xy_size
;
u16
xy_scale
;
u16
x_pos
;
u16
y_pos
;
}
ihs_osd_t
;
}
ihs_osd_t
;
#ifdef CONFIG_IO
#ifdef CONFIG_IO
...
@@ -79,7 +82,7 @@ typedef struct ihs_fpga {
...
@@ -79,7 +82,7 @@ typedef struct ihs_fpga {
u16
reserved_2
[
93
];
/* 0x0044 */
u16
reserved_2
[
93
];
/* 0x0044 */
u16
reflection_high
;
/* 0x00fe */
u16
reflection_high
;
/* 0x00fe */
ihs_osd_t
osd
;
/* 0x0100 */
ihs_osd_t
osd
;
/* 0x0100 */
u16
reserved_3
[
8
92
];
/* 0x0108
*/
u16
reserved_3
[
8
8
];
/* 0x010e
*/
u16
videomem
;
/* 0x0800 */
u16
videomem
;
/* 0x0800 */
}
ihs_fpga_t
;
}
ihs_fpga_t
;
#endif
#endif
...
@@ -94,13 +97,13 @@ typedef struct ihs_fpga {
...
@@ -94,13 +97,13 @@ typedef struct ihs_fpga {
u16
extended_interrupt
;
/* 0x001c */
u16
extended_interrupt
;
/* 0x001c */
u16
reserved_1
[
9
];
/* 0x001e */
u16
reserved_1
[
9
];
/* 0x001e */
ihs_i2c_t
i2c
;
/* 0x0030 */
ihs_i2c_t
i2c
;
/* 0x0030 */
u16
reserved_2
[
35
];
/* 0x0038 */
u16
reserved_2
[
16
];
/* 0x0038 */
u16
reflection_high
;
/* 0x007e
*/
u16
mpc3w_control
;
/* 0x0058
*/
u16
reserved_3
[
15
];
/* 0x0080
*/
u16
reserved_3
[
34
];
/* 0x005a
*/
u16
videocontrol
;
/* 0x009e */
u16
videocontrol
;
/* 0x009e */
u16
reserved_4
[
176
];
/* 0x00a0 */
u16
reserved_4
[
176
];
/* 0x00a0 */
ihs_osd_t
osd
;
/* 0x0200 */
ihs_osd_t
osd
;
/* 0x0200 */
u16
reserved_5
[
76
4
];
/* 0x0208
*/
u16
reserved_5
[
76
1
];
/* 0x020e
*/
u16
videomem
;
/* 0x0800 */
u16
videomem
;
/* 0x0800 */
}
ihs_fpga_t
;
}
ihs_fpga_t
;
#endif
#endif
...
...
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