mmc: zynq: Determine base clock frequency via clock framework
The zynq_sdhci controller driver use CONFIG_ZYNQ_SDHCI_MAX_FREQ as base clock frequency but this clock is not fixed and depends on the hardware configuration. Additionally the value of CONFIG_ZYNQ_SDHCI_MAX_FREQ doesn't match the real base clock frequency of SDIO_FREQ. Use the clock framework to determine the frequency at run time. Signed-off-by: NStefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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