imx: dts: imx8dx: add I2C IPG clock for bus 0 and 2

IPG clock description is missing for I2C0 and I2C2 busses,
add it. Otherwise we see -ENODATA error when trying to get
I2C clock for these busses.
Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

arch/arm/dts/fsl-imx8dx.dtsi

@@ -268,8 +268,9 @@
 		reg = <0x0 0x5a800000 0x0 0x4000>;
 		interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-parent = <&gic>;
-		clocks = <&clk IMX8QXP_I2C0_CLK>;
-		clock-names = "per";
+		clocks = <&clk IMX8QXP_I2C0_CLK>,
+			<&clk IMX8QXP_I2C0_IPG_CLK>;
+		clock-names = "per", "ipg";
 		assigned-clocks = <&clk IMX8QXP_I2C0_CLK>;
 		assigned-clock-rates = <24000000>;
 		power-domains = <&pd_dma_lpi2c0>;
@@ -299,8 +300,9 @@
 		reg = <0x0 0x5a820000 0x0 0x4000>;
 		interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-parent = <&gic>;
-		clocks = <&clk IMX8QXP_I2C2_CLK>;
-		clock-names = "per";
+		clocks = <&clk IMX8QXP_I2C2_CLK>,
+			<&clk IMX8QXP_I2C2_IPG_CLK>;
+		clock-names = "per", "ipg";
 		assigned-clocks = <&clk IMX8QXP_I2C2_CLK>;
 		assigned-clock-rates = <24000000>;
 		power-domains = <&pd_dma_lpi2c2>;