提交 8145c1c2 编写于 作者: M Marek Vasut

ARM: socfpga: Enable DM reset framework on A10

Enable the DM reset framework and DM reset driver on Arria10 both
in U-Boot and in SPL. This lets U-Boot parse reset control from DT.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
上级 c2950804
...@@ -11,6 +11,8 @@ config TARGET_SOCFPGA_ARRIA10 ...@@ -11,6 +11,8 @@ config TARGET_SOCFPGA_ARRIA10
bool bool
select ALTERA_SDRAM select ALTERA_SDRAM
select SPL_BOARD_INIT if SPL select SPL_BOARD_INIT if SPL
select DM_RESET
select SPL_DM_RESET if SPL
config TARGET_SOCFPGA_CYCLONE5 config TARGET_SOCFPGA_CYCLONE5
bool bool
......
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