diff --git a/arch/mips/dts/mrvl,cn73xx.dtsi b/arch/mips/dts/mrvl,cn73xx.dtsi
index 83e5cde044a7dc85d3e2625ca38188fc3040b4c8..2a17f7a6a63ea7f08205caa17bae78b6107517ff 100644
--- a/arch/mips/dts/mrvl,cn73xx.dtsi
+++ b/arch/mips/dts/mrvl,cn73xx.dtsi
@@ -97,6 +97,7 @@
 		uart0: serial@1180000000800 {
 			compatible = "cavium,octeon-3860-uart","ns16550";
 			reg = <0x11800 0x00000800 0x0 0x400>;
+			clocks = <&clk OCTEON_CLK_IO>;
 			clock-frequency = <0>;
 			current-speed = <115200>;
 			reg-shift = <3>;
@@ -106,6 +107,7 @@
 		uart1: serial@1180000000c00 {
 			compatible = "cavium,octeon-3860-uart","ns16550";
 			reg = <0x11800 0x00000c00 0x0 0x400>;
+			clocks = <&clk OCTEON_CLK_IO>;
 			clock-frequency = <0>;
 			current-speed = <115200>;
 			reg-shift = <3>;
diff --git a/arch/mips/dts/mrvl,octeon-ebb7304.dts b/arch/mips/dts/mrvl,octeon-ebb7304.dts
index 1bb34e1329f1c12437d20ea5cc613d9ec4477b0b..b95c18d344823a463b8ed00cca8854f4734c37b7 100644
--- a/arch/mips/dts/mrvl,octeon-ebb7304.dts
+++ b/arch/mips/dts/mrvl,octeon-ebb7304.dts
@@ -112,10 +112,6 @@
 	};
 };
 
-&uart0 {
-	clock-frequency = <1200000000>;
-};
-
 &i2c0 {
 	u-boot,dm-pre-reloc;	/* Needed early for DDR SPD EEPROM */
 	clock-frequency = <100000>;