diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index 51a70e057148ff94bc06187e15007b11b85ad82a..7b05b1749ae2d5fbecbd1fe3c9e7819db22a22f0 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig @@ -24,7 +24,7 @@ config TARGET_EA20 config TARGET_OMAPL138_LCDK bool "OMAPL138 LCDK" - select SOC_DA8XX + select SOC_DA850 select SUPPORT_SPL config TARGET_CALIMAIN @@ -63,6 +63,89 @@ config SOC_DA8XX config MACH_DAVINCI_DA850_EVM bool +if SYS_DA850_PLL_INIT +comment "DA850 PLL Initialization Parameters" + +config SYS_DV_CLKMODE + int "PLLCTL Clock Mode" + default 0 if SOC_DA850 + help + Set PLLCTL Clock Mode bit as External Clock or On Chip oscillator + +config SYS_DA850_PLL0_POSTDIV + int "PLLC0 PLL Post-Divider" + default 1 if SOC_DA850 + help + Value written to PLLC0 PLL Post-Divider Control Register + +config SYS_DA850_PLL0_PLLDIV1 + hex "PLLC0 Divider 1" + default 0x8000 if SOC_DA850 + help + Value written to PLLC0 Divider 1 register + +config SYS_DA850_PLL0_PLLDIV2 + hex "PLLC0 Divider 2" + default 0x8001 if SOC_DA850 + help + Value written to PLLC0 Divider 2 register + +config SYS_DA850_PLL0_PLLDIV3 + hex "PLLC0 Divider 3" + default 0x8002 if SOC_DA850 + help + Value written to PLLC0 Divider 3 register + +config SYS_DA850_PLL0_PLLDIV4 + hex "PLLC0 Divider 4" + default 0x8003 if SOC_DA850 + help + Value written to PLLC0 Divider 4 register + +config SYS_DA850_PLL0_PLLDIV5 + hex "PLLC0 Divider 5" + default 0x8002 if SOC_DA850 + help + Value written to PLLC0 Divider 5 register + +config SYS_DA850_PLL0_PLLDIV6 + hex "PLLC0 Divider 6" + default 0x8000 if SOC_DA850 + help + Value written to PLLC0 Divider 6 register + +config SYS_DA850_PLL0_PLLDIV7 + hex "PLLC0 Divider 7" + default 0x8005 if SOC_DA850 + help + Value written to PLLC0 Divider 7 register + +config SYS_DA850_PLL1_POSTDIV + hex "PLLC1 PLL Post-Divider" + default 1 if SOC_DA850 + help + Value written to PLLC1 PLL Post-Divider Control Register + +config SYS_DA850_PLL1_PLLDIV1 + hex "PLLC1 Divider 2" + default 0x8000 if SOC_DA850 + help + Value written to PLLC1 Divider 1 register + +config SYS_DA850_PLL1_PLLDIV2 + hex "PLLC1 Divider 2" + default 0x8001 if SOC_DA850 + help + Value written to PLLC1 Divider 2 register + +config SYS_DA850_PLL1_PLLDIV3 + hex "PLLC1 Divider 3" + default 0x8002 if SOC_DA850 + help + Value written to PLLC1 Divider 3 register + +endif + source "board/Barix/ipam390/Kconfig" source "board/davinci/da8xxevm/Kconfig" source "board/davinci/ea20/Kconfig" diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index 944be2b56eb8e97c0fdfce0c91c0e2a06a5dfcba..a693fbaad741c3810adcf84cea10a348eb19dd3e 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_DAVINCI=y CONFIG_TARGET_OMAPL138_LCDK=y +CONFIG_SYS_DA850_PLL1_PLLDIV3=0x8003 CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y diff --git a/include/configs/calimain.h b/include/configs/calimain.h index 7dfc1fa1ec52b9c6db7324ce68da194fad1c81bc..4c2f6ba2d50f5fc384dd4941a2f78fc9e3dec12e 100644 --- a/include/configs/calimain.h +++ b/include/configs/calimain.h @@ -39,20 +39,6 @@ /* * PLL configuration */ -#define CONFIG_SYS_DV_CLKMODE 0 -#define CONFIG_SYS_DA850_PLL0_POSTDIV 1 -#define CONFIG_SYS_DA850_PLL0_PLLDIV1 0x8000 -#define CONFIG_SYS_DA850_PLL0_PLLDIV2 0x8001 -#define CONFIG_SYS_DA850_PLL0_PLLDIV3 0x8002 -#define CONFIG_SYS_DA850_PLL0_PLLDIV4 0x8003 -#define CONFIG_SYS_DA850_PLL0_PLLDIV5 0x8002 -#define CONFIG_SYS_DA850_PLL0_PLLDIV6 CONFIG_SYS_DA850_PLL0_PLLDIV1 -#define CONFIG_SYS_DA850_PLL0_PLLDIV7 0x8005 - -#define CONFIG_SYS_DA850_PLL1_POSTDIV 1 -#define CONFIG_SYS_DA850_PLL1_PLLDIV1 0x8000 -#define CONFIG_SYS_DA850_PLL1_PLLDIV2 0x8001 -#define CONFIG_SYS_DA850_PLL1_PLLDIV3 0x8002 #define CONFIG_SYS_DA850_PLL0_PLLM \ ((calimain_get_osc_freq() == 25000000) ? 23 : 24) diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 2a6916b92ea1716d8a4c70c3e9c7f90eeb570417..4fbfc72bdbba75bfe663a36e09313676e23260c1 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -74,20 +74,6 @@ /* * PLL configuration */ -#define CONFIG_SYS_DV_CLKMODE 0 -#define CONFIG_SYS_DA850_PLL0_POSTDIV 1 -#define CONFIG_SYS_DA850_PLL0_PLLDIV1 0x8000 -#define CONFIG_SYS_DA850_PLL0_PLLDIV2 0x8001 -#define CONFIG_SYS_DA850_PLL0_PLLDIV3 0x8002 -#define CONFIG_SYS_DA850_PLL0_PLLDIV4 0x8003 -#define CONFIG_SYS_DA850_PLL0_PLLDIV5 0x8002 -#define CONFIG_SYS_DA850_PLL0_PLLDIV6 CONFIG_SYS_DA850_PLL0_PLLDIV1 -#define CONFIG_SYS_DA850_PLL0_PLLDIV7 0x8005 - -#define CONFIG_SYS_DA850_PLL1_POSTDIV 1 -#define CONFIG_SYS_DA850_PLL1_PLLDIV1 0x8000 -#define CONFIG_SYS_DA850_PLL1_PLLDIV2 0x8001 -#define CONFIG_SYS_DA850_PLL1_PLLDIV3 0x8002 #define CONFIG_SYS_DA850_PLL0_PLLM 24 #define CONFIG_SYS_DA850_PLL1_PLLM 21 diff --git a/include/configs/ipam390.h b/include/configs/ipam390.h index 618bf72da39a2494e8555ee3156539218957653d..a6fa4585f3292c1f500635026e881ad26b13b018 100644 --- a/include/configs/ipam390.h +++ b/include/configs/ipam390.h @@ -56,20 +56,6 @@ /* * PLL configuration */ -#define CONFIG_SYS_DV_CLKMODE 0 -#define CONFIG_SYS_DA850_PLL0_POSTDIV 1 -#define CONFIG_SYS_DA850_PLL0_PLLDIV1 0x8000 -#define CONFIG_SYS_DA850_PLL0_PLLDIV2 0x8001 -#define CONFIG_SYS_DA850_PLL0_PLLDIV3 0x8002 -#define CONFIG_SYS_DA850_PLL0_PLLDIV4 0x8003 -#define CONFIG_SYS_DA850_PLL0_PLLDIV5 0x8002 -#define CONFIG_SYS_DA850_PLL0_PLLDIV6 CONFIG_SYS_DA850_PLL0_PLLDIV1 -#define CONFIG_SYS_DA850_PLL0_PLLDIV7 0x8005 - -#define CONFIG_SYS_DA850_PLL1_POSTDIV 1 -#define CONFIG_SYS_DA850_PLL1_PLLDIV1 0x8000 -#define CONFIG_SYS_DA850_PLL1_PLLDIV2 0x8001 -#define CONFIG_SYS_DA850_PLL1_PLLDIV3 0x8002 #define CONFIG_SYS_DA850_PLL0_PLLM 24 #define CONFIG_SYS_DA850_PLL1_PLLM 24 diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index 3439cbe090d415e1219ad607fe075682c548c866..b60498a5387538df88e63f673826b631ccbc3252 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -52,20 +52,6 @@ /* * PLL configuration */ -#define CONFIG_SYS_DV_CLKMODE 0 -#define CONFIG_SYS_DA850_PLL0_POSTDIV 1 -#define CONFIG_SYS_DA850_PLL0_PLLDIV1 0x8000 -#define CONFIG_SYS_DA850_PLL0_PLLDIV2 0x8001 -#define CONFIG_SYS_DA850_PLL0_PLLDIV3 0x8002 -#define CONFIG_SYS_DA850_PLL0_PLLDIV4 0x8003 -#define CONFIG_SYS_DA850_PLL0_PLLDIV5 0x8002 -#define CONFIG_SYS_DA850_PLL0_PLLDIV6 CONFIG_SYS_DA850_PLL0_PLLDIV1 -#define CONFIG_SYS_DA850_PLL0_PLLDIV7 0x8005 - -#define CONFIG_SYS_DA850_PLL1_POSTDIV 1 -#define CONFIG_SYS_DA850_PLL1_PLLDIV1 0x8000 -#define CONFIG_SYS_DA850_PLL1_PLLDIV2 0x8001 -#define CONFIG_SYS_DA850_PLL1_PLLDIV3 0x8002 #define CONFIG_SYS_DA850_PLL0_PLLM 24 #define CONFIG_SYS_DA850_PLL1_PLLM 21 diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 2cb99119a1ea3ba89bcf40ac682e0329b57019a9..c9b42a8c3ce9ef746fab1a7c0c13c876f0b7719d 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -58,20 +58,6 @@ /* * PLL configuration */ -#define CONFIG_SYS_DV_CLKMODE 0 -#define CONFIG_SYS_DA850_PLL0_POSTDIV 1 -#define CONFIG_SYS_DA850_PLL0_PLLDIV1 0x8000 -#define CONFIG_SYS_DA850_PLL0_PLLDIV2 0x8001 -#define CONFIG_SYS_DA850_PLL0_PLLDIV3 0x8002 -#define CONFIG_SYS_DA850_PLL0_PLLDIV4 0x8003 -#define CONFIG_SYS_DA850_PLL0_PLLDIV5 0x8002 -#define CONFIG_SYS_DA850_PLL0_PLLDIV6 CONFIG_SYS_DA850_PLL0_PLLDIV1 -#define CONFIG_SYS_DA850_PLL0_PLLDIV7 0x8005 - -#define CONFIG_SYS_DA850_PLL1_POSTDIV 1 -#define CONFIG_SYS_DA850_PLL1_PLLDIV1 0x8000 -#define CONFIG_SYS_DA850_PLL1_PLLDIV2 0x8001 -#define CONFIG_SYS_DA850_PLL1_PLLDIV3 0x8003 #define CONFIG_SYS_DA850_PLL0_PLLM 37 #define CONFIG_SYS_DA850_PLL1_PLLM 21 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 9ad3907c53bb2c07520082da04e912b442c45b6e..ec7300ae04665901c3e6911c4105d7b4106b4ac7 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -2438,21 +2438,9 @@ CONFIG_SYS_DA850_DDR2_SDBCR2 CONFIG_SYS_DA850_DDR2_SDRCR CONFIG_SYS_DA850_DDR2_SDTIMR CONFIG_SYS_DA850_DDR2_SDTIMR2 -CONFIG_SYS_DA850_PLL0_PLLDIV1 -CONFIG_SYS_DA850_PLL0_PLLDIV2 -CONFIG_SYS_DA850_PLL0_PLLDIV3 -CONFIG_SYS_DA850_PLL0_PLLDIV4 -CONFIG_SYS_DA850_PLL0_PLLDIV5 -CONFIG_SYS_DA850_PLL0_PLLDIV6 -CONFIG_SYS_DA850_PLL0_PLLDIV7 CONFIG_SYS_DA850_PLL0_PLLM -CONFIG_SYS_DA850_PLL0_POSTDIV CONFIG_SYS_DA850_PLL0_PREDIV -CONFIG_SYS_DA850_PLL1_PLLDIV1 -CONFIG_SYS_DA850_PLL1_PLLDIV2 -CONFIG_SYS_DA850_PLL1_PLLDIV3 CONFIG_SYS_DA850_PLL1_PLLM -CONFIG_SYS_DA850_PLL1_POSTDIV CONFIG_SYS_DA850_SYSCFG_SUSPSRC CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT CONFIG_SYS_DAVINCI_I2C_SLAVE @@ -2695,7 +2683,6 @@ CONFIG_SYS_DSPI_CTAR4 CONFIG_SYS_DSPI_CTAR5 CONFIG_SYS_DSPI_CTAR6 CONFIG_SYS_DSPI_CTAR7 -CONFIG_SYS_DV_CLKMODE CONFIG_SYS_DV_NOR_BOOT_CFG CONFIG_SYS_EBI_CFGR_VAL CONFIG_SYS_EBI_CSA_VAL