diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig index e4d52f6a915e7b0f0bd187f0951bd8c8b24d64b5..95fa7678d63925776f5a345162b44202eaeac20b 100644 --- a/configs/topic_miamilite_defconfig +++ b/configs/topic_miamilite_defconfig @@ -40,7 +40,6 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y -CONFIG_SF_DUAL_FLASH=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_DEBUG_UART_ZYNQ=y diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index f742838d7c1f1432628cef72fcb9e3cacbdff654..6d753c0326a1abced636ffcd3787f8eba4510c52 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -39,7 +39,6 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y -CONFIG_SF_DUAL_FLASH=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set # CONFIG_NETDEVICES is not set diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index 3ec435e7ffe783702e5ad02f7ca3df68bda588f3..911d1beed2e1fb0f59580e6f1b99caa7fc823e0a 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -54,7 +54,6 @@ CONFIG_SPL_DM_SEQ_ALIAS=y # CONFIG_MMC is not set CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y -CONFIG_SF_DUAL_FLASH=y CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/xilinx_zynqmp_zc1232_revA_defconfig b/configs/xilinx_zynqmp_zc1232_revA_defconfig index 9026f00649bbe536d678b221f9bc9f852a2ab931..1b0df0c7b9a3429f3982ef256e0cda076a6039ec 100644 --- a/configs/xilinx_zynqmp_zc1232_revA_defconfig +++ b/configs/xilinx_zynqmp_zc1232_revA_defconfig @@ -38,7 +38,6 @@ CONFIG_MISC=y # CONFIG_MMC is not set CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y -CONFIG_SF_DUAL_FLASH=y CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/xilinx_zynqmp_zc1254_revA_defconfig b/configs/xilinx_zynqmp_zc1254_revA_defconfig index 3eed06976053c912a9cbb8afb1c3ff4b4267c855..043ce80b59164e133d3662ee0de4657041ac95b4 100644 --- a/configs/xilinx_zynqmp_zc1254_revA_defconfig +++ b/configs/xilinx_zynqmp_zc1254_revA_defconfig @@ -38,7 +38,6 @@ CONFIG_MISC=y # CONFIG_MMC is not set CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y -CONFIG_SF_DUAL_FLASH=y CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/xilinx_zynqmp_zc1275_revA_defconfig b/configs/xilinx_zynqmp_zc1275_revA_defconfig index 8bd7c9c57842e56e22da1ae43b251db9c3ddbade..51ed37038d4049246429c2bc6b47b696413946df 100644 --- a/configs/xilinx_zynqmp_zc1275_revA_defconfig +++ b/configs/xilinx_zynqmp_zc1275_revA_defconfig @@ -38,7 +38,6 @@ CONFIG_MISC=y # CONFIG_MMC is not set CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y -CONFIG_SF_DUAL_FLASH=y CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/xilinx_zynqmp_zc1275_revB_defconfig b/configs/xilinx_zynqmp_zc1275_revB_defconfig index 9f023c2bd2bdf27dbc9e64c4f6cba267fe7b73da..04c73b7d017097ff1e5f51ac397735ebe6d7d19b 100644 --- a/configs/xilinx_zynqmp_zc1275_revB_defconfig +++ b/configs/xilinx_zynqmp_zc1275_revB_defconfig @@ -42,7 +42,6 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y -CONFIG_SF_DUAL_FLASH=y CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig index f2caac790a1a3d0731cc009902be6287e5d04809..dd6f50df4ee48801f38fbad584890a8d5979d1df 100644 --- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig @@ -62,7 +62,6 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y -CONFIG_SF_DUAL_FLASH=y CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig index 10e0fca65578419863ccddbdb18319f0c1c76a2e..e742406cb22d8d7c4b300f30ec9c7d5cacdab509 100644 --- a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig @@ -48,7 +48,6 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y -CONFIG_SF_DUAL_FLASH=y CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig b/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig index 30d3147a7a8bc909071eff08c9409e8e7bb40c96..d61ca4d37e457bfbc32edb806315a32c2cd3d5ba 100644 --- a/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig +++ b/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig @@ -75,7 +75,6 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y -CONFIG_SF_DUAL_FLASH=y CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/xilinx_zynqmp_zcu102_revA_defconfig b/configs/xilinx_zynqmp_zcu102_revA_defconfig index bada5e117317941e0c59384a7344f44fcf28c219..e4d656889287e4804af91d67be3598312186c017 100644 --- a/configs/xilinx_zynqmp_zcu102_revA_defconfig +++ b/configs/xilinx_zynqmp_zcu102_revA_defconfig @@ -73,7 +73,6 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y -CONFIG_SF_DUAL_FLASH=y CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/xilinx_zynqmp_zcu102_revB_defconfig b/configs/xilinx_zynqmp_zcu102_revB_defconfig index 3c4ac01b220c4f53b2e9d83fa47ad3b4404bc892..ded0c6f0edcd75946bab58060106711f1056e3af 100644 --- a/configs/xilinx_zynqmp_zcu102_revB_defconfig +++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig @@ -73,7 +73,6 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y -CONFIG_SF_DUAL_FLASH=y CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/xilinx_zynqmp_zcu104_revA_defconfig b/configs/xilinx_zynqmp_zcu104_revA_defconfig index 90fd431df3dd5e5bb1ce08d7fe44d16ed8d7043e..3025ace26116cce07011bcee13e777d3d4af8b96 100644 --- a/configs/xilinx_zynqmp_zcu104_revA_defconfig +++ b/configs/xilinx_zynqmp_zcu104_revA_defconfig @@ -58,7 +58,6 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y -CONFIG_SF_DUAL_FLASH=y CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/xilinx_zynqmp_zcu104_revC_defconfig b/configs/xilinx_zynqmp_zcu104_revC_defconfig index eb30e2398f2cb73d4b4f3f7c99205a5c1513732d..d1d39e2bc63b3a795c77802f297963c75cf2aca3 100644 --- a/configs/xilinx_zynqmp_zcu104_revC_defconfig +++ b/configs/xilinx_zynqmp_zcu104_revC_defconfig @@ -59,7 +59,6 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y -CONFIG_SF_DUAL_FLASH=y CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/xilinx_zynqmp_zcu106_revA_defconfig b/configs/xilinx_zynqmp_zcu106_revA_defconfig index 9e8eb5f483a2db0e94fc29570a9435c7832a1c3f..13f2e9da4d29e246174b536f52bc69a0ec11204d 100644 --- a/configs/xilinx_zynqmp_zcu106_revA_defconfig +++ b/configs/xilinx_zynqmp_zcu106_revA_defconfig @@ -69,7 +69,6 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y -CONFIG_SF_DUAL_FLASH=y CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/doc/SPI/README.dual-flash b/doc/SPI/README.dual-flash deleted file mode 100644 index 6c88d65dd49f86a8e1edcf30d4b5b4ccdc53d0d7..0000000000000000000000000000000000000000 --- a/doc/SPI/README.dual-flash +++ /dev/null @@ -1,92 +0,0 @@ -SPI/QSPI Dual flash connection modes: -===================================== - -This describes how SPI/QSPI flash memories are connected to a given -controller in a single chip select line. - -Current spi_flash framework supports, single flash memory connected -to a given controller with single chip select line, but there are some -hw logics(ex: xilinx zynq qspi) that describes two/dual memories are -connected with a single chip select line from a controller. - -"dual_flash" from include/spi.h describes these types of connection mode - -Possible connections: --------------------- -SF_SINGLE_FLASH: - - single spi flash memory connected with single chip select line. - - +------------+ CS +---------------+ - | |----------------------->| | - | Controller | I0[3:0] | Flash memory | - | SPI/QSPI |<======================>| (SPI/QSPI) | - | | CLK | | - | |----------------------->| | - +------------+ +---------------+ - -SF_DUAL_STACKED_FLASH: - - dual spi/qspi flash memories are connected with a single chipselect - line and these two memories are operating stacked fasion with shared buses. - - xilinx zynq qspi controller has implemented this feature [1] - - +------------+ CS +---------------+ - | |---------------------->| | - | | I0[3:0] | Upper Flash | - | | +=========>| memory | - | | | CLK | (SPI/QSPI) | - | | | +---->| | - | Controller | CS | | +---------------+ - | SPI/QSPI |------------|----|---->| | - | | I0[3:0] | | | Lower Flash | - | |<===========+====|====>| memory | - | | CLK | | (SPI/QSPI) | - | |-----------------+---->| | - +------------+ +---------------+ - - - two memory flash devices should has same hw part attributes (like size, - vendor..etc) - - Configurations: - on LQSPI_CFG register, Enable TWO_MEM[BIT:30] on LQSPI_CFG - Enable U_PAGE[BIT:28] if U_PAGE flag set - upper memory - Disable U_PAGE[BIT:28] if U_PAGE flag unset - lower memory - - Operation: - accessing memories serially like one after another. - by default, if U_PAGE is unset lower memory should accessible, - once user wants to access upper memory need to set U_PAGE. - -SPI_FLASH_CONN_DUALPARALLEL: - - dual spi/qspi flash memories are connected with a single chipselect - line and these two memories are operating parallel with separate buses. - - xilinx zynq qspi controller has implemented this feature [1] - - +-------------+ CS +---------------+ - | |---------------------->| | - | | I0[3:0] | Upper Flash | - | |<=====================>| memory | - | | CLK | (SPI/QSPI) | - | |---------------------->| | - | Controller | CS +---------------+ - | SPI/QSPI |---------------------->| | - | | I0[3:0] | Lower Flash | - | |<=====================>| memory | - | | CLK | (SPI/QSPI) | - | |---------------------->| | - +-------------+ +---------------+ - - - two memory flash devices should has same hw part attributes (like size, - vendor..etc) - - Configurations: - Need to enable SEP_BUS[BIT:29],TWO_MEM[BIT:30] on LQSPI_CFG register. - - Operation: - Even bits, i.e. bit 0, 2, 4 ., of a data word is located in the lower memory - and odd bits, i.e. bit 1, 3, 5, ., of a data word is located in the upper memory. - -Note: Technically there is only one CS line from the controller, but -zynq qspi controller has an internal hw logic to enable additional CS -when controller is configured for dual memories. - -[1] http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf - --- -Jagannadha Sutradharudu Teki -05-01-2014. diff --git a/include/configs/socfpga_stratix10_socdk.h b/include/configs/socfpga_stratix10_socdk.h index f9319a2234ff530060f98fc4a674226c08b41cb8..0e73239f568c86e0efe12af9e47abe3ac5ab5741 100644 --- a/include/configs/socfpga_stratix10_socdk.h +++ b/include/configs/socfpga_stratix10_socdk.h @@ -57,7 +57,6 @@ */ #ifdef CONFIG_CADENCE_QSPI /* Enable it if you want to use dual-stacked mode */ -#undef CONFIG_SF_DUAL_FLASH /*#define CONFIG_QSPI_RBF_ADDR 0x720000*/ /* Flash device info */