* Patch by Rune Torgersen, 17 Sep 2003:

  - Fixes for MPC8266 default config
  - Allow eth_loopback_test() on 8260 to use a subset of the FCC's

CHANGELOG

@@ -4,6 +4,7 @@ Changes for U-Boot 1.0.0:
 
 * Patch by Rune Torgersen, 17 Sep 2003:
   - Fixes for MPC8266 default config
+  - Allow eth_loopback_test() on 8260 to use a subset of the FCC's
 
 * Patches by Jon Diekema, 17 Sep 2003:
   - update README (SHOW_BOOT_PROGRESS values for cmd_nand.c and

board/mpc8266ads/mpc8266ads.c

@@ -427,7 +427,7 @@ long int initdram(int board_type)
     bsma = ((31 - width) - 14) - ((rows > cols) ? rows : cols);
     sda10 = sdam + 2;
 #else
-    sdam = cols - 6;
+    sdam = cols + banks - 8;
     bsma = ((31 - width) - 14) - ((rows > cols) ? rows : cols);
     sda10 = sdam;
 #endif
@@ -557,9 +557,18 @@ long int initdram(int board_type)
 	printf("SDRAM configuration read from SPD\n");
 	printf("\tSize per side = %dMB\n", sdram_size >> 20);
 	printf("\tOrganization: %d sides, %d banks, %d Columns, %d Rows, Data width = %d bits\n", chipselects, 1<<(banks), cols, rows, data_width);
-	printf("\tRefresh rate = %d, CAS latency = %d\n", psrt, caslatency);
+	printf("\tRefresh rate = %d, CAS latency = %d", psrt, caslatency);
+#if(CONFIG_PBI == 0)	/* bank-based interleaving */
+    printf(", Using Bank Based Interleave\n");
+#else
+    printf(", Using Page Based Interleave\n");
+#endif    
 	printf("\tTotal size: ");
 
+    /* this delay only needed for original 16MB DIMM... 
+     * Not needed for any other memory configuration */
+    if ((sdram_size * chipselects) == (16 *1024 *1024))
+        udelay (250000);
     return (sdram_size * chipselects);
 	/*return (16 * 1024 * 1024);*/
 }
@@ -575,3 +584,4 @@ void pci_init_board(void)
 	pci_mpc8250_init(&hose);
 }
 #endif
+

cpu/mpc8260/ether_fcc.c

@@ -650,6 +650,15 @@ eth_loopback_test (void)
 	/* 28.9 - (1-2): ioports have been set up already */
 
 #if defined(CONFIG_HYMOD)
+	/*
+	 * Attention: this is board-specific
+	 * 0, FCC1 
+	 * 1, FCC2 
+	 * 2, FCC3 
+         */
+#       define FCC_START_LOOP 0
+#       define FCC_END_LOOP   2
+
 	/*
 	 * Attention: this is board-specific
 	 * - FCC1 Rx-CLK is CLK10
@@ -665,13 +674,30 @@ eth_loopback_test (void)
 	immr->im_cpmux.cmx_fcr = CMXFCR_RF1CS_CLK10|CMXFCR_TF1CS_CLK11|\
 	    CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14|\
 	    CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16;
+#elif defined(CONFIG_SBC8260) || defined(CONFIG_SACSng)
+	/*
+	 * Attention: this is board-specific
+	 * 1, FCC2 
+         */
+#       define FCC_START_LOOP 1
+#       define FCC_END_LOOP   1
+
+	/*
+	 * Attention: this is board-specific
+	 * - FCC2 Rx-CLK is CLK13
+	 * - FCC2 Tx-CLK is CLK14
+	 */
+
+	/* 28.9 - (3): connect FCC's tx and rx clocks */
+	immr->im_cpmux.cmx_uar = 0;
+	immr->im_cpmux.cmx_fcr = CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14;
 #else
 #error "eth_loopback_test not supported on your board"
 #endif
 
 	puts ("Initialise FCC channels:");
 
-	for (c = 0; c < 3; c++) {
+	for (c = FCC_START_LOOP; c <= FCC_END_LOOP; c++) {
 		elbt_chan *ecp = &elbt_chans[c];
 		volatile fcc_t *fcp = &immr->im_fcc[c];
 		volatile fcc_enet_t *fpp;
@@ -853,7 +879,7 @@ eth_loopback_test (void)
 	do {
 		nclosed = 0;
 
-		for (c = 0; c < 3; c++) {
+		for (c = FCC_START_LOOP; c <= FCC_END_LOOP; c++) {
 			volatile fcc_t *fcp = &immr->im_fcc[c];
 			elbt_chan *ecp = &elbt_chans[c];
 			int i;
@@ -1082,7 +1108,7 @@ eth_loopback_test (void)
 			}
 		}
 
-	} while (nclosed < 3);
+	} while (nclosed < (FCC_END_LOOP - FCC_START_LOOP + 1));
 
 	runtime = get_timer (runtime);
 	if (runtime <= ELBT_CLSWAIT) {
@@ -1099,7 +1125,7 @@ eth_loopback_test (void)
 	 * now print stats
 	 */
 
-	for (c = 0; c < 3; c++) {
+	for (c = FCC_START_LOOP; c <= FCC_END_LOOP; c++) {
 		elbt_chan *ecp = &elbt_chans[c];
 		uint rxpps, txpps, nerr;
 
@@ -1131,17 +1157,17 @@ eth_loopback_test (void)
 	}
 
 	puts ("Receive Error Counts:\n");
-	for (c = 0; c < 3; c++)
+	for (c = FCC_START_LOOP; c <= FCC_END_LOOP; c++)
 		bases[c] = (uchar *)&elbt_chans[c].rxeacc;
 	print_desc (rxeacc_descs, rxeacc_ndesc, bases, 3);
 
 	puts ("\nTransmit Error Counts:\n");
-	for (c = 0; c < 3; c++)
+	for (c = FCC_START_LOOP; c <= FCC_END_LOOP; c++)
 		bases[c] = (uchar *)&elbt_chans[c].txeacc;
 	print_desc (txeacc_descs, txeacc_ndesc, bases, 3);
 
 	puts ("\nRMON(-like) Counters:\n");
-	for (c = 0; c < 3; c++)
+	for (c = FCC_START_LOOP; c <= FCC_END_LOOP; c++)
 		bases[c] = (uchar *)&immr->im_dprambase[elbt_chans[c].proff];
 	print_desc (epram_descs, epram_ndesc, bases, 3);
 }

include/configs/MPC8266ADS.h

@@ -508,7 +508,8 @@
 #define CFG_MPTPR		0x00001900
 #define CFG_PSRT		0x00000021
 
-#define CFG_RESET_ADDRESS	0x04400000
+/* This address must not exist */
+#define CFG_RESET_ADDRESS	0xFCFFFF00
 
 /* PCI Memory map (if different from default map */
 #define CFG_PCI_SLV_MEM_LOCAL	CFG_SDRAM_BASE		/* Local base */