diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h index fc39bb2c701ef42a00686f7ab316a7dc4656e062..220266e76f851c1c8f89ac285218954827ddd60e 100644 --- a/arch/riscv/include/asm/io.h +++ b/arch/riscv/include/asm/io.h @@ -7,8 +7,6 @@ #ifndef __ASM_RISCV_IO_H #define __ASM_RISCV_IO_H -#ifdef __KERNEL__ - #include #include #include @@ -17,33 +15,6 @@ static inline void sync(void) { } -#ifdef CONFIG_ARCH_MAP_SYSMEM -static inline void *map_sysmem(phys_addr_t paddr, unsigned long len) -{ - if (paddr < PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE) - paddr = paddr | 0x40000000; - return (void *)(uintptr_t)paddr; -} - -static inline void *unmap_sysmem(const void *vaddr) -{ - phys_addr_t paddr = (phys_addr_t)vaddr; - - paddr = paddr & ~0x40000000; - return (void *)(uintptr_t)paddr; -} - -static inline phys_addr_t map_to_sysmem(const void *ptr) -{ - return (phys_addr_t)(uintptr_t)ptr; -} -#endif - -/* - * Generic virtual read/write. Note that we don't support half-word - * read/writes. We define __arch_*[bl] here, and leave __arch_*w - * to the architecture specific code. - */ #define __arch_getb(a) (*(volatile unsigned char *)(a)) #define __arch_getw(a) (*(volatile unsigned short *)(a)) #define __arch_getl(a) (*(volatile unsigned int *)(a)) @@ -352,115 +323,6 @@ static inline void writesl(unsigned int *addr, const void *data, int longlen) #define insw_p(port, to, len) insw(port, to, len) #define insl_p(port, to, len) insl(port, to, len) -/* - * DMA-consistent mapping functions. These allocate/free a region of - * uncached, unwrite-buffered mapped memory space for use with DMA - * devices. This is the "generic" version. The PCI specific version - * is in pci.h - */ - -/* - * String version of IO memory access ops: - */ - -/* - * If this architecture has PCI memory IO, then define the read/write - * macros. These should only be used with the cookie passed from - * ioremap. - */ -#ifdef __mem_pci - -#define readb(c) ({ unsigned int __v = \ - __raw_readb(__mem_pci(c)); __v; }) -#define readw(c) ({ unsigned int __v = \ - le16_to_cpu(__raw_readw(__mem_pci(c))); __v; }) -#define readl(c) ({ unsigned int __v = \ - le32_to_cpu(__raw_readl(__mem_pci(c))); __v; }) - -#define writeb(v, c) __raw_writeb(v, __mem_pci(c)) -#define writew(v, c) __raw_writew(cpu_to_le16(v), __mem_pci(c)) -#define writel(v, c) __raw_writel(cpu_to_le32(v), __mem_pci(c)) - -#define memset_io(c, v, l) _memset_io(__mem_pci(c), (v), (l)) -#define memcpy_fromio(a, c, l) _memcpy_fromio((a), __mem_pci(c), (l)) -#define memcpy_toio(c, a, l) _memcpy_toio(__mem_pci(c), (a), (l)) - -#define eth_io_copy_and_sum(s, c, l, b) \ - eth_copy_and_sum((s), __mem_pci(c), (l), (b)) - -static inline int check_signature(ulong io_addr, const uchar *s, int len) -{ - int retval = 0; - - do { - if (readb(io_addr) != *s) - goto out; - io_addr++; - s++; - len--; - } while (len); - retval = 1; -out: - return retval; -} -#endif /* __mem_pci */ - -/* - * If this architecture has ISA IO, then define the isa_read/isa_write - * macros. - */ -#ifdef __mem_isa - -#define isa_readb(addr) __raw_readb(__mem_isa(addr)) -#define isa_readw(addr) __raw_readw(__mem_isa(addr)) -#define isa_readl(addr) __raw_readl(__mem_isa(addr)) -#define isa_writeb(val, addr) __raw_writeb(val, __mem_isa(addr)) -#define isa_writew(val, addr) __raw_writew(val, __mem_isa(addr)) -#define isa_writel(val, addr) __raw_writel(val, __mem_isa(addr)) -#define isa_memset_io(a, b, c) _memset_io(__mem_isa(a), (b), (c)) -#define isa_memcpy_fromio(a, b, c) _memcpy_fromio((a), __mem_isa(b), (c)) -#define isa_memcpy_toio(a, b, c) _memcpy_toio(__mem_isa((a)), (b), (c)) - -#define isa_eth_io_copy_and_sum(a, b, c, d) \ - eth_copy_and_sum((a), __mem_isa(b), (c), (d)) - -static inline int -isa_check_signature(ulong io_addr, const uchar *s, int len) -{ - int retval = 0; - - do { - if (isa_readb(io_addr) != *s) - goto out; - io_addr++; - s++; - len--; - } while (len); - retval = 1; -out: - return retval; -} - -#else /* __mem_isa */ - -#define isa_readb(addr) (__readwrite_bug("isa_readb"), 0) -#define isa_readw(addr) (__readwrite_bug("isa_readw"), 0) -#define isa_readl(addr) (__readwrite_bug("isa_readl"), 0) -#define isa_writeb(val, addr) __readwrite_bug("isa_writeb") -#define isa_writew(val, addr) __readwrite_bug("isa_writew") -#define isa_writel(val, addr) __readwrite_bug("isa_writel") -#define isa_memset_io(a, b, c) __readwrite_bug("isa_memset_io") -#define isa_memcpy_fromio(a, b, c) __readwrite_bug("isa_memcpy_fromio") -#define isa_memcpy_toio(a, b, c) __readwrite_bug("isa_memcpy_toio") - -#define isa_eth_io_copy_and_sum(a, b, c, d) \ - __readwrite_bug("isa_eth_io_copy_and_sum") - -#define isa_check_signature(io, sig, len) (0) - -#endif /* __mem_isa */ -#endif /* __KERNEL__ */ - #include #endif /* __ASM_RISCV_IO_H */ diff --git a/board/AndesTech/ax25-ae350/Kconfig b/board/AndesTech/ax25-ae350/Kconfig index e50f505a2ba26b0ddf1581805dbb7c89e77bab53..91eec35f474f70797234140557e5e4656a6546bc 100644 --- a/board/AndesTech/ax25-ae350/Kconfig +++ b/board/AndesTech/ax25-ae350/Kconfig @@ -35,5 +35,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy imply SMP imply SPL_RAM_SUPPORT imply SPL_RAM_DEVICE + imply OF_HAS_PRIOR_STAGE endif diff --git a/cmd/riscv/sbi.c b/cmd/riscv/sbi.c index 8fc8ab0ac5196cfda340046314c0bfa44bceb947..ee11e0f88e4f78951c9fef5a4c21db86ef55468d 100644 --- a/cmd/riscv/sbi.c +++ b/cmd/riscv/sbi.c @@ -26,6 +26,7 @@ static struct sbi_imp implementations[] = { { 3, "KVM" }, { 4, "RustSBI" }, { 5, "Diosix" }, + { 6, "Coffer" }, }; static struct sbi_ext extensions[] = { diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index 3a646e4222a1b301664f1d3cf4c6692d4068c1cd..8406eb5c333d6c767c1cf7a2010b31d851a60830 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x00200000 CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_BINMAN_FDT is not set CONFIG_SYS_PROMPT="RISC-V # " CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index 4ac90fbf73036c45e792fdd15135f7689c2b289f..5db1a7cbd70c5453a8395f355016b796425bb963 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x80010000 CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_BINMAN_FDT is not set CONFIG_SYS_PROMPT="RISC-V # " CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index 1e682df8007ebbe98459843437b51184247ba00d..6abc9c1388dfda2eb8bf1a83e6cc9e33aef0183b 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x00200000 CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_BINMAN_FDT is not set CONFIG_SYS_PROMPT="RISC-V # " CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index 4f17d5ca1e25724eca0ec8f9b45f0569254638f9..f3ace4453f106cc3ac6eb600e04cc7776c004706 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x80010000 CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_BINMAN_FDT is not set CONFIG_SYS_PROMPT="RISC-V # " CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y diff --git a/doc/board/sifive/unleashed.rst b/doc/board/sifive/unleashed.rst index c8a62068a77757d716fc2ac19e1b2355be096a02..ce38b701d78d8a910cb4c0e73f2676ccce9ebe5f 100644 --- a/doc/board/sifive/unleashed.rst +++ b/doc/board/sifive/unleashed.rst @@ -216,8 +216,6 @@ Or if you want to use a compressed kernel image file such as Image.gz 1.2 MiB/s done Bytes transferred = 4809458 (4962f2 hex) - =>setenv kernel_comp_addr_r 0x90000000 - =>setenv kernel_comp_size 0x500000 By this time, correct kernel image is loaded and required environment variables are set. You can proceed to load the ramdisk and device tree from the tftp server diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h index 618c3b63d41eb53c4583e58a32af6e47aae2f7c1..f462895fb5fdea332725f0cd2e2427b9b434f691 100644 --- a/include/configs/qemu-riscv.h +++ b/include/configs/qemu-riscv.h @@ -54,10 +54,12 @@ "fdt_high=0xffffffffffffffff\0" \ "initrd_high=0xffffffffffffffff\0" \ "kernel_addr_r=0x84000000\0" \ - "fdt_addr_r=0x88000000\0" \ - "scriptaddr=0x88100000\0" \ - "pxefile_addr_r=0x88200000\0" \ - "ramdisk_addr_r=0x88300000\0" \ + "kernel_comp_addr_r=0x88000000\0" \ + "kernel_comp_size=0x4000000\0" \ + "fdt_addr_r=0x8c000000\0" \ + "scriptaddr=0x8c100000\0" \ + "pxefile_addr_r=0x8c200000\0" \ + "ramdisk_addr_r=0x8c300000\0" \ BOOTENV #endif diff --git a/include/configs/sifive-unleashed.h b/include/configs/sifive-unleashed.h index 920f3140f64fdeb337bbe7ecb8b32e7d1e5ad4fb..96e2eb67988179e1b901f8ed3177900575f6023e 100644 --- a/include/configs/sifive-unleashed.h +++ b/include/configs/sifive-unleashed.h @@ -61,12 +61,14 @@ "fdt_high=0xffffffffffffffff\0" \ "initrd_high=0xffffffffffffffff\0" \ "kernel_addr_r=0x84000000\0" \ - "fdt_addr_r=0x88000000\0" \ - "scriptaddr=0x88100000\0" \ + "kernel_comp_addr_r=0x88000000\0" \ + "kernel_comp_size=0x4000000\0" \ + "fdt_addr_r=0x8c000000\0" \ + "scriptaddr=0x8c100000\0" \ "script_offset_f=0x1fff000\0" \ "script_size_f=0x1000\0" \ - "pxefile_addr_r=0x88200000\0" \ - "ramdisk_addr_r=0x88300000\0" \ + "pxefile_addr_r=0x8c200000\0" \ + "ramdisk_addr_r=0x8c300000\0" \ "type_guid_gpt_loader1=" TYPE_GUID_LOADER1 "\0" \ "type_guid_gpt_loader2=" TYPE_GUID_LOADER2 "\0" \ "type_guid_gpt_system=" TYPE_GUID_SYSTEM "\0" \ diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index 087764666bf6595183224d625ae1054abb16f1ed..fa734a66be7932558167a60d101e47f84025d6e6 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -56,12 +56,12 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "kernel_addr_r=0x84000000\0" \ - "fdt_addr_r=0x88000000\0" \ - "scriptaddr=0x88100000\0" \ - "pxefile_addr_r=0x88200000\0" \ - "ramdisk_addr_r=0x88300000\0" \ - "kernel_comp_addr_r=0x90000000\0" \ + "kernel_comp_addr_r=0x88000000\0" \ "kernel_comp_size=0x4000000\0" \ + "fdt_addr_r=0x8c000000\0" \ + "scriptaddr=0x8c100000\0" \ + "pxefile_addr_r=0x8c200000\0" \ + "ramdisk_addr_r=0x8c300000\0" \ "type_guid_gpt_loader1=" TYPE_GUID_LOADER1 "\0" \ "type_guid_gpt_loader2=" TYPE_GUID_LOADER2 "\0" \ "type_guid_gpt_system=" TYPE_GUID_SYSTEM "\0" \