diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
new file mode 100644
index 0000000000000000000000000000000000000000..8d7bc9a909369a8b30d003d33cb02eed1d9e33e3
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -0,0 +1,18 @@
+/*
+ * Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/*
+ * Execution starts on the instruction following this 4-byte header
+ * (containing the magic 'RK33').
+ *
+ * To make life easier for everyone, we build the SPL binary with
+ * space for this 4-byte header already included in the binary.
+ */
+
+#ifdef CONFIG_SPL_BUILD
+	.space 0x4         /* space for the 'RK33' */
+#endif
+	b reset
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index bf8e6be410e71d2168ed0f2f6765154c8a63022f..af0796d1d06ad45d4de89a4d883fb8315edf87fb 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -54,6 +54,7 @@ config ROCKCHIP_RK3399
 	select SUPPORT_SPL
 	select SPL
 	select SPL_SEPARATE_BSS
+	select ENABLE_ARM_SOC_BOOT0_HOOK
 	help
 	  The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
 	  and quad-core Cortex-A53.
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 4ba81aca6cd9041704be0e3bbec0bbf361803b9f..c1ea6162686b4b4d81b92dcb4be65773a69c227e 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -27,7 +27,7 @@
 #define CONFIG_SYS_INIT_SP_ADDR		0x00300000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0xff8effff
-#define CONFIG_SPL_TEXT_BASE		0xff8c2008
+#define CONFIG_SPL_TEXT_BASE		0xff8c2000
 #define CONFIG_SPL_MAX_SIZE		0x30000
 /*  BSS setup */
 #define CONFIG_SPL_BSS_START_ADDR       0xff8e0000