diff --git a/arch/x86/cpu/qemu/pci.c b/arch/x86/cpu/qemu/pci.c index 2e944569b5be3da8d02e5182ee21c0b4cd9a8573..8515d106e34a05104096d96533baf7fad8693ad2 100644 --- a/arch/x86/cpu/qemu/pci.c +++ b/arch/x86/cpu/qemu/pci.c @@ -6,7 +6,6 @@ #include #include -#include #include #include #include @@ -51,11 +50,8 @@ void board_pci_setup_hose(struct pci_controller *hose) int board_pci_post_scan(struct pci_controller *hose) { - int ret = 0; u16 device, xbcs; int pam, i; - pci_dev_t vga; - ulong start; /* * i440FX and Q35 chipset have different PAM register offset, but with @@ -96,20 +92,7 @@ int board_pci_post_scan(struct pci_controller *hose) CONFIG_PCIE_ECAM_BASE | BAR_EN); } - /* - * QEMU emulated graphic card shows in the PCI configuration space with - * PCI vendor id and device id as an artificial pair 0x1234:0x1111. - * It is on PCI bus 0, function 0, but device number is not consistent - * for the two x86 targets it supports. For i440FX and PIIX chipset - * board, it shows as device 2, while for Q35 and ICH9 chipset board, - * it shows as device 1. - */ - vga = i440fx ? I440FX_VGA : Q35_VGA; - start = get_timer(0); - ret = pci_run_vga_bios(vga, NULL, PCI_ROM_USE_NATIVE); - debug("BIOS ran in %lums\n", get_timer(start)); - - return ret; + return 0; } #ifdef CONFIG_GENERATE_MP_TABLE