diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index 73a722a6c7034a1e4a3a51b179a5836d5092cb5a..e9419492bc3dafb156be8d9a63c9a4c3f3e2aebe 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -56,7 +56,7 @@ obj-$(CONFIG_P2020DS) += ics307_clk.o obj-$(CONFIG_TARGET_P3041DS) += ics307_clk.o obj-$(CONFIG_TARGET_P4080DS) += ics307_clk.o obj-$(CONFIG_TARGET_P5020DS) += ics307_clk.o -obj-$(CONFIG_P5040DS) += ics307_clk.o +obj-$(CONFIG_TARGET_P5040DS) += ics307_clk.o obj-$(CONFIG_VSC_CROSSBAR) += vsc3316_3308.o obj-$(CONFIG_IDT8T49N222A) += idt8t49n222a_serdes_clk.o obj-$(CONFIG_ZM7300) += zm7300.o @@ -69,7 +69,7 @@ obj-$(CONFIG_TARGET_P2041RDB) += p_corenet/ obj-$(CONFIG_TARGET_P3041DS) += p_corenet/ obj-$(CONFIG_TARGET_P4080DS) += p_corenet/ obj-$(CONFIG_TARGET_P5020DS) += p_corenet/ -obj-$(CONFIG_P5040DS) += p_corenet/ +obj-$(CONFIG_TARGET_P5040DS) += p_corenet/ obj-$(CONFIG_LAYERSCAPE_NS_ACCESS) += ns_access.o diff --git a/board/freescale/corenet_ds/Makefile b/board/freescale/corenet_ds/Makefile index 6bd54c09dff8a39210783abfcce7596f9a622fc7..100ba926cfde057ede82c4fb8ad57b02ff204f4a 100644 --- a/board/freescale/corenet_ds/Makefile +++ b/board/freescale/corenet_ds/Makefile @@ -11,8 +11,8 @@ obj-y += ddr.o obj-$(CONFIG_TARGET_P3041DS) += eth_hydra.o obj-$(CONFIG_TARGET_P4080DS) += eth_p4080.o obj-$(CONFIG_TARGET_P5020DS) += eth_hydra.o -obj-$(CONFIG_P5040DS) += eth_superhydra.o +obj-$(CONFIG_TARGET_P5040DS) += eth_superhydra.o obj-$(CONFIG_TARGET_P3041DS) += p3041ds_ddr.o obj-$(CONFIG_TARGET_P4080DS) += p4080ds_ddr.o obj-$(CONFIG_TARGET_P5020DS) += p5020ds_ddr.o -obj-$(CONFIG_P5040DS) += p5040ds_ddr.o +obj-$(CONFIG_TARGET_P5040DS) += p5040ds_ddr.o diff --git a/board/freescale/corenet_ds/corenet_ds.c b/board/freescale/corenet_ds/corenet_ds.c index cc33d5c55d94a30fc13348faf760c8c45fff41eb..93e1258295617b815605d1a97d043f39283ce3bf 100644 --- a/board/freescale/corenet_ds/corenet_ds.c +++ b/board/freescale/corenet_ds/corenet_ds.c @@ -27,7 +27,7 @@ int checkboard (void) u8 sw; struct cpu_type *cpu = gd->arch.cpu; #if defined(CONFIG_TARGET_P3041DS) || defined(CONFIG_TARGET_P5020DS) || \ - defined(CONFIG_P5040DS) + defined(CONFIG_TARGET_P5040DS) unsigned int i; #endif static const char * const freq[] = {"100", "125", "156.25", "212.5" }; @@ -56,15 +56,15 @@ int checkboard (void) * don't match. */ puts("SERDES Reference Clocks: "); -#if defined(CONFIG_TARGET_P3041DS) || defined(CONFIG_TARGET_P5020DS) \ - || defined(CONFIG_P5040DS) +#if defined(CONFIG_TARGET_P3041DS) || defined(CONFIG_TARGET_P5020DS) || \ + defined(CONFIG_TARGET_P5040DS) sw = in_8(&PIXIS_SW(5)); for (i = 0; i < 3; i++) { unsigned int clock = (sw >> (6 - (2 * i))) & 3; printf("Bank%u=%sMhz ", i+1, freq[clock]); } -#ifdef CONFIG_P5040DS +#ifdef CONFIG_TARGET_P5040DS /* On P5040DS, SW11[7:8] determines the Bank 4 frequency */ sw = in_8(&PIXIS_SW(9)); printf("Bank4=%sMhz ", freq[sw & 3]); @@ -136,8 +136,8 @@ int misc_init_r(void) unsigned int i; u8 sw; -#if defined(CONFIG_TARGET_P3041DS) || defined(CONFIG_TARGET_P5020DS) \ - || defined(CONFIG_P5040DS) +#if defined(CONFIG_TARGET_P3041DS) || defined(CONFIG_TARGET_P5020DS) || \ + defined(CONFIG_TARGET_P5040DS) sw = in_8(&PIXIS_SW(5)); for (i = 0; i < 3; i++) { unsigned int clock = (sw >> (6 - (2 * i))) & 3; diff --git a/include/configs/P5040DS.h b/include/configs/P5040DS.h index 548d091f2a9f8403f3d33ae1742aded69f5c0322..078e60c4c2bb21279b0ec4d225cd39e687a96f2e 100644 --- a/include/configs/P5040DS.h +++ b/include/configs/P5040DS.h @@ -8,8 +8,6 @@ * P5040 DS board configuration file * */ -#define CONFIG_P5040DS - #define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */ #define CONFIG_MMC diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index bd8e504e9e5c2a1c1dc0b9bb857bac9f13222224..67a503482ded810b56ca116067dd3afdba524068 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -30,7 +30,7 @@ #define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p4080ds.cfg #elif defined(CONFIG_TARGET_P5020DS) #define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p5020ds.cfg -#elif defined(CONFIG_P5040DS) +#elif defined(CONFIG_TARGET_P5040DS) #define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p5040ds.cfg #endif #endif diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index dca414a6d073567f537f7c6f4e41b39092f4a168..796d6a1720fcfe2afb6d57c5ebff5553802ed08d 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -3383,7 +3383,6 @@ CONFIG_OS2_ENV_ADDR CONFIG_OS_ENV_ADDR CONFIG_OTHBOOTARGS CONFIG_OVERWRITE_ETHADDR_ONCE -CONFIG_P5040DS CONFIG_PAGE_CNT_MASK CONFIG_PAGE_CNT_SHIFT CONFIG_PALMAS_AUDPWR