Minor coding style cleanup.

Signed-off-by: NWolfgang Denk <wd@denx.de>

arch/arm/cpu/arm920t/at91/at91rm9200_devices.c

@@ -75,11 +75,9 @@ void at91_serial2_hw_init(void)
 	writel(1 << ATMEL_ID_USART2, &pmc->pcer);
 }
 
-
 void at91_seriald_hw_init(void)
 {
 	at91_set_a_periph(AT91_PIO_PORTA, 30, PUP);		/* DRXD */
 	at91_set_a_periph(AT91_PIO_PORTA, 31, 1);		/* DTXD */
 	/* writing SYS to PCER has no effect on AT91RM9200 */
 }
-

arch/arm/cpu/arm920t/at91/clock.c

@@ -104,7 +104,6 @@ static u32 at91_pll_rate(u32 freq, u32 reg)
 	return freq;
 }
 
-
 int at91_clock_init(unsigned long main_clock)
 {
 	unsigned freq, mckr;
@@ -157,4 +156,3 @@ int at91_clock_init(unsigned long main_clock)
 
 	return 0;
 }
-

arch/arm/cpu/arm920t/at91/cpu.c

@@ -40,4 +40,3 @@ int arch_cpu_init(void)
 {
 	return at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
 }
-

doc/README.at91-soc

@@ -39,4 +39,3 @@ The method for updating
 3. add new structures for SoC access
 4. Convert arch, driver and boards file to new SoC
 5. remove legacy code, if all boards and drives are ready
-

drivers/gpio/da8xx_gpio.c

@@ -27,13 +27,11 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/davinci_misc.h>
 
-
 static struct gpio_registry {
 	int is_registered;
 	char name[GPIO_NAME_SIZE];
 } gpio_registry[MAX_NUM_GPIOS];
 
-
 #define pinmux(x)       (&davinci_syscfg_regs->pinmux[x])
 
 static const struct pinmux_config gpio_pinmux[] = {
@@ -183,8 +181,6 @@ static const struct pinmux_config gpio_pinmux[] = {
 	{ pinmux(18), 8, 2 },
 };
 
-
-
 int gpio_request(int gp, const char *label)
 {
 	if (gp >= MAX_NUM_GPIOS)
@@ -202,13 +198,11 @@ int gpio_request(int gp, const char *label)
 	return 0;
 }
 
-
 void gpio_free(int gp)
 {
 	gpio_registry[gp].is_registered = 0;
 }
 
-
 void gpio_toggle_value(int gp)
 {
 	struct davinci_gpio *bank;
@@ -217,7 +211,6 @@ void gpio_toggle_value(int gp)
 	gpio_set_value(gp, !gpio_get_value(gp));
 }
 
-
 int gpio_direction_input(int gp)
 {
 	struct davinci_gpio *bank;
@@ -227,7 +220,6 @@ int gpio_direction_input(int gp)
 	return 0;
 }
 
-
 int gpio_direction_output(int gp, int value)
 {
 	struct davinci_gpio *bank;
@@ -238,7 +230,6 @@ int gpio_direction_output(int gp, int value)
 	return 0;
 }
 
-
 int gpio_get_value(int gp)
 {
 	struct davinci_gpio *bank;
@@ -249,7 +240,6 @@ int gpio_get_value(int gp)
 	return ip ? 1 : 0;
 }
 
-
 void gpio_set_value(int gp, int value)
 {
 	struct davinci_gpio *bank;
@@ -262,7 +252,6 @@ void gpio_set_value(int gp, int value)
 		bank->clr_data = 1U << GPIO_BIT(gp);
 }
 
-
 void gpio_info(void)
 {
 	int gp, dir, val;

include/linux/mdio.h

@@ -127,8 +127,6 @@
 					MDIO_DEVS_DTEXS | \
 					MDIO_DEVS_AN)
 
-
-
 /* Control register 2. */
 #define MDIO_PMA_CTRL2_TYPE		0x000f	/* PMA/PMD type selection */
 #define MDIO_PMA_CTRL2_10GBCX4		0x0000	/* 10GBASE-CX4 type */