The '#mbox-cells' property is added to all the OMAP mailbox
nodes. This property is mandatory with the new mailbox framework.

Cc: "Benoît Cousson" <bcousson@baylibre.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

we are now infering number of IRQ lines based
on correct compatible flag, which renders this
binding completely useless.
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

that way, our intc driver can figure out how
many IRQ lines INTC has.
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The sub-mailbox devices are added to the Mailbox DT nodes on
OMAP2420, OMAP2430, OMAP3, AM33xx, AM43xx, OMAP4 and OMAP5
family of SoCs. This data represents the same mailboxes that
used to be represented in hwmod attribute data previously.
The node name is chosen based on the .name field of
omap_mbox_dev_info structure used in the hwmod data.

Cc: "Benoît Cousson" <bcousson@baylibre.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Provide OMAP3, 4 and OMAP5 with interrupt number for PRM

And for DRA7, provide crossbar number for prm interrupt.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The number of mailbox fifos and users (IP interrupts) are added
to the Mailbox DT nodes on OMAP2420, OMAP2430, OMAP3, and OMAP5
family of SoCs through the DT properties "ti,mbox-num-fifos" and
"ti,mbox-num-users" properties. This data represents the same data
that used to be represented in hwmod attribute data through the
.num_fifos and .num_users fields previously.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Acked-by: NPavel Machek <pavel@ucw.cz>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add SSI device tree data for OMAP3 and Nokia N900.
Signed-off-by: NSebastian Reichel <sre@kernel.org>
Reviewed-by: NPavel Machek <pavel@ucw.cz>
Tested-By: NIvaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

We've had deeper idle states working on omaps for few years now,
but only in the legacy mode. When booted with device tree, the
wake-up events did not have a chance to work until commit
3e6cee17 (pinctrl: single: Add support for wake-up interrupts)
that recently got merged. In addition to that we also needed commit
79d97015 (of/irq: create interrupts-extended property) and
9ec36caf (of/irq: do irq resolution in platform_get_irq) that
are now also merged.

So let's fix the wake-up events for some selected omaps so devices
booted in device tree mode won't just hang if deeper power states
are enabled, and so systems can wake up from suspend to the serial
port event.

Note that there's no longer need to specify the wake-up bit in
the pinctrl settings, the request_irq on the wake-up pin takes
care of that.

Cc: devicetree@vger.kernel.org
Cc: "Benoît Cousson" <bcousson@baylibre.com>
Cc: Kevin Hilman <khilman@linaro.org>
Cc: Nishanth Menon <nm@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
[tony@atomide.com: updated comments, added board LDP]
Signed-off-by: NTony Lindgren <tony@atomide.com>

AM3517 inherits OMAP3 dts file, but does not have all the IPs
that are present on OMAP3. This patch disables the following
absent IPs for AM3517: Mailbox, IVA, MMU_ISP, MPU_IVA SmartReflex.

A label had to be added for IVA node in omap3.dtsi to be able to
get a reference to the node for disabling.

Otherwise we get the following warnings during booting:
platform iva.2: Cannot lookup hwmod 'iva'
platform 48094000.mailbox: Cannot lookup hwmod 'mailbox'
platform 480bd400.mmu: Cannot lookup hwmod 'mmu_isp'
platform 480c9000.smartreflex: Cannot lookup hwmod 'smartreflex_mpu_iva'
Signed-off-by: NSuman Anna <s-anna@ti.com>
[tony@atomide.com: updated description for the warnings]
Signed-off-by: NTony Lindgren <tony@atomide.com>

Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Cc: linux-omap@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add DT data for OMAP3 display subsystem, which contains the following
blocks:

dss - the wrapper/glue for the display modules
dispc - display controller
dsi - MIPI DSI encoder
rfbi - MIPI DBI encoder
venc - analog TV encoder
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>

Add the DT node for the IOMMU within the DSP subsystem. The entry
is disabled to keep in line with the hwmod usage as intended by
the deprecated CONFIG_OMAP_IOMMU_IVA2 flag.
Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch>
[s-anna@ti.com: split the entry and disable the node]
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Update the IOMMU node for the camera subsystem as per the
OMAP IOMMU bindings.
Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch>
[s-anna@ti.com: corrected interrupt number]
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The OMAP EHCI and OHCI controllers are not compatible with drivers
other than "ti,ehci-omap" and "ti,ohci-omap3" respectively, so get
rid of the incompatible ids.

CC: Alan Stern <stern@rowland.harvard.edu>
CC: Nishant Menon <nm@ti.com>
CC: Kevin Hilman <khilman@linaro.org>
Signed-off-by: NRoger Quadros <rogerq@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add pbias regulator node as a child of system control
module - syscon.
Signed-off-by: NBalaji T K <balajitk@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Tested-by: NFlorian Vaussard <florian.vaussard@epfl.ch>
Tested-by: NStefan Roese <sr@denx.de>
Signed-off-by: NChris Ball <chris@printf.net>

OMAP34xx, AM3517 and OMAP36xx platforms use dpll1 clock.

OMAP443x, OMAP446x, OMAP447x, OMAP5, DRA7, AM43xx platforms use
dpll_mpu clock.

Latency used is the generic latency defined in omap-cpufreq
driver.
Signed-off-by: NNishanth Menon <nm@ti.com>
Acked-by: NAcked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

In omap3.dtsi disable all mcbsp nodes and board dts files can explicitly
enable the mcbsp they are using.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch creates a unique node for each clock in the OMAP3 power,
reset and clock manager (PRCM).
Signed-off-by: NTero Kristo <t-kristo@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

The omap3_pmx_core pinmux device in the device tree handles the system
controller module (SCM) PADCONFS fonction. Its control registers are
split in two distinct areas, with other SCM registers in-between. Those
other registers can't thus be requested by other drivers as the memory
region gets reserved by the pinmux driver.

Split the omap3_pmx_core device tree node in two for the two memory
regions. The second region address and size depends on the SoC model.

The change in omap3.dtsi fixes an "external abort on non-linefetch" when
doing

cat /sys/kernel/debug/pinctrl/.../pins

on a Nokia N900.

Note that the core2 padconf region is different for 3430 vs 3630,
and does not exist on 3517 as noted by Nishanth Menon <nm@ti.com>.
Reported-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-By: NSebastian Reichel <sre@debian.org>
Signed-off-by: NNishanth Menon <nm@ti.com>
[tony@atomide.com: updated for 3430 vs 3630 core2 based on Nishant's patch]
Signed-off-by: NTony Lindgren <tony@atomide.com>

After dropping the duplicate data in hwmod that now should come from
the .dts files, I noticed few more entries missing. Let's add these
as otherwise devices relying on these won't work.

Looks like the side tone entries are bundled into the mcbsp1 to 3,
so that may needs some special handling in the hwmod code as it's
currently trying to look up mcbsp2_sidetone and mcbsp3_sidetone
entries.
Signed-off-by: NTony Lindgren <tony@atomide.com>

Looks like omap3 is still relying on hwmod data for some basic
device tree information. Let's add the information to omap3.dtsi
so we can remove the related hwmod data once omap3 is DT only.
Acked-by: NBenoit Cousson <bcousson@baylibre.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Currently, on OMAP5, i2c1 and i2c5 defer probe due to pinctrl
dependencies. This changes the i2c ID each bus is registered with in
i2c-dev interface. As a result of this, many userspace tools break and
there is no consistent manner to fix the same if the i2c dev interface
have no consistent numbering.

Since this could happen for other OMAP derivatives, provide i2c alias
for all OMAP3+ SoCs to allow ordering the i2c devices correctly.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NBenoit Cousson <bcousson@baylibre.com>

Now pinctrl-single-omap can handle the wake-up events for us now
as long as the events are configured in the .dts files.

Done in collaboration with Roger Quadros <rogerq@ti.com>.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Prakash Manjunathappa <prakash.pm@ti.com>
Cc: Roger Quadros <rogerq@ti.com>
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: NKevin Hilman <khilman@linaro.org>
Tested-by: NKevin Hilman <khilman@linaro.org>
Signed-off-by: NRoger Quadros <rogerq@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The wake-up interrupt bit is available on omap3/4/5 processors
unlike what we claim. Without fixing it we cannot use it on
omap3 and the system configured for wake-up events will just
hang on wake-up.

Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Benoît Cousson <bcousson@baylibre.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: NTony Lindgren <tony@atomide.com>

Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NBenoit Cousson <bcousson@baylibre.com>

Some nodes in OMAP3 DTS now use edge or level sensitive interrupts.
Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Using constants for pinctrl allows a better readability, and removes
redundancy with comments.
Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Use standard GPIO constants to enhance the readability of DT GPIOs.
Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Replace /include/ by #include for OMAP2+ DT, in order to use the
C pre-processor, making use of #define features possible.
Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

This patch updates the in-kernel dts files according to the latest cpus
and cpu bindings updates for ARM.
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>

Commit ad871c10 (ARM: dts: OMAP: Add usb_otg and glue data to
OMAP3+ boards) added support for MUSB on omap3 for device tree,
but added the interrupts the wrong way probably as they were
copied from the omap4.dtsi file. On omap3 we have TI specific
interrupt controller, not GIC.

Fix this by specifying the interrupt following the TI INTC
binding.

Without this fix MUSB won't work as it is trying to use
irq0 instead of irq92.
Signed-off-by: NTony Lindgren <tony@atomide.com>

If a board isn't using twl4030, then dtc will complain about the missing
phandle (which is in twl4030.dtsi).  Move the phy declaration to the dts
files.
Signed-off-by: NJason Cooper <jason@lakedaemon.net>
Signed-off-by: NTony Lindgren <tony@atomide.com>

 - Fix 'function-mask' referring to TRM (Omap 36xx) Section 13.4.4:
   "Pad Functional Multiplexing and Configuration".
 - Fix 'omap3_pmx_wkup' referring to TRM Table 13-6:
   "Wkup Control Module Pad Configuration Register Fields".

Note that these fixes are not critical currently as we
are not yet using the missing range of pinmux registers
at this point.
Signed-off-by: NChristoph Fritz <chf.fritz@googlemail.com>
[tony@atomide.com: updated comments]
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add the "ti,gpio-always-on" property to the appropriate GPIO banks to
indicate which banks are always powered and will never lose logic state.
Signed-off-by: NJon Hunter <jon-hunter@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Update the DMTIMER compatibility property to reflect the register level
compatibilty between devices and update the various OMAP/AM timer
bindings with the appropriate compatibility string.

By doing this we can add platform specific data applicable to specific
timer versions to the driver. For example, errata flags can be populated
for the timer versions that are impacted.
Signed-off-by: NJon Hunter <jon-hunter@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Populate DMA client information for McBSP DMIC and McPDM periperhal on
OMAP2+ devices.
Signed-off-by: NSebastien Guiriec <s-guiriec@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

The OMAP3 gpio bindings are currently missing the reg and interrupt
properties and so add these properties.
Signed-off-by: NJon Hunter <jon-hunter@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

The OMAP gpio binding documention [1] states that the #interrupts-cells
property for gpio controllers should be 2. Currently, for OMAP3+ devices
the #interrupt-cells is set to 1. By setting this property to 2, it
allows clients to pass a 2nd parameter indicating the sensitivity (level
or edge) and polarity (high or low) of the interrupt. The OMAP gpio
controllers support these options and so update the #interrupt-cells
property for OMAP3+ devices to 2.

[1] Documentation/devicetree/bindings/gpio/gpio-omap.txt
Signed-off-by: NJon Hunter <jon-hunter@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Add SDMA controller binding for OMAP2+ devices and populate DMA client
information for SPI and MMC peripheral on OMAP3+ devices. Please note
that OMAP24xx devices do not have SPI and MMC bindings available yet and
so DMA client information is not populated.
Signed-off-by: NJon Hunter <jon-hunter@ti.com>
Reviewed-by: NFelipe Balbi <balbi@ti.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Add PMU nodes for OMAP2, OMAP3 and OMAP4460 devices.

Please note that the node for OMAP4460 has been placed in a separate
header file for OMAP4460, because the node is not compatible with
OMAP4430. The node for OMAP4430 is not included because PMU is not
currently supported on OMAP4430 due to the absence of a cross-trigger
interface driver.
Signed-off-by: NJon Hunter <jon-hunter@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>