From e8538d041a93817cea4ae3914afcfdc6182483e7 Mon Sep 17 00:00:00 2001 From: ou-yangkan <519689417@qq.com> Date: Wed, 19 Jan 2022 10:09:02 +0800 Subject: [PATCH] =?UTF-8?q?feat:=20=E5=86=85=E6=A0=B8=E6=8F=90=E4=BE=9BInt?= =?UTF-8?q?errupt=E6=A1=86=E6=9E=B6=EF=BC=8C=E6=94=AF=E6=8C=81=E5=A4=9A?= =?UTF-8?q?=E6=9E=B6=E6=9E=84=E5=A4=9A=E5=B9=B3=E5=8F=B0=E9=80=9A=E7=94=A8?= =?UTF-8?q?=E5=8C=96?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit BREAKING CHANGE: 新增接口： LOS_HwiTrigger ArchIntTrigger LOS_HwiEnable ArchIntEnable LOS_HwiDisable ArchIntDisable LOS_HwiClear ArchIntClear LOS_HwiSetPriority ArchIntSetPriority https://gitee.com/openharmony/kernel_liteos_m/issues/I4RDNJ Signed-off-by: wang-shulin93 <15173259956@163.com> --- arch/arm/arm9/gcc/los_arch_interrupt.h | 28 ++---- arch/arm/arm9/gcc/los_interrupt.c | 46 +++++++--- arch/arm/cortex-m3/keil/los_arch_interrupt.h | 28 ++---- arch/arm/cortex-m3/keil/los_interrupt.c | 84 ++++++++++++++++-- .../cortex-m33/gcc/NTZ/los_arch_interrupt.h | 28 ++---- arch/arm/cortex-m33/gcc/NTZ/los_interrupt.c | 87 +++++++++++++++++-- .../gcc/TZ/non_secure/los_arch_interrupt.h | 28 ++---- .../gcc/TZ/non_secure/los_interrupt.c | 87 +++++++++++++++++-- .../cortex-m33/iar/NTZ/los_arch_interrupt.h | 28 ++---- arch/arm/cortex-m33/iar/NTZ/los_interrupt.c | 82 +++++++++++++++-- .../iar/TZ/non_secure/los_arch_interrupt.h | 28 ++---- .../iar/TZ/non_secure/los_interrupt.c | 82 +++++++++++++++-- arch/arm/cortex-m4/gcc/los_arch_interrupt.h | 28 ++---- arch/arm/cortex-m4/gcc/los_interrupt.c | 84 ++++++++++++++++-- arch/arm/cortex-m4/iar/los_arch_interrupt.h | 28 ++---- arch/arm/cortex-m4/iar/los_interrupt.c | 82 +++++++++++++++-- arch/arm/cortex-m7/gcc/los_arch_interrupt.h | 28 ++---- arch/arm/cortex-m7/gcc/los_interrupt.c | 82 +++++++++++++++-- arch/arm/cortex-m7/iar/los_arch_interrupt.h | 28 ++---- arch/arm/cortex-m7/iar/los_interrupt.c | 82 +++++++++++++++-- arch/csky/v2/gcc/los_arch_interrupt.h | 19 ---- arch/csky/v2/gcc/los_interrupt.c | 52 ++++++++--- arch/include/los_interrupt.h | 63 ++++++++++++++ arch/risc-v/nuclei/gcc/los_interrupt.c | 57 ++++++++++-- arch/xtensa/lx6/gcc/los_arch_interrupt.h | 1 - arch/xtensa/lx6/gcc/los_interrupt.c | 47 +++++----- arch/xtensa/lx6/gcc/los_timer.c | 6 +- testsuites/src/osTest.c | 8 +- 28 files changed, 958 insertions(+), 373 deletions(-) diff --git a/arch/arm/arm9/gcc/los_arch_interrupt.h b/arch/arm/arm9/gcc/los_arch_interrupt.h index bf8a2272..588cf60b 100644 --- a/arch/arm/arm9/gcc/los_arch_interrupt.h +++ b/arch/arm/arm9/gcc/los_arch_interrupt.h @@ -97,7 +97,8 @@ extern UINT32 g_intCount; * * Value: 0x02000900 * - * Solution: Ensure that the interrupt number is valid. The value range of the interrupt number applicable for a Cortex-A7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX]. + * Solution: Ensure that the interrupt number is valid. + * The value range of the interrupt number applicable for a arm9 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX]. */ #define OS_ERRNO_HWI_NUM_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00) @@ -147,7 +148,8 @@ extern UINT32 g_intCount; * * Value: 0x02000905 * - * Solution: Ensure that the interrupt priority is valid. The value range of the interrupt priority applicable for a Cortex-A7 platform is [0,15]. + * Solution: Ensure that the interrupt priority is valid. + * The value range of the interrupt priority applicable for a arm9 platform is [0,15]. */ #define OS_ERRNO_HWI_PRIO_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05) @@ -157,7 +159,8 @@ extern UINT32 g_intCount; * * Value: 0x02000906 * - * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST of which the value can be 0 or 1. + * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or + * OS_HWI_MODE_FAST of which the value can be 0 or 1. */ #define OS_ERRNO_HWI_MODE_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06) @@ -204,25 +207,6 @@ extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector); */ extern VOID HalInterrupt(VOID); -/* * - * @ingroup los_arch_interrupt - * @brief: Get an interrupt number. - * - * @par Description: - * This API is used to get the current interrupt number. - * - * @attention: - * - * - * @param: None. - * - * @retval: Interrupt Indexes number. - * @par Dependency: - * - * @see None. - */ -extern UINT32 HalIntNumGet(VOID); - /* * * @ingroup los_arch_interrupt * @brief: Default vector handling function. diff --git a/arch/arm/arm9/gcc/los_interrupt.c b/arch/arm/arm9/gcc/los_interrupt.c index 5fab22bc..712e8445 100644 --- a/arch/arm/arm9/gcc/los_interrupt.c +++ b/arch/arm/arm9/gcc/los_interrupt.c @@ -48,9 +48,6 @@ #define OS_INT_ENABLE_ADDR (OS_INT_REG_BASE) #define OS_INT_STATUS_ADDR (OS_INT_REG_BASE + 12) -#define OS_INT_ENABLE(num) (*((volatile UINT32 *)OS_INT_ENABLE_ADDR) |= (1U << (num))) -#define OS_INT_DISABLE(num) (*((volatile UINT32 *)OS_INT_ENABLE_ADDR ) &= ~(1U << (num))) - #define OS_INSTR_SET_MASK 0x01000020U #define OS_ARM_INSTR_LEN 4 #define OS_THUMB_INSTR_LEN 2 @@ -112,20 +109,49 @@ VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector) /* **************************************************************************** - Function : HalIntNumGet + Function : HwiNumGet Description : Get an interrupt number Input : None Output : None Return : Interrupt Indexes number **************************************************************************** */ -LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID) +STATIC UINT32 HwiNumGet(VOID) { UINT32 status; READ_UINT32(status, OS_INT_STATUS_ADDR); + return (31 - CLZ(status)); } +STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + *((volatile UINT32 *)OS_INT_ENABLE_ADDR) |= (1U << (hwiNum)); + + return LOS_OK; +} + +STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + *((volatile UINT32 *)OS_INT_ENABLE_ADDR) &= ~(1U << (hwiNum)); + + return LOS_OK; +} + +HwiControllerOps g_archHwiOps = { + .enableIrq = HwiUnmask, + .disableIrq = HwiMask, + .getCurIrqNum = HwiNumGet, +}; + inline UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); @@ -140,8 +166,8 @@ inline UINT32 ArchIsIntActive(VOID) /*lint -e529*/ LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID) { - UINT32 irqNum = HalIntNumGet(); - PRINT_ERR("%s irqnum:%d\n", __FUNCTION__, irqNum); + UINT32 irqNum = HwiNumGet(); + PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum); while (1) {} } @@ -175,7 +201,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) OsSchedUpdateSleepTime(); #endif - hwiIndex = HalIntNumGet(); + hwiIndex = HwiNumGet(); OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex); @@ -237,7 +263,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, #else OsSetVector(hwiNum, handler); #endif - OS_INT_ENABLE(hwiNum); + HwiUnmask(hwiNum); LOS_IntRestore(intSave); return LOS_OK; @@ -258,7 +284,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum) return OS_ERRNO_HWI_NUM_INVALID; } - OS_INT_DISABLE(hwiNum); + HwiMask(hwiNum); intSave = LOS_IntLock(); g_hwiForm[hwiNum + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalHwiDefaultHandler; diff --git a/arch/arm/cortex-m3/keil/los_arch_interrupt.h b/arch/arm/cortex-m3/keil/los_arch_interrupt.h index 2f0c67ea..665a7a96 100644 --- a/arch/arm/cortex-m3/keil/los_arch_interrupt.h +++ b/arch/arm/cortex-m3/keil/los_arch_interrupt.h @@ -109,7 +109,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000900 * - * Solution: Ensure that the interrupt number is valid. The value range of the interrupt number applicable for a Cortex-A7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX]. + * Solution: Ensure that the interrupt number is valid. + * The value range of the interrupt number applicable for a Cortex-M3 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX]. */ #define OS_ERRNO_HWI_NUM_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00) @@ -159,7 +160,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000905 * - * Solution: Ensure that the interrupt priority is valid. The value range of the interrupt priority applicable for a Cortex-A7 platform is [0,15]. + * Solution: Ensure that the interrupt priority is valid. + * The value range of the interrupt priority applicable for a Cortex-M3 platform is [0,15]. */ #define OS_ERRNO_HWI_PRIO_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05) @@ -169,7 +171,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000906 * - * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST of which the value can be 0 or 1. + * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or + * OS_HWI_MODE_FAST of which the value can be 0 or 1. */ #define OS_ERRNO_HWI_MODE_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06) @@ -342,25 +345,6 @@ extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector); */ extern VOID HalInterrupt(VOID); -/* * - * @ingroup los_arch_interrupt - * @brief: Get an interrupt number. - * - * @par Description: - * This API is used to get the current interrupt number. - * - * @attention: - * - * - * @param: None. - * - * @retval: Interrupt Indexes number. - * @par Dependency: - * - * @see None. - */ -extern UINT32 HalIntNumGet(VOID); - /* * * @ingroup los_arch_interrupt * @brief: Default vector handling function. diff --git a/arch/arm/cortex-m3/keil/los_interrupt.c b/arch/arm/cortex-m3/keil/los_interrupt.c index 76bbe4ef..5ca320fb 100644 --- a/arch/arm/cortex-m3/keil/los_interrupt.c +++ b/arch/arm/cortex-m3/keil/los_interrupt.c @@ -108,17 +108,85 @@ WEAK VOID SysTick_Handler(VOID) } /* **************************************************************************** - Function : HalIntNumGet + Function : HwiNumGet Description : Get an interrupt number Input : None Output : None Return : Interrupt Indexes number **************************************************************************** */ -LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID) +STATIC UINT32 HwiNumGet(VOID) { return __get_IPSR(); } +STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_EnableIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_DisableIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + if (priority > OS_HWI_PRIO_LOWEST) { + return OS_ERRNO_HWI_PRIO_INVALID; + } + + NVIC_SetPriority((IRQn_Type)hwiNum, priority); + + return LOS_OK; +} + +STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_SetPendingIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_ClearPendingIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +HwiControllerOps g_archHwiOps = { + .enableIrq = HwiUnmask, + .disableIrq = HwiMask, + .setIrqPriority = HwiSetPriority, + .getCurIrqNum = HwiNumGet, + .triggerIrq = HwiPending, + .clearIrq = HwiClear, +}; + inline UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); @@ -133,8 +201,8 @@ inline UINT32 ArchIsIntActive(VOID) /*lint -e529*/ LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID) { - UINT32 irqNum = HalIntNumGet(); - PRINT_ERR("%s irqnum:%d\n", __FUNCTION__, irqNum); + UINT32 irqNum = HwiNumGet(); + PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum); while (1) {} } @@ -168,7 +236,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) g_intCount++; LOS_IntRestore(intSave); - hwiIndex = HalIntNumGet(); + hwiIndex = HwiNumGet(); OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex); @@ -234,8 +302,8 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, #else OsSetVector(hwiNum, handler); #endif - NVIC_EnableIRQ((IRQn_Type)hwiNum); - NVIC_SetPriority((IRQn_Type)hwiNum, hwiPrio); + HwiUnmask((IRQn_Type)hwiNum); + HwiSetPriority((IRQn_Type)hwiNum, hwiPrio); LOS_IntRestore(intSave); @@ -257,7 +325,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum) return OS_ERRNO_HWI_NUM_INVALID; } - NVIC_DisableIRQ((IRQn_Type)hwiNum); + HwiMask((IRQn_Type)hwiNum); intSave = LOS_IntLock(); diff --git a/arch/arm/cortex-m33/gcc/NTZ/los_arch_interrupt.h b/arch/arm/cortex-m33/gcc/NTZ/los_arch_interrupt.h index 99c53032..dd9a4f22 100755 --- a/arch/arm/cortex-m33/gcc/NTZ/los_arch_interrupt.h +++ b/arch/arm/cortex-m33/gcc/NTZ/los_arch_interrupt.h @@ -109,7 +109,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000900 * - * Solution: Ensure that the interrupt number is valid. The value range of the interrupt number applicable for a Cortex-A7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX]. + * Solution: Ensure that the interrupt number is valid. + * The value range of the interrupt number applicable for a Cortex-M33 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX]. */ #define OS_ERRNO_HWI_NUM_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00) @@ -159,7 +160,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000905 * - * Solution: Ensure that the interrupt priority is valid. The value range of the interrupt priority applicable for a Cortex-A7 platform is [0,15]. + * Solution: Ensure that the interrupt priority is valid. + * The value range of the interrupt priority applicable for a Cortex-M33 platform is [0,15]. */ #define OS_ERRNO_HWI_PRIO_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05) @@ -169,7 +171,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000906 * - * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST of which the value can be 0 or 1. + * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or + * OS_HWI_MODE_FAST of which the value can be 0 or 1. */ #define OS_ERRNO_HWI_MODE_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06) @@ -342,25 +345,6 @@ extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector); */ extern VOID HalInterrupt(VOID); -/* * - * @ingroup los_arch_interrupt - * @brief: Get an interrupt number. - * - * @par Description: - * This API is used to get the current interrupt number. - * - * @attention: - * - * - * @param: None. - * - * @retval: Interrupt Indexes number. - * @par Dependency: - * - * @see None. - */ -extern UINT32 HalIntNumGet(VOID); - /* * * @ingroup los_arch_interrupt * @brief: Default vector handling function. diff --git a/arch/arm/cortex-m33/gcc/NTZ/los_interrupt.c b/arch/arm/cortex-m33/gcc/NTZ/los_interrupt.c index b908b3b5..4a3fbf76 100755 --- a/arch/arm/cortex-m33/gcc/NTZ/los_interrupt.c +++ b/arch/arm/cortex-m33/gcc/NTZ/los_interrupt.c @@ -40,6 +40,7 @@ #include "los_memory.h" #include "los_membox.h" +#define DEF_HANDLER_START_INDEX 2 /*lint -save -e40 -e522 -e533*/ UINT32 g_intCount = 0; @@ -98,17 +99,85 @@ VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector) #endif /* **************************************************************************** - Function : HalIntNumGet + Function : HwiNumGet Description : Get an interrupt number Input : None Output : None Return : Interrupt Indexes number **************************************************************************** */ -LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID) +STATIC UINT32 HwiNumGet(VOID) { return __get_IPSR(); } +STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_EnableIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_DisableIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + if (priority > OS_HWI_PRIO_LOWEST) { + return OS_ERRNO_HWI_PRIO_INVALID; + } + + NVIC_SetPriority((IRQn_Type)hwiNum, priority); + + return LOS_OK; +} + +STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_SetPendingIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_ClearPendingIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +HwiControllerOps g_archHwiOps = { + .enableIrq = HwiUnmask, + .disableIrq = HwiMask, + .setIrqPriority = HwiSetPriority, + .getCurIrqNum = HwiNumGet, + .triggerIrq = HwiPending, + .clearIrq = HwiClear, +}; + inline UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); @@ -123,8 +192,8 @@ inline UINT32 ArchIsIntActive(VOID) /*lint -e529*/ LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID) { - UINT32 irqNum = HalIntNumGet(); - PRINT_ERR("%s irqnum:%d\n", __FUNCTION__, irqNum); + UINT32 irqNum = HwiNumGet(); + PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum); while (1) {} } @@ -158,7 +227,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) g_intCount++; LOS_IntRestore(intSave); - hwiIndex = HalIntNumGet(); + hwiIndex = HwiNumGet(); OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex); @@ -224,8 +293,8 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, #else OsSetVector(hwiNum, handler); #endif - NVIC_EnableIRQ((IRQn_Type)hwiNum); - NVIC_SetPriority((IRQn_Type)hwiNum, hwiPrio); + HwiUnmask((IRQn_Type)hwiNum); + HwiSetPriority((IRQn_Type)hwiNum, hwiPrio); LOS_IntRestore(intSave); @@ -247,7 +316,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum) return OS_ERRNO_HWI_NUM_INVALID; } - NVIC_DisableIRQ((IRQn_Type)hwiNum); + HwiMask((IRQn_Type)hwiNum); intSave = LOS_IntLock(); @@ -493,7 +562,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID) UINT32 index; g_hwiForm[0] = 0; /* [0] Top of Stack */ g_hwiForm[1] = 0; /* [1] reset */ - for (index = 2; index < OS_VECTOR_CNT; index++) { + for (index = DEF_HANDLER_START_INDEX; index < OS_VECTOR_CNT; index++) { g_hwiForm[index] = (HWI_PROC_FUNC)HalHwiDefaultHandler; } /* Exception handler register */ diff --git a/arch/arm/cortex-m33/gcc/TZ/non_secure/los_arch_interrupt.h b/arch/arm/cortex-m33/gcc/TZ/non_secure/los_arch_interrupt.h index 99c53032..dd9a4f22 100755 --- a/arch/arm/cortex-m33/gcc/TZ/non_secure/los_arch_interrupt.h +++ b/arch/arm/cortex-m33/gcc/TZ/non_secure/los_arch_interrupt.h @@ -109,7 +109,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000900 * - * Solution: Ensure that the interrupt number is valid. The value range of the interrupt number applicable for a Cortex-A7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX]. + * Solution: Ensure that the interrupt number is valid. + * The value range of the interrupt number applicable for a Cortex-M33 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX]. */ #define OS_ERRNO_HWI_NUM_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00) @@ -159,7 +160,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000905 * - * Solution: Ensure that the interrupt priority is valid. The value range of the interrupt priority applicable for a Cortex-A7 platform is [0,15]. + * Solution: Ensure that the interrupt priority is valid. + * The value range of the interrupt priority applicable for a Cortex-M33 platform is [0,15]. */ #define OS_ERRNO_HWI_PRIO_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05) @@ -169,7 +171,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000906 * - * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST of which the value can be 0 or 1. + * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or + * OS_HWI_MODE_FAST of which the value can be 0 or 1. */ #define OS_ERRNO_HWI_MODE_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06) @@ -342,25 +345,6 @@ extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector); */ extern VOID HalInterrupt(VOID); -/* * - * @ingroup los_arch_interrupt - * @brief: Get an interrupt number. - * - * @par Description: - * This API is used to get the current interrupt number. - * - * @attention: - * - * - * @param: None. - * - * @retval: Interrupt Indexes number. - * @par Dependency: - * - * @see None. - */ -extern UINT32 HalIntNumGet(VOID); - /* * * @ingroup los_arch_interrupt * @brief: Default vector handling function. diff --git a/arch/arm/cortex-m33/gcc/TZ/non_secure/los_interrupt.c b/arch/arm/cortex-m33/gcc/TZ/non_secure/los_interrupt.c index b908b3b5..b033c786 100755 --- a/arch/arm/cortex-m33/gcc/TZ/non_secure/los_interrupt.c +++ b/arch/arm/cortex-m33/gcc/TZ/non_secure/los_interrupt.c @@ -40,6 +40,7 @@ #include "los_memory.h" #include "los_membox.h" +#define DEF_HANDLER_START_INDEX 2 /*lint -save -e40 -e522 -e533*/ UINT32 g_intCount = 0; @@ -98,17 +99,85 @@ VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector) #endif /* **************************************************************************** - Function : HalIntNumGet + Function : HwiNumGet Description : Get an interrupt number Input : None Output : None Return : Interrupt Indexes number **************************************************************************** */ -LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID) +STATIC UINT32 HwiNumGet(VOID) { return __get_IPSR(); } +STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_EnableIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_DisableIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + if (priority > OS_HWI_PRIO_LOWEST) { + return OS_ERRNO_HWI_PRIO_INVALID; + } + + NVIC_SetPriority((IRQn_Type)hwiNum, priority); + + return LOS_OK; +} + +STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_SetPendingIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_ClearPendingIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +HwiControllerOps g_archHwiOps = { + .enableIrq = HwiUnmask, + .disableIrq = HwiMask, + .setIrqPriority = HwiSetPriority, + .getCurIrqNum = HwiNumGet, + .triggerIrq = HwiPending, + .clearIrq = HwiClear, +}; + inline UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); @@ -123,8 +192,8 @@ inline UINT32 ArchIsIntActive(VOID) /*lint -e529*/ LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID) { - UINT32 irqNum = HalIntNumGet(); - PRINT_ERR("%s irqnum:%d\n", __FUNCTION__, irqNum); + UINT32 irqNum = HwiNumGet(); + PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum); while (1) {} } @@ -158,7 +227,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) g_intCount++; LOS_IntRestore(intSave); - hwiIndex = HalIntNumGet(); + hwiIndex = HwiNumGet(); OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex); @@ -224,8 +293,8 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, #else OsSetVector(hwiNum, handler); #endif - NVIC_EnableIRQ((IRQn_Type)hwiNum); - NVIC_SetPriority((IRQn_Type)hwiNum, hwiPrio); + HwiUnmask((IRQn_Type)hwiNum); + HwiSetPriority((IRQn_Type)hwiNum, hwiPrio); LOS_IntRestore(intSave); @@ -491,9 +560,9 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID) { #if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1) UINT32 index; - g_hwiForm[0] = 0; /* [0] Top of Stack */ + g_hwiForm[0] = 0; /* [0] Top of Stack */ g_hwiForm[1] = 0; /* [1] reset */ - for (index = 2; index < OS_VECTOR_CNT; index++) { + for (index = DEF_HANDLER_START_INDEX; index < OS_VECTOR_CNT; index++) { g_hwiForm[index] = (HWI_PROC_FUNC)HalHwiDefaultHandler; } /* Exception handler register */ diff --git a/arch/arm/cortex-m33/iar/NTZ/los_arch_interrupt.h b/arch/arm/cortex-m33/iar/NTZ/los_arch_interrupt.h index f7cab4fe..ae51bace 100644 --- a/arch/arm/cortex-m33/iar/NTZ/los_arch_interrupt.h +++ b/arch/arm/cortex-m33/iar/NTZ/los_arch_interrupt.h @@ -109,7 +109,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000900 * - * Solution: Ensure that the interrupt number is valid. The value range of the interrupt number applicable for a Cortex-A7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX]. + * Solution: Ensure that the interrupt number is valid. + * The value range of the interrupt number applicable for a Cortex-M33 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX]. */ #define OS_ERRNO_HWI_NUM_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00) @@ -159,7 +160,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000905 * - * Solution: Ensure that the interrupt priority is valid. The value range of the interrupt priority applicable for a Cortex-A7 platform is [0,15]. + * Solution: Ensure that the interrupt priority is valid. + * The value range of the interrupt priority applicable for a Cortex-M33 platform is [0,15]. */ #define OS_ERRNO_HWI_PRIO_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05) @@ -169,7 +171,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000906 * - * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST of which the value can be 0 or 1. + * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or + * OS_HWI_MODE_FAST of which the value can be 0 or 1. */ #define OS_ERRNO_HWI_MODE_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06) @@ -342,25 +345,6 @@ extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector); */ extern VOID HalInterrupt(VOID); -/* * - * @ingroup los_hwi - * @brief: Get an interrupt number. - * - * @par Description: - * This API is used to get the current interrupt number. - * - * @attention: - * - * - * @param: None. - * - * @retval: Interrupt Indexes number. - * @par Dependency: - * - * @see None. - */ -extern UINT32 HalIntNumGet(VOID); - /* * * @ingroup los_hwi * @brief: Default vector handling function. diff --git a/arch/arm/cortex-m33/iar/NTZ/los_interrupt.c b/arch/arm/cortex-m33/iar/NTZ/los_interrupt.c index d0c08d3f..1516d82a 100644 --- a/arch/arm/cortex-m33/iar/NTZ/los_interrupt.c +++ b/arch/arm/cortex-m33/iar/NTZ/los_interrupt.c @@ -105,17 +105,85 @@ WEAK VOID SysTick_Handler(VOID) } /* **************************************************************************** - Function : HalIntNumGet + Function : HwiNumGet Description : Get an interrupt number Input : None Output : None Return : Interrupt Indexes number **************************************************************************** */ -LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID) +STATIC UINT32 HwiNumGet(VOID) { return __get_IPSR(); } +STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_EnableIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_DisableIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + if (priority > OS_HWI_PRIO_LOWEST) { + return OS_ERRNO_HWI_PRIO_INVALID; + } + + NVIC_SetPriority((IRQn_Type)hwiNum, priority); + + return LOS_OK; +} + +STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_SetPendingIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_ClearPendingIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +HwiControllerOps g_archHwiOps = { + .enableIrq = HwiUnmask, + .disableIrq = HwiMask, + .setIrqPriority = HwiSetPriority, + .getCurIrqNum = HwiNumGet, + .triggerIrq = HwiPending, + .clearIrq = HwiClear, +}; + inline UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); @@ -130,8 +198,8 @@ inline UINT32 ArchIsIntActive(VOID) /*lint -e529*/ LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID) { - UINT32 irqNum = HalIntNumGet(); - PRINT_ERR("%s irqnum:%d\n", __FUNCTION__, irqNum); + UINT32 irqNum = HwiNumGet(); + PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum); while (1) {} } @@ -167,7 +235,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) LOS_IntRestore(intSave); - hwiIndex = HalIntNumGet(); + hwiIndex = HwiNumGet(); OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex); @@ -233,8 +301,8 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, #else OsSetVector(hwiNum, handler); #endif - NVIC_EnableIRQ((IRQn_Type)hwiNum); - NVIC_SetPriority((IRQn_Type)hwiNum, hwiPrio); + HwiUnmask((IRQn_Type)hwiNum); + HwiSetPriority((IRQn_Type)hwiNum, hwiPrio); LOS_IntRestore(intSave); diff --git a/arch/arm/cortex-m33/iar/TZ/non_secure/los_arch_interrupt.h b/arch/arm/cortex-m33/iar/TZ/non_secure/los_arch_interrupt.h index f7cab4fe..ae51bace 100644 --- a/arch/arm/cortex-m33/iar/TZ/non_secure/los_arch_interrupt.h +++ b/arch/arm/cortex-m33/iar/TZ/non_secure/los_arch_interrupt.h @@ -109,7 +109,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000900 * - * Solution: Ensure that the interrupt number is valid. The value range of the interrupt number applicable for a Cortex-A7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX]. + * Solution: Ensure that the interrupt number is valid. + * The value range of the interrupt number applicable for a Cortex-M33 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX]. */ #define OS_ERRNO_HWI_NUM_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00) @@ -159,7 +160,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000905 * - * Solution: Ensure that the interrupt priority is valid. The value range of the interrupt priority applicable for a Cortex-A7 platform is [0,15]. + * Solution: Ensure that the interrupt priority is valid. + * The value range of the interrupt priority applicable for a Cortex-M33 platform is [0,15]. */ #define OS_ERRNO_HWI_PRIO_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05) @@ -169,7 +171,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000906 * - * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST of which the value can be 0 or 1. + * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or + * OS_HWI_MODE_FAST of which the value can be 0 or 1. */ #define OS_ERRNO_HWI_MODE_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06) @@ -342,25 +345,6 @@ extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector); */ extern VOID HalInterrupt(VOID); -/* * - * @ingroup los_hwi - * @brief: Get an interrupt number. - * - * @par Description: - * This API is used to get the current interrupt number. - * - * @attention: - * - * - * @param: None. - * - * @retval: Interrupt Indexes number. - * @par Dependency: - * - * @see None. - */ -extern UINT32 HalIntNumGet(VOID); - /* * * @ingroup los_hwi * @brief: Default vector handling function. diff --git a/arch/arm/cortex-m33/iar/TZ/non_secure/los_interrupt.c b/arch/arm/cortex-m33/iar/TZ/non_secure/los_interrupt.c index d0c08d3f..1516d82a 100644 --- a/arch/arm/cortex-m33/iar/TZ/non_secure/los_interrupt.c +++ b/arch/arm/cortex-m33/iar/TZ/non_secure/los_interrupt.c @@ -105,17 +105,85 @@ WEAK VOID SysTick_Handler(VOID) } /* **************************************************************************** - Function : HalIntNumGet + Function : HwiNumGet Description : Get an interrupt number Input : None Output : None Return : Interrupt Indexes number **************************************************************************** */ -LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID) +STATIC UINT32 HwiNumGet(VOID) { return __get_IPSR(); } +STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_EnableIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_DisableIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + if (priority > OS_HWI_PRIO_LOWEST) { + return OS_ERRNO_HWI_PRIO_INVALID; + } + + NVIC_SetPriority((IRQn_Type)hwiNum, priority); + + return LOS_OK; +} + +STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_SetPendingIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_ClearPendingIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +HwiControllerOps g_archHwiOps = { + .enableIrq = HwiUnmask, + .disableIrq = HwiMask, + .setIrqPriority = HwiSetPriority, + .getCurIrqNum = HwiNumGet, + .triggerIrq = HwiPending, + .clearIrq = HwiClear, +}; + inline UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); @@ -130,8 +198,8 @@ inline UINT32 ArchIsIntActive(VOID) /*lint -e529*/ LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID) { - UINT32 irqNum = HalIntNumGet(); - PRINT_ERR("%s irqnum:%d\n", __FUNCTION__, irqNum); + UINT32 irqNum = HwiNumGet(); + PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum); while (1) {} } @@ -167,7 +235,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) LOS_IntRestore(intSave); - hwiIndex = HalIntNumGet(); + hwiIndex = HwiNumGet(); OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex); @@ -233,8 +301,8 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, #else OsSetVector(hwiNum, handler); #endif - NVIC_EnableIRQ((IRQn_Type)hwiNum); - NVIC_SetPriority((IRQn_Type)hwiNum, hwiPrio); + HwiUnmask((IRQn_Type)hwiNum); + HwiSetPriority((IRQn_Type)hwiNum, hwiPrio); LOS_IntRestore(intSave); diff --git a/arch/arm/cortex-m4/gcc/los_arch_interrupt.h b/arch/arm/cortex-m4/gcc/los_arch_interrupt.h index 5ac9ecc0..326b72f2 100644 --- a/arch/arm/cortex-m4/gcc/los_arch_interrupt.h +++ b/arch/arm/cortex-m4/gcc/los_arch_interrupt.h @@ -109,7 +109,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000900 * - * Solution: Ensure that the interrupt number is valid. The value range of the interrupt number applicable for a Cortex-A7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX]. + * Solution: Ensure that the interrupt number is valid. + * The value range of the interrupt number applicable for a Cortex-M4 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX]. */ #define OS_ERRNO_HWI_NUM_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00) @@ -159,7 +160,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000905 * - * Solution: Ensure that the interrupt priority is valid. The value range of the interrupt priority applicable for a Cortex-A7 platform is [0,15]. + * Solution: Ensure that the interrupt priority is valid. + * The value range of the interrupt priority applicable for a Cortex-M4 platform is [0,15]. */ #define OS_ERRNO_HWI_PRIO_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05) @@ -169,7 +171,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000906 * - * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST of which the value can be 0 or 1. + * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or + * OS_HWI_MODE_FAST of which the value can be 0 or 1. */ #define OS_ERRNO_HWI_MODE_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06) @@ -342,25 +345,6 @@ extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector); */ extern VOID HalInterrupt(VOID); -/* * - * @ingroup los_arch_interrupt - * @brief: Get an interrupt number. - * - * @par Description: - * This API is used to get the current interrupt number. - * - * @attention: - * - * - * @param: None. - * - * @retval: Interrupt Indexes number. - * @par Dependency: - * - * @see None. - */ -extern UINT32 HalIntNumGet(VOID); - /* * * @ingroup los_arch_interrupt * @brief: Default vector handling function. diff --git a/arch/arm/cortex-m4/gcc/los_interrupt.c b/arch/arm/cortex-m4/gcc/los_interrupt.c index e256fa8c..d87516ce 100644 --- a/arch/arm/cortex-m4/gcc/los_interrupt.c +++ b/arch/arm/cortex-m4/gcc/los_interrupt.c @@ -103,17 +103,85 @@ WEAK VOID SysTick_Handler(VOID) } /* **************************************************************************** - Function : HalIntNumGet + Function : HwiNumGet Description : Get an interrupt number Input : None Output : None Return : Interrupt Indexes number **************************************************************************** */ -LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID) +STATIC UINT32 HwiNumGet(VOID) { return __get_IPSR(); } +STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_EnableIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_DisableIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + if (priority > OS_HWI_PRIO_LOWEST) { + return OS_ERRNO_HWI_PRIO_INVALID; + } + + NVIC_SetPriority((IRQn_Type)hwiNum, priority); + + return LOS_OK; +} + +STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_SetPendingIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_ClearPendingIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +HwiControllerOps g_archHwiOps = { + .enableIrq = HwiUnmask, + .disableIrq = HwiMask, + .setIrqPriority = HwiSetPriority, + .getCurIrqNum = HwiNumGet, + .triggerIrq = HwiPending, + .clearIrq = HwiClear, +}; + inline UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); @@ -128,8 +196,8 @@ inline UINT32 ArchIsIntActive(VOID) /*lint -e529*/ LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID) { - UINT32 irqNum = HalIntNumGet(); - PRINT_ERR("%s irqnum:%d\n", __FUNCTION__, irqNum); + UINT32 irqNum = HwiNumGet(); + PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum); while (1) {} } @@ -163,7 +231,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) g_intCount++; LOS_IntRestore(intSave); - hwiIndex = HalIntNumGet(); + hwiIndex = HwiNumGet(); OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex); @@ -229,8 +297,8 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, #else OsSetVector(hwiNum, handler); #endif - NVIC_EnableIRQ((IRQn_Type)hwiNum); - NVIC_SetPriority((IRQn_Type)hwiNum, hwiPrio); + HwiUnmask((IRQn_Type)hwiNum); + HwiSetPriority((IRQn_Type)hwiNum, hwiPrio); LOS_IntRestore(intSave); @@ -252,7 +320,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum) return OS_ERRNO_HWI_NUM_INVALID; } - NVIC_DisableIRQ((IRQn_Type)hwiNum); + HwiMask((IRQn_Type)hwiNum); intSave = LOS_IntLock(); diff --git a/arch/arm/cortex-m4/iar/los_arch_interrupt.h b/arch/arm/cortex-m4/iar/los_arch_interrupt.h index 5ac9ecc0..326b72f2 100644 --- a/arch/arm/cortex-m4/iar/los_arch_interrupt.h +++ b/arch/arm/cortex-m4/iar/los_arch_interrupt.h @@ -109,7 +109,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000900 * - * Solution: Ensure that the interrupt number is valid. The value range of the interrupt number applicable for a Cortex-A7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX]. + * Solution: Ensure that the interrupt number is valid. + * The value range of the interrupt number applicable for a Cortex-M4 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX]. */ #define OS_ERRNO_HWI_NUM_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00) @@ -159,7 +160,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000905 * - * Solution: Ensure that the interrupt priority is valid. The value range of the interrupt priority applicable for a Cortex-A7 platform is [0,15]. + * Solution: Ensure that the interrupt priority is valid. + * The value range of the interrupt priority applicable for a Cortex-M4 platform is [0,15]. */ #define OS_ERRNO_HWI_PRIO_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05) @@ -169,7 +171,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000906 * - * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST of which the value can be 0 or 1. + * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or + * OS_HWI_MODE_FAST of which the value can be 0 or 1. */ #define OS_ERRNO_HWI_MODE_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06) @@ -342,25 +345,6 @@ extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector); */ extern VOID HalInterrupt(VOID); -/* * - * @ingroup los_arch_interrupt - * @brief: Get an interrupt number. - * - * @par Description: - * This API is used to get the current interrupt number. - * - * @attention: - * - * - * @param: None. - * - * @retval: Interrupt Indexes number. - * @par Dependency: - * - * @see None. - */ -extern UINT32 HalIntNumGet(VOID); - /* * * @ingroup los_arch_interrupt * @brief: Default vector handling function. diff --git a/arch/arm/cortex-m4/iar/los_interrupt.c b/arch/arm/cortex-m4/iar/los_interrupt.c index ec94ed17..8c071657 100644 --- a/arch/arm/cortex-m4/iar/los_interrupt.c +++ b/arch/arm/cortex-m4/iar/los_interrupt.c @@ -109,17 +109,85 @@ WEAK VOID SysTick_Handler(VOID) } /* **************************************************************************** - Function : HalIntNumGet + Function : HwiNumGet Description : Get an interrupt number Input : None Output : None Return : Interrupt Indexes number **************************************************************************** */ -LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID) +STATIC UINT32 HwiNumGet(VOID) { return __get_IPSR(); } +STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_EnableIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_DisableIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + if (priority > OS_HWI_PRIO_LOWEST) { + return OS_ERRNO_HWI_PRIO_INVALID; + } + + NVIC_SetPriority((IRQn_Type)hwiNum, priority); + + return LOS_OK; +} + +STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_SetPendingIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_ClearPendingIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +HwiControllerOps g_archHwiOps = { + .enableIrq = HwiUnmask, + .disableIrq = HwiMask, + .setIrqPriority = HwiSetPriority, + .getCurIrqNum = HwiNumGet, + .triggerIrq = HwiPending, + .clearIrq = HwiClear, +}; + inline UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); @@ -134,8 +202,8 @@ inline UINT32 ArchIsIntActive(VOID) /*lint -e529*/ LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID) { - UINT32 irqNum = HalIntNumGet(); - PRINT_ERR("%s irqnum:%d\n", __FUNCTION__, irqNum); + UINT32 irqNum = HwiNumGet(); + PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum); while (1) {} } @@ -169,7 +237,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) g_intCount++; LOS_IntRestore(intSave); - hwiIndex = HalIntNumGet(); + hwiIndex = HwiNumGet(); OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex); @@ -235,8 +303,8 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, #else OsSetVector(hwiNum, handler); #endif - NVIC_EnableIRQ((IRQn_Type)hwiNum); - NVIC_SetPriority((IRQn_Type)hwiNum, hwiPrio); + HwiUnmask((IRQn_Type)hwiNum); + HwiSetPriority((IRQn_Type)hwiNum, hwiPrio); LOS_IntRestore(intSave); diff --git a/arch/arm/cortex-m7/gcc/los_arch_interrupt.h b/arch/arm/cortex-m7/gcc/los_arch_interrupt.h index 2b21441c..7e8dde0e 100644 --- a/arch/arm/cortex-m7/gcc/los_arch_interrupt.h +++ b/arch/arm/cortex-m7/gcc/los_arch_interrupt.h @@ -109,7 +109,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000900 * - * Solution: Ensure that the interrupt number is valid. The value range of the interrupt number applicable for a Cortex-A7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX]. + * Solution: Ensure that the interrupt number is valid. + * The value range of the interrupt number applicable for a Cortex-M7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX]. */ #define OS_ERRNO_HWI_NUM_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00) @@ -159,7 +160,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000905 * - * Solution: Ensure that the interrupt priority is valid. The value range of the interrupt priority applicable for a Cortex-A7 platform is [0,15]. + * Solution: Ensure that the interrupt priority is valid. + * The value range of the interrupt priority applicable for a Cortex-M7 platform is [0,15]. */ #define OS_ERRNO_HWI_PRIO_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05) @@ -169,7 +171,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000906 * - * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST of which the value can be 0 or 1. + * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or + * OS_HWI_MODE_FAST of which the value can be 0 or 1. */ #define OS_ERRNO_HWI_MODE_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06) @@ -342,25 +345,6 @@ extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector); */ extern VOID HalInterrupt(VOID); -/* * - * @ingroup los_arch_interrupt - * @brief: Get an interrupt number. - * - * @par Description: - * This API is used to get the current interrupt number. - * - * @attention: - * - * - * @param: None. - * - * @retval: Interrupt Indexes number. - * @par Dependency: - * - * @see None. - */ -extern UINT32 HalIntNumGet(VOID); - /* * * @ingroup los_arch_interrupt * @brief: Default vector handling function. diff --git a/arch/arm/cortex-m7/gcc/los_interrupt.c b/arch/arm/cortex-m7/gcc/los_interrupt.c index e2b7a30e..72e7d2ab 100644 --- a/arch/arm/cortex-m7/gcc/los_interrupt.c +++ b/arch/arm/cortex-m7/gcc/los_interrupt.c @@ -98,17 +98,85 @@ VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector) #endif /* **************************************************************************** - Function : HalIntNumGet + Function : HwiNumGet Description : Get an interrupt number Input : None Output : None Return : Interrupt Indexes number **************************************************************************** */ -LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID) +STATIC UINT32 HwiNumGet(VOID) { return __get_IPSR(); } +STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_EnableIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_DisableIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + if (priority > OS_HWI_PRIO_LOWEST) { + return OS_ERRNO_HWI_PRIO_INVALID; + } + + NVIC_SetPriority((IRQn_Type)hwiNum, priority); + + return LOS_OK; +} + +STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_SetPendingIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_ClearPendingIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +HwiControllerOps g_archHwiOps = { + .enableIrq = HwiUnmask, + .disableIrq = HwiMask, + .setIrqPriority = HwiSetPriority, + .getCurIrqNum = HwiNumGet, + .triggerIrq = HwiPending, + .clearIrq = HwiClear, +}; + inline UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); @@ -123,8 +191,8 @@ inline UINT32 ArchIsIntActive(VOID) /*lint -e529*/ LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID) { - UINT32 irqNum = HalIntNumGet(); - PRINT_ERR("%s irqnum:%d\n", __FUNCTION__, irqNum); + UINT32 irqNum = HwiNumGet(); + PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum); while (1) {} } @@ -158,7 +226,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) g_intCount++; LOS_IntRestore(intSave); - hwiIndex = HalIntNumGet(); + hwiIndex = HwiNumGet(); OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex); @@ -224,8 +292,8 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, #else OsSetVector(hwiNum, handler); #endif - NVIC_EnableIRQ((IRQn_Type)hwiNum); - NVIC_SetPriority((IRQn_Type)hwiNum, hwiPrio); + HwiUnmask((IRQn_Type)hwiNum); + HwiSetPriority((IRQn_Type)hwiNum, hwiPrio); LOS_IntRestore(intSave); diff --git a/arch/arm/cortex-m7/iar/los_arch_interrupt.h b/arch/arm/cortex-m7/iar/los_arch_interrupt.h index 2b21441c..7e8dde0e 100644 --- a/arch/arm/cortex-m7/iar/los_arch_interrupt.h +++ b/arch/arm/cortex-m7/iar/los_arch_interrupt.h @@ -109,7 +109,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000900 * - * Solution: Ensure that the interrupt number is valid. The value range of the interrupt number applicable for a Cortex-A7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX]. + * Solution: Ensure that the interrupt number is valid. + * The value range of the interrupt number applicable for a Cortex-M7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX]. */ #define OS_ERRNO_HWI_NUM_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00) @@ -159,7 +160,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000905 * - * Solution: Ensure that the interrupt priority is valid. The value range of the interrupt priority applicable for a Cortex-A7 platform is [0,15]. + * Solution: Ensure that the interrupt priority is valid. + * The value range of the interrupt priority applicable for a Cortex-M7 platform is [0,15]. */ #define OS_ERRNO_HWI_PRIO_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05) @@ -169,7 +171,8 @@ extern UINT32 _BootVectors[]; * * Value: 0x02000906 * - * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST of which the value can be 0 or 1. + * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or + * OS_HWI_MODE_FAST of which the value can be 0 or 1. */ #define OS_ERRNO_HWI_MODE_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06) @@ -342,25 +345,6 @@ extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector); */ extern VOID HalInterrupt(VOID); -/* * - * @ingroup los_arch_interrupt - * @brief: Get an interrupt number. - * - * @par Description: - * This API is used to get the current interrupt number. - * - * @attention: - * - * - * @param: None. - * - * @retval: Interrupt Indexes number. - * @par Dependency: - * - * @see None. - */ -extern UINT32 HalIntNumGet(VOID); - /* * * @ingroup los_arch_interrupt * @brief: Default vector handling function. diff --git a/arch/arm/cortex-m7/iar/los_interrupt.c b/arch/arm/cortex-m7/iar/los_interrupt.c index 278b2bdc..2c0613f7 100644 --- a/arch/arm/cortex-m7/iar/los_interrupt.c +++ b/arch/arm/cortex-m7/iar/los_interrupt.c @@ -105,17 +105,85 @@ WEAK VOID SysTick_Handler(VOID) } /* **************************************************************************** - Function : HalIntNumGet + Function : HwiNumGet Description : Get an interrupt number Input : None Output : None Return : Interrupt Indexes number **************************************************************************** */ -LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID) +STATIC UINT32 HwiNumGet(VOID) { return __get_IPSR(); } +STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_EnableIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_DisableIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + if (priority > OS_HWI_PRIO_LOWEST) { + return OS_ERRNO_HWI_PRIO_INVALID; + } + + NVIC_SetPriority((IRQn_Type)hwiNum, priority); + + return LOS_OK; +} + +STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_SetPendingIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + NVIC_ClearPendingIRQ((IRQn_Type)hwiNum); + + return LOS_OK; +} + +HwiControllerOps g_archHwiOps = { + .enableIrq = HwiUnmask, + .disableIrq = HwiMask, + .setIrqPriority = HwiSetPriority, + .getCurIrqNum = HwiNumGet, + .triggerIrq = HwiPending, + .clearIrq = HwiClear, +}; + inline UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); @@ -130,8 +198,8 @@ inline UINT32 ArchIsIntActive(VOID) /*lint -e529*/ LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID) { - UINT32 irqNum = HalIntNumGet(); - PRINT_ERR("%s irqnum:%d\n", __FUNCTION__, irqNum); + UINT32 irqNum = HwiNumGet(); + PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum); while (1) {} } @@ -165,7 +233,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) g_intCount++; LOS_IntRestore(intSave); - hwiIndex = HalIntNumGet(); + hwiIndex = HwiNumGet(); OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex); @@ -231,8 +299,8 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, #else OsSetVector(hwiNum, handler); #endif - NVIC_EnableIRQ((IRQn_Type)hwiNum); - NVIC_SetPriority((IRQn_Type)hwiNum, hwiPrio); + HwiUnmask((IRQn_Type)hwiNum); + HwiSetPriority((IRQn_Type)hwiNum, hwiPrio); LOS_IntRestore(intSave); diff --git a/arch/csky/v2/gcc/los_arch_interrupt.h b/arch/csky/v2/gcc/los_arch_interrupt.h index 1cb4c359..c9db621a 100644 --- a/arch/csky/v2/gcc/los_arch_interrupt.h +++ b/arch/csky/v2/gcc/los_arch_interrupt.h @@ -251,25 +251,6 @@ extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector); */ extern VOID HalInterrupt(VOID); -/* * - * @ingroup los_arch_interrupt - * @brief: Get an interrupt number. - * - * @par Description: - * This API is used to get the current interrupt number. - * - * @attention: - * - * - * @param: None. - * - * @retval: Interrupt Indexes number. - * @par Dependency: - * - * @see None. - */ -extern UINT32 HalIntNumGet(VOID); - /* * * @ingroup los_arch_interrupt * @brief: Default vector handling function. diff --git a/arch/csky/v2/gcc/los_interrupt.c b/arch/csky/v2/gcc/los_interrupt.c index c9280ca5..43786da3 100644 --- a/arch/csky/v2/gcc/los_interrupt.c +++ b/arch/csky/v2/gcc/los_interrupt.c @@ -117,64 +117,79 @@ UINT32 ArchIntLocked(VOID) return !(intSave & (1 << INT_OFFSET)); } -UINT32 HalIrqUnmask(UINT32 hwiNum) +STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum) { UINT32 intSave; + if (!HwiNumValid(hwiNum)) { return LOS_ERRNO_HWI_NUM_INVALID; } + intSave = LOS_IntLock(); VIC_REG->ISER[hwiNum / OS_SYS_VECTOR_CNT] = (UINT32)(1UL << (hwiNum % OS_SYS_VECTOR_CNT)); VIC_REG->ISSR[hwiNum / OS_SYS_VECTOR_CNT] = (UINT32)(1UL << (hwiNum % OS_SYS_VECTOR_CNT)); LOS_IntRestore(intSave); + return LOS_OK; } -UINT32 HalIrqSetPriority(UINT32 hwiNum, UINT8 priority) +STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority) { UINT32 intSave; + if (!HwiNumValid(hwiNum)) { return LOS_ERRNO_HWI_NUM_INVALID; } + if (!HWI_PRI_VALID(priority)) { return OS_ERRNO_HWI_PRIO_INVALID; } + intSave = LOS_IntLock(); VIC_REG->IPR[hwiNum / PRI_PER_REG] |= (((priority << PRI_OFF_IN_REG) << (hwiNum % PRI_PER_REG)) * PRI_OFF_PER_INT); LOS_IntRestore(intSave); + return LOS_OK; } -UINT32 HalIrqMask(HWI_HANDLE_T hwiNum) +STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum) { UINT32 intSave; + if (!HwiNumValid(hwiNum)) { return LOS_ERRNO_HWI_NUM_INVALID; } + intSave = LOS_IntLock(); VIC_REG->ICER[hwiNum / OS_SYS_VECTOR_CNT] = (UINT32)(1UL << (hwiNum % OS_SYS_VECTOR_CNT)); LOS_IntRestore(intSave); + return LOS_OK; } -UINT32 HalIrqPending(UINT32 hwiNum) +STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum) { UINT32 intSave; + if (!HwiNumValid(hwiNum)) { return LOS_ERRNO_HWI_NUM_INVALID; } + intSave = LOS_IntLock(); VIC_REG->ISPR[hwiNum / OS_SYS_VECTOR_CNT] = (UINT32)(1UL << (hwiNum % OS_SYS_VECTOR_CNT)); LOS_IntRestore(intSave); + return LOS_OK; } -UINT32 HalIrqClear(UINT32 hwiNum) +STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum) { if (!HwiNumValid(hwiNum)) { return LOS_ERRNO_HWI_NUM_INVALID; } + VIC_REG->ICPR[hwiNum / OS_SYS_VECTOR_CNT] = (UINT32)(1UL << (hwiNum % OS_SYS_VECTOR_CNT)); + return LOS_OK; } @@ -207,7 +222,7 @@ VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector, VOID *arg) g_hwiForm[num + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)IrqEntry; g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pfnHandler = vector; g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pParm = arg; - HalIrqUnmask(num); + HwiUnmask(num); } } @@ -227,23 +242,32 @@ VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector) if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) { g_hwiForm[num + OS_SYS_VECTOR_CNT] = IrqEntry; g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT] = vector; - HalIrqUnmask(num); + HwiUnmask(num); } } #endif /* **************************************************************************** - Function : HalIntNumGet + Function : HwiNumGet Description : Get an interrupt number Input : None Output : None Return : Interrupt Indexes number **************************************************************************** */ -LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID) +STATIC UINT32 HwiNumGet(VOID) { return HalGetPsr(); } +HwiControllerOps g_archHwiOps = { + .triggerIrq = HwiPending, + .enableIrq = HwiUnmask, + .disableIrq = HwiMask, + .setIrqPriority = HwiSetPriority, + .getCurIrqNum = HwiNumGet, + .clearIrq = HwiClear, +}; + inline UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); @@ -258,7 +282,7 @@ inline UINT32 ArchIsIntActive(VOID) **************************************************************************** */ LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID) { - UINT32 irqNum = HalIntNumGet(); + UINT32 irqNum = HwiNumGet(); irqNum = (irqNum >> PSR_VEC_OFFSET) & MASK_8_BITS; PRINT_ERR("%s irqnum:%x\n", __FUNCTION__, irqNum); while (1) {} @@ -290,7 +314,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) g_intCount++; LOS_IntRestore(intSave); - hwiIndex = HalIntNumGet(); + hwiIndex = HwiNumGet(); hwiIndex = (hwiIndex >> PSR_VEC_OFFSET) & MASK_8_BITS; OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex); @@ -355,8 +379,8 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, #else OsSetVector(hwiNum, handler); #endif - HalIrqUnmask(hwiNum); - (VOID)HalIrqSetPriority(hwiNum, (UINT8)hwiPrio); + HwiUnmask(hwiNum); + (VOID)HwiSetPriority(hwiNum, (UINT8)hwiPrio); LOS_IntRestore(intSave); return LOS_OK; @@ -376,7 +400,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum) if (hwiNum >= OS_HWI_MAX_NUM) { return OS_ERRNO_HWI_NUM_INVALID; } - HalIrqMask(hwiNum); + HwiMask(hwiNum); intSave = LOS_IntLock(); g_hwiHandlerForm[hwiNum + OS_SYS_VECTOR_CNT] = 0; LOS_IntRestore(intSave); diff --git a/arch/include/los_interrupt.h b/arch/include/los_interrupt.h index 06daa6ce..a9208ef1 100644 --- a/arch/include/los_interrupt.h +++ b/arch/include/los_interrupt.h @@ -54,6 +54,17 @@ typedef VOID (*HWI_PROC_FUNC)(VOID *parm); typedef VOID (*HWI_PROC_FUNC)(void); #endif +typedef struct { + UINT32 (*triggerIrq)(HWI_HANDLE_T hwiNum); + UINT32 (*clearIrq)(HWI_HANDLE_T hwiNum); + UINT32 (*enableIrq)(HWI_HANDLE_T hwiNum); + UINT32 (*disableIrq)(HWI_HANDLE_T hwiNum); + UINT32 (*setIrqPriority)(HWI_HANDLE_T hwiNum, UINT8 priority); + UINT32 (*getCurIrqNum)(VOID); +} HwiControllerOps; + +extern HwiControllerOps g_archHwiOps; + /* stack protector */ extern UINT32 __stack_chk_guard; @@ -64,6 +75,11 @@ UINT32 ArchIsIntActive(VOID); #define OS_INT_INACTIVE (!(OS_INT_ACTIVE)) #define LOS_HwiCreate ArchHwiCreate #define LOS_HwiDelete ArchHwiDelete +#define LOS_HwiTrigger ArchIntTrigger +#define LOS_HwiEnable ArchIntEnable +#define LOS_HwiDisable ArchIntDisable +#define LOS_HwiClear ArchIntClear +#define LOS_HwiSetPriority ArchIntSetPriority UINT32 ArchIntLock(VOID); #define LOS_IntLock ArchIntLock @@ -74,6 +90,8 @@ VOID ArchIntRestore(UINT32 intSave); UINT32 ArchIntUnLock(VOID); #define LOS_IntUnLock ArchIntUnLock +#define LOS_HwiOpsGet ArchIntOpsGet + /** * @ingroup los_interrupt * @brief Delete hardware interrupt. @@ -135,6 +153,51 @@ UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, HWI_PROC_FUNC handler, HWI_ARG_T arg); +STATIC INLINE UINT32 ArchIntTrigger(HWI_HANDLE_T hwiNum) +{ + if (g_archHwiOps.triggerIrq == NULL) { + return LOS_NOK; + } + return g_archHwiOps.triggerIrq(hwiNum); +} + +STATIC INLINE UINT32 ArchIntEnable(HWI_HANDLE_T hwiNum) +{ + if (g_archHwiOps.enableIrq == NULL) { + return LOS_NOK; + } + return g_archHwiOps.enableIrq(hwiNum); +} + +STATIC INLINE UINT32 ArchIntDisable(HWI_HANDLE_T hwiNum) +{ + if (g_archHwiOps.disableIrq == NULL) { + return LOS_NOK; + } + return g_archHwiOps.disableIrq(hwiNum); +} + +STATIC INLINE UINT32 ArchIntClear(HWI_HANDLE_T hwiNum) +{ + if (g_archHwiOps.clearIrq == NULL) { + return LOS_NOK; + } + return g_archHwiOps.clearIrq(hwiNum); +} + +STATIC INLINE UINT32 ArchIntSetPriority(HWI_HANDLE_T hwiNum, HWI_PRIOR_T priority) +{ + if (g_archHwiOps.setIrqPriority == NULL) { + return LOS_NOK; + } + return g_archHwiOps.setIrqPriority(hwiNum, priority); +} + +STATIC INLINE HwiControllerOps *ArchIntOpsGet(VOID) +{ + return &g_archHwiOps; +} + #ifdef __cplusplus #if __cplusplus } diff --git a/arch/risc-v/nuclei/gcc/los_interrupt.c b/arch/risc-v/nuclei/gcc/los_interrupt.c index e5cddd62..1644ace0 100644 --- a/arch/risc-v/nuclei/gcc/los_interrupt.c +++ b/arch/risc-v/nuclei/gcc/los_interrupt.c @@ -39,7 +39,43 @@ UINT32 g_intCount = 0; -// LosExcInfo g_excInfo; +STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + ECLIC_EnableIRQ(hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + ECLIC_DisableIRQ(hwiNum); + + return LOS_OK; +} + +STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority) +{ + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + if (priority > OS_HWI_PRIO_HIGHEST || priority < OS_HWI_PRIO_LOWEST) { + return OS_ERRNO_HWI_PRIO_INVALID; + } + + ECLIC_SetPriorityIRQ(hwiNum, (hwiPrio & 0xffff)); + + return LOS_OK; +} + LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID) { // already setup interrupt vectors @@ -59,11 +95,11 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID) Output : None Return : LOS_OK on success or error code on failure *****************************************************************************/ - UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, - HWI_PRIOR_T hwiPrio, - HWI_MODE_T mode, - HWI_PROC_FUNC handler, - HWI_ARG_T arg) +UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, + HWI_PRIOR_T hwiPrio, + HWI_MODE_T mode, + HWI_PROC_FUNC handler, + HWI_ARG_T arg) { if (hwiNum > SOC_INT_MAX) { return OS_ERRNO_HWI_NUM_INVALID; @@ -93,7 +129,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID) ECLIC_SetVector(hwiNum, (rv_csr_t)handler); } /* enable interrupt */ - ECLIC_EnableIRQ(hwiNum); + HwiUnmask(hwiNum); return LOS_OK; } @@ -108,7 +144,7 @@ LITE_OS_SEC_TEXT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum) // change func to default func ECLIC_SetVector(hwiNum, (rv_csr_t)HalHwiDefaultHandler); // disable interrupt - ECLIC_DisableIRQ(hwiNum); + HwiMask(hwiNum); return LOS_OK; } @@ -182,3 +218,8 @@ __attribute__((always_inline)) inline UINT32 ArchIsIntActive(VOID) return (g_intCount > 0); } +const HwiControllerOps g_archHwiOps = { + .enableIrq = HwiUnmask, + .disableIrq = HwiMask, + .setIrqPriority = HwiSetPriority, +}; diff --git a/arch/xtensa/lx6/gcc/los_arch_interrupt.h b/arch/xtensa/lx6/gcc/los_arch_interrupt.h index 71bf22db..8f6831e5 100644 --- a/arch/xtensa/lx6/gcc/los_arch_interrupt.h +++ b/arch/xtensa/lx6/gcc/los_arch_interrupt.h @@ -214,7 +214,6 @@ extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector); #endif VOID HalInterrupt(VOID); -UINT32 HalIntNumGet(VOID); VOID HalHwiDefaultHandler(VOID); VOID HalExcHandleEntry(UINTPTR faultAddr, EXC_CONTEXT_S *excBufAddr, UINT32 type); VOID HalHwiInit(VOID); diff --git a/arch/xtensa/lx6/gcc/los_interrupt.c b/arch/xtensa/lx6/gcc/los_interrupt.c index 2237dd86..3032cccc 100644 --- a/arch/xtensa/lx6/gcc/los_interrupt.c +++ b/arch/xtensa/lx6/gcc/los_interrupt.c @@ -142,6 +142,7 @@ UINT32 ArchIntUnLock(VOID) STATIC INLINE UINT32 ArchIntLocked(VOID) { UINT32 intSave; + __asm__ volatile("rsr %0, ps " : "=r"(intSave) : : "memory"); return (intSave & SPREG_PS_DI_MASK); @@ -151,7 +152,7 @@ STATIC INLINE UINT32 ArchIntLocked(VOID) * @ingroup los_hwi * Trigger the interrupt */ -UINT32 HalIrqPending(HWI_HANDLE_T hwiNum) +STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum) { if (!HwiNumValid(hwiNum)) { return OS_ERRNO_HWI_NUM_INVALID; @@ -162,11 +163,7 @@ UINT32 HalIrqPending(HWI_HANDLE_T hwiNum) return LOS_OK; } -/* * - * @ingroup los_hwi - * Unmask the interrupt - */ -UINT32 HalIrqUnmask(HWI_HANDLE_T hwiNum) +UINT32 HwiUnmask(HWI_HANDLE_T hwiNum) { UINT32 ier; @@ -180,11 +177,7 @@ UINT32 HalIrqUnmask(HWI_HANDLE_T hwiNum) return LOS_OK; } -/* * - * @ingroup los_hwi - * Mask the interrupt - */ -UINT32 HalIrqMask(HWI_HANDLE_T hwiNum) +UINT32 HwiMask(HWI_HANDLE_T hwiNum) { UINT32 ier; @@ -199,13 +192,13 @@ UINT32 HalIrqMask(HWI_HANDLE_T hwiNum) } /* **************************************************************************** - Function : HalIntNumGet + Function : HwiNumGet Description : Get an interrupt number Input : None Output : None Return : Interrupt Indexes number **************************************************************************** */ -UINT32 HalIntNumGet(VOID) +STATIC UINT32 HwiNumGet(VOID) { UINT32 ier; UINT32 intenable; @@ -223,7 +216,7 @@ UINT32 HalIntNumGet(VOID) * @ingroup los_hwi * Clear the interrupt */ -UINT32 HalIrqClear(HWI_HANDLE_T vector) +STATIC UINT32 HwiClear(HWI_HANDLE_T vector) { if (!HwiNumValid(vector)) { return OS_ERRNO_HWI_NUM_INVALID; @@ -234,6 +227,14 @@ UINT32 HalIrqClear(HWI_HANDLE_T vector) return LOS_OK; } +HwiControllerOps g_archHwiOps = { + .triggerIrq = HwiPending, + .enableIrq = HwiUnmask, + .disableIrq = HwiMask, + .getCurIrqNum = HwiNumGet, + .clearIrq = HwiClear, +}; + INLINE UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); @@ -248,8 +249,8 @@ INLINE UINT32 ArchIsIntActive(VOID) **************************************************************************** */ VOID HalHwiDefaultHandler(VOID) { - UINT32 irqNum = HalIntNumGet(); - PRINT_ERR("%s irqnum:%d\n", __FUNCTION__, irqNum); + UINT32 irqNum = HwiNumGet(); + PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum); while (1) {} } @@ -279,8 +280,8 @@ VOID HalInterrupt(VOID) g_intCount++; LOS_IntRestore(intSave); - hwiIndex = HalIntNumGet(); - HalIrqClear(hwiIndex); + hwiIndex = HwiNumGet(); + HwiClear(hwiIndex); OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex); @@ -347,7 +348,7 @@ UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, #else OsSetVector(hwiNum, handler); #endif - HalIrqUnmask(hwiNum); + HwiUnmask(hwiNum); LOS_IntRestore(intSave); @@ -369,7 +370,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum) return OS_ERRNO_HWI_NUM_INVALID; } - HalIrqMask(hwiNum); + HwiMask(hwiNum); intSave = LOS_IntLock(); @@ -514,9 +515,9 @@ VOID HalExcHandleEntry(UINTPTR faultAddr, EXC_CONTEXT_S *excBufAddr, UINT32 type if ((taskCB == NULL) || (taskCB == OS_TCB_FROM_TID(g_taskMaxNum))) { g_excInfo.phase = OS_EXC_IN_INIT; g_excInfo.thrdPid = OS_NULL_INT; - } else if (HalIntNumGet() != OS_NULL_INT) { + } else if (HwiNumGet() != OS_NULL_INT) { g_excInfo.phase = OS_EXC_IN_HWI; - g_excInfo.thrdPid = HalIntNumGet(); + g_excInfo.thrdPid = HwiNumGet(); } else { g_excInfo.phase = OS_EXC_IN_TASK; g_excInfo.thrdPid = g_losTask.runTask->taskID; @@ -551,7 +552,7 @@ VOID HalHwiInit(VOID) EnableExceptionInterface(); for (UINT32 i = 0; i < OS_HWI_MAX_NUM; i++) { g_hwiForm[i + OS_SYS_VECTOR_CNT] = HalHwiDefaultHandler; - HalIrqMask(i); + HwiMask(i); } asm volatile ("wsr %0, vecbase" : : "r"(INIT_VECTOR_START)); return; diff --git a/arch/xtensa/lx6/gcc/los_timer.c b/arch/xtensa/lx6/gcc/los_timer.c index edcbe5b4..5b1944fb 100644 --- a/arch/xtensa/lx6/gcc/los_timer.c +++ b/arch/xtensa/lx6/gcc/los_timer.c @@ -73,7 +73,7 @@ STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler) __asm__ __volatile__("wsr %0, ccompare1; rsync" : : "a"(0)); __asm__ __volatile__("wsr %0, ccompare2; rsync" : : "a"(0)); - HalIrqUnmask(tick->irqNum); + HwiUnmask(tick->irqNum); return LOS_OK; } @@ -109,12 +109,12 @@ STATIC UINT64 SysTickCycleGet(UINT32 *period) STATIC VOID SysTickLock(VOID) { - HalIrqMask(OS_TICK_INT_NUM); + HwiMask(OS_TICK_INT_NUM); } STATIC VOID SysTickUnlock(VOID) { - HalIrqUnmask(OS_TICK_INT_NUM); + HwiUnmask(OS_TICK_INT_NUM); } ArchTickTimer *ArchSysTickTimerGet(VOID) diff --git a/testsuites/src/osTest.c b/testsuites/src/osTest.c index 05b580cb..4b634cfa 100644 --- a/testsuites/src/osTest.c +++ b/testsuites/src/osTest.c @@ -299,16 +299,12 @@ UINT64 LosCpuCycleGet(VOID) #define HWI_BIT 2 VOID TestHwiTrigger(UINT32 hwiNum) { -#if defined(__CSKY_V2__) || defined(__XTENSA_LX6__) - HalIrqPending(hwiNum); -#else - *(volatile UINT32 *)(OS_NVIC_SETPEND + ((hwiNum >> HWI_SHIFT_NUM) << HWI_BIT)) = 1 << (hwiNum & 0x1F); -#endif + LOS_HwiTrigger(hwiNum); } VOID TestHwiUnTrigger(UINT32 hwiNum) { - *(volatile UINT32 *)(OS_NVIC_CLRPEND + ((hwiNum >> HWI_SHIFT_NUM) << HWI_BIT)) = 1 << (hwiNum & 0x1F); + LOS_HwiClear(hwiNum); } #define OS_NVIC_CLRENA_BASE 0xE000E180 #define NVIC_CLR_IRQ(uwHwiNum) \ -- GitLab