1. 22 6月, 2013 1 次提交
    • V
      ARC: pt_regs update #1: Align pt_regs end with end of kernel stack page · 283237a0
      Vineet Gupta 提交于
      Historically, pt_regs would end at offset of 1 word from end of stack
      page.
      
              -----------------  -> START of page (task->stack)
              |               |
              | thread_info   |
              -----------------
              |               |
         ^    ~               ~
         |    ~               ~
         |    |               |
         |    |               | <---- pt_regs used to END here
              -----------------
              | 1 word GUTTER |
              ----------------- -> End of page (START of kernel stack)
      
      This required special "one-off" considerations in low level code.
      
      The root cause is very likely assumption of "empty" SP by the original
      ARC kernel hackers, despite ARC700 always been "full" SP.
      
      So finally RIP one word gutter !
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      283237a0
  2. 16 2月, 2013 2 次提交
    • V
      ARC: SMP support · 41195d23
      Vineet Gupta 提交于
      ARC common code to enable a SMP system + ISS provided SMP extensions.
      
      ARC700 natively lacks SMP support, hence some of the core features are
      are only enabled if SoCs have the necessary h/w pixie-dust. This
      includes:
      -Inter Processor Interrupts (IPI)
      -Cache coherency
      -load-locked/store-conditional
      ...
      
      The low level exception handling would be completely broken in SMP
      because we don't have hardware assisted stack switching. Thus a fair bit
      of this code is repurposing the MMU_SCRATCH reg for event handler
      prologues to keep them re-entrant.
      
      Many thanks to Rajeshwar Ranga for his initial "major" contributions to
      SMP Port (back in 2008), and to Noam Camus and Gilad Ben-Yossef for help
      with resurrecting that in 3.2 kernel (2012).
      
      Note that this platform code is again singleton design pattern - so
      multiple SMP platforms won't build at the moment - this deficiency is
      addressed in subsequent patches within this series.
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Rajeshwar Ranga <rajeshwar.ranga@gmail.com>
      Cc: Noam Camus <noamc@ezchip.com>
      Cc: Gilad Ben-Yossef <gilad@benyossef.com>
      41195d23
    • V
      ARC: [optim] Cache "current" in Register r25 · 080c3747
      Vineet Gupta 提交于
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      080c3747
  3. 11 2月, 2013 2 次提交