提交 f5a49057 编写于 作者: P Peter Chen 提交者: Shawn Guo

ARM: imx6: add missing BM_CLPCR_BYP_MMDC_CH0_LPM_HS setting for imx6ul

There is a missing BM_CLPCR_BYP_MMDC_CH0_LPM_HS setting for imx6ul,
without it, the "standby" mode can't work well, the system can't be
resumed.

With this commit, the "standby" mode works well.
Signed-off-by: NPeter Chen <peter.chen@nxp.com>
Cc: Anson Huang <anson.huang@nxp.com>
Cc: <stable@vger.kernel.org>
Fixes: ee4a5f83 ("ARM: imx: add suspend/resume support for i.mx6ul")
Signed-off-by: NShawn Guo <shawnguo@kernel.org>
上级 b9700be5
...@@ -295,7 +295,7 @@ int imx6_set_lpm(enum mxc_cpu_pwr_mode mode) ...@@ -295,7 +295,7 @@ int imx6_set_lpm(enum mxc_cpu_pwr_mode mode)
val &= ~BM_CLPCR_SBYOS; val &= ~BM_CLPCR_SBYOS;
if (cpu_is_imx6sl()) if (cpu_is_imx6sl())
val |= BM_CLPCR_BYPASS_PMIC_READY; val |= BM_CLPCR_BYPASS_PMIC_READY;
if (cpu_is_imx6sl() || cpu_is_imx6sx()) if (cpu_is_imx6sl() || cpu_is_imx6sx() || cpu_is_imx6ul())
val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS; val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS;
else else
val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS; val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;
......
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