提交 de97c15b 编写于 作者: B Bard Liao 提交者: Mark Brown

ASoC: rt5645: fix PLL source register definitions

Fix PLL source register definitions.
Signed-off-by: NBard Liao <bardliao@realtek.com>
Signed-off-by: NMark Brown <broonie@kernel.org>
上级 33de3d54
...@@ -1063,13 +1063,14 @@ ...@@ -1063,13 +1063,14 @@
#define RT5645_SCLK_SRC_SFT 14 #define RT5645_SCLK_SRC_SFT 14
#define RT5645_SCLK_SRC_MCLK (0x0 << 14) #define RT5645_SCLK_SRC_MCLK (0x0 << 14)
#define RT5645_SCLK_SRC_PLL1 (0x1 << 14) #define RT5645_SCLK_SRC_PLL1 (0x1 << 14)
#define RT5645_SCLK_SRC_RCCLK (0x2 << 14) /* 15MHz */ #define RT5645_SCLK_SRC_RCCLK (0x2 << 14)
#define RT5645_PLL1_SRC_MASK (0x3 << 12) #define RT5645_PLL1_SRC_MASK (0x7 << 11)
#define RT5645_PLL1_SRC_SFT 12 #define RT5645_PLL1_SRC_SFT 11
#define RT5645_PLL1_SRC_MCLK (0x0 << 12) #define RT5645_PLL1_SRC_MCLK (0x0 << 11)
#define RT5645_PLL1_SRC_BCLK1 (0x1 << 12) #define RT5645_PLL1_SRC_BCLK1 (0x1 << 11)
#define RT5645_PLL1_SRC_BCLK2 (0x2 << 12) #define RT5645_PLL1_SRC_BCLK2 (0x2 << 11)
#define RT5645_PLL1_SRC_BCLK3 (0x3 << 12) #define RT5645_PLL1_SRC_BCLK3 (0x3 << 11)
#define RT5645_PLL1_SRC_RCCLK (0x4 << 11)
#define RT5645_PLL1_PD_MASK (0x1 << 3) #define RT5645_PLL1_PD_MASK (0x1 << 3)
#define RT5645_PLL1_PD_SFT 3 #define RT5645_PLL1_PD_SFT 3
#define RT5645_PLL1_PD_1 (0x0 << 3) #define RT5645_PLL1_PD_1 (0x0 << 3)
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册