提交 d6c8103b 编写于 作者: B Borislav Petkov 提交者: Ingo Molnar

x86/CPU: Align CR3 defines

Align them vertically for better readability and use BIT_ULL() macro.

No functionality change.
Signed-off-by: NBorislav Petkov <bp@suse.de>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Link: http://lkml.kernel.org/r/20170821080651.4527-1-bp@alien8.deSigned-off-by: NIngo Molnar <mingo@kernel.org>
上级 ce0fa3e5
...@@ -36,7 +36,7 @@ ...@@ -36,7 +36,7 @@
/* Mask off the address space ID and SME encryption bits. */ /* Mask off the address space ID and SME encryption bits. */
#define CR3_ADDR_MASK __sme_clr(0x7FFFFFFFFFFFF000ull) #define CR3_ADDR_MASK __sme_clr(0x7FFFFFFFFFFFF000ull)
#define CR3_PCID_MASK 0xFFFull #define CR3_PCID_MASK 0xFFFull
#define CR3_NOFLUSH (1UL << 63) #define CR3_NOFLUSH BIT_ULL(63)
#else #else
/* /*
* CR3_ADDR_MASK needs at least bits 31:5 set on PAE systems, and we save * CR3_ADDR_MASK needs at least bits 31:5 set on PAE systems, and we save
......
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