diff --git a/drivers/ide/pci/aec62xx.c b/drivers/ide/pci/aec62xx.c index 253299961a14baedfb31ffd298a7d09aed4ba4bc..f6dc6c20f3afcbd28fc3a1b8efe818fe14e459f9 100644 --- a/drivers/ide/pci/aec62xx.c +++ b/drivers/ide/pci/aec62xx.c @@ -13,6 +13,8 @@ #include +#define DRV_NAME "aec62xx" + struct chipset_bus_clock_list_entry { u8 xfer_speed; u8 chipset_settings; @@ -180,8 +182,8 @@ static const struct ide_port_ops atp86x_port_ops = { }; static const struct ide_port_info aec62xx_chipsets[] __devinitdata = { - { /* 0 */ - .name = "AEC6210", + { /* 0: AEC6210 */ + .name = DRV_NAME, .init_chipset = init_chipset_aec62xx, .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, .port_ops = &atp850_port_ops, @@ -192,8 +194,9 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = { .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, .udma_mask = ATA_UDMA2, - },{ /* 1 */ - .name = "AEC6260", + }, + { /* 1: AEC6260 */ + .name = DRV_NAME, .init_chipset = init_chipset_aec62xx, .port_ops = &atp86x_port_ops, .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_NO_AUTODMA | @@ -201,8 +204,9 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = { .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, .udma_mask = ATA_UDMA4, - },{ /* 2 */ - .name = "AEC6260R", + }, + { /* 2: AEC6260R */ + .name = DRV_NAME, .init_chipset = init_chipset_aec62xx, .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, .port_ops = &atp86x_port_ops, @@ -211,8 +215,9 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = { .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, .udma_mask = ATA_UDMA4, - },{ /* 3 */ - .name = "AEC6280", + }, + { /* 3: AEC6280 */ + .name = DRV_NAME, .init_chipset = init_chipset_aec62xx, .port_ops = &atp86x_port_ops, .host_flags = IDE_HFLAG_NO_ATAPI_DMA | @@ -220,8 +225,9 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = { .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, .udma_mask = ATA_UDMA5, - },{ /* 4 */ - .name = "AEC6280R", + }, + { /* 4: AEC6280R */ + .name = DRV_NAME, .init_chipset = init_chipset_aec62xx, .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, .port_ops = &atp86x_port_ops, @@ -268,7 +274,8 @@ static int __devinit aec62xx_init_one(struct pci_dev *dev, const struct pci_devi unsigned long dma_base = pci_resource_start(dev, 4); if (inb(dma_base + 2) & 0x10) { - d.name = (idx == 4) ? "AEC6880R" : "AEC6880"; + printk(KERN_INFO DRV_NAME " %s: AEC6880%s card detected" + "\n", pci_name(dev), (idx == 4) ? "R" : ""); d.udma_mask = ATA_UDMA6; } } diff --git a/drivers/ide/pci/alim15x3.c b/drivers/ide/pci/alim15x3.c index ac171502b997d7051a7b2398667cdfb485582921..a099c4dd599d4f11d887eb99892097c596528a19 100644 --- a/drivers/ide/pci/alim15x3.c +++ b/drivers/ide/pci/alim15x3.c @@ -38,6 +38,8 @@ #include +#define DRV_NAME "alim15x3" + /* * Allow UDMA on M1543C-E chipset for WDC disks that ignore CRC checking * (this is DANGEROUS and could result in data corruption). @@ -515,7 +517,7 @@ static const struct ide_dma_ops ali_dma_ops = { }; static const struct ide_port_info ali15x3_chipset __devinitdata = { - .name = "ALI15X3", + .name = DRV_NAME, .init_chipset = init_chipset_ali15x3, .init_hwif = init_hwif_ali15x3, .init_dma = init_dma_ali15x3, diff --git a/drivers/ide/pci/amd74xx.c b/drivers/ide/pci/amd74xx.c index 2b118f80fab67dceaec091a1e7802546c4b4095b..cbf78edfe00b50d5603c204ee84531e87a1ab9ac 100644 --- a/drivers/ide/pci/amd74xx.c +++ b/drivers/ide/pci/amd74xx.c @@ -21,6 +21,8 @@ #include #include +#define DRV_NAME "amd74xx" + enum { AMD_IDE_CONFIG = 0x41, AMD_CABLE_DETECT = 0x42, @@ -204,9 +206,9 @@ static const struct ide_port_ops amd_port_ops = { IDE_HFLAG_IO_32BIT | \ IDE_HFLAG_UNMASK_IRQS) -#define DECLARE_AMD_DEV(name_str, swdma, udma) \ +#define DECLARE_AMD_DEV(swdma, udma) \ { \ - .name = name_str, \ + .name = DRV_NAME, \ .init_chipset = init_chipset_amd74xx, \ .init_hwif = init_hwif_amd74xx, \ .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, \ @@ -218,9 +220,9 @@ static const struct ide_port_ops amd_port_ops = { .udma_mask = udma, \ } -#define DECLARE_NV_DEV(name_str, udma) \ +#define DECLARE_NV_DEV(udma) \ { \ - .name = name_str, \ + .name = DRV_NAME, \ .init_chipset = init_chipset_amd74xx, \ .init_hwif = init_hwif_amd74xx, \ .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}}, \ @@ -233,31 +235,15 @@ static const struct ide_port_ops amd_port_ops = { } static const struct ide_port_info amd74xx_chipsets[] __devinitdata = { - /* 0 */ DECLARE_AMD_DEV("AMD7401", 0x00, ATA_UDMA2), - /* 1 */ DECLARE_AMD_DEV("AMD7409", ATA_SWDMA2, ATA_UDMA4), - /* 2 */ DECLARE_AMD_DEV("AMD7411", ATA_SWDMA2, ATA_UDMA5), - /* 3 */ DECLARE_AMD_DEV("AMD7441", ATA_SWDMA2, ATA_UDMA5), - /* 4 */ DECLARE_AMD_DEV("AMD8111", ATA_SWDMA2, ATA_UDMA6), - - /* 5 */ DECLARE_NV_DEV("NFORCE", ATA_UDMA5), - /* 6 */ DECLARE_NV_DEV("NFORCE2", ATA_UDMA6), - /* 7 */ DECLARE_NV_DEV("NFORCE2-U400R", ATA_UDMA6), - /* 8 */ DECLARE_NV_DEV("NFORCE2-U400R-SATA", ATA_UDMA6), - /* 9 */ DECLARE_NV_DEV("NFORCE3-150", ATA_UDMA6), - /* 10 */ DECLARE_NV_DEV("NFORCE3-250", ATA_UDMA6), - /* 11 */ DECLARE_NV_DEV("NFORCE3-250-SATA", ATA_UDMA6), - /* 12 */ DECLARE_NV_DEV("NFORCE3-250-SATA2", ATA_UDMA6), - /* 13 */ DECLARE_NV_DEV("NFORCE-CK804", ATA_UDMA6), - /* 14 */ DECLARE_NV_DEV("NFORCE-MCP04", ATA_UDMA6), - /* 15 */ DECLARE_NV_DEV("NFORCE-MCP51", ATA_UDMA6), - /* 16 */ DECLARE_NV_DEV("NFORCE-MCP55", ATA_UDMA6), - /* 17 */ DECLARE_NV_DEV("NFORCE-MCP61", ATA_UDMA6), - /* 18 */ DECLARE_NV_DEV("NFORCE-MCP65", ATA_UDMA6), - /* 19 */ DECLARE_NV_DEV("NFORCE-MCP67", ATA_UDMA6), - /* 20 */ DECLARE_NV_DEV("NFORCE-MCP73", ATA_UDMA6), - /* 21 */ DECLARE_NV_DEV("NFORCE-MCP77", ATA_UDMA6), - - /* 22 */ DECLARE_AMD_DEV("AMD5536", ATA_SWDMA2, ATA_UDMA5), + /* 0: AMD7401 */ DECLARE_AMD_DEV(0x00, ATA_UDMA2), + /* 1: AMD7409 */ DECLARE_AMD_DEV(ATA_SWDMA2, ATA_UDMA4), + /* 2: AMD7411/7441 */ DECLARE_AMD_DEV(ATA_SWDMA2, ATA_UDMA5), + /* 3: AMD8111 */ DECLARE_AMD_DEV(ATA_SWDMA2, ATA_UDMA6), + + /* 4: NFORCE */ DECLARE_NV_DEV(ATA_UDMA5), + /* 5: >= NFORCE2 */ DECLARE_NV_DEV(ATA_UDMA6), + + /* 6: AMD5536 */ DECLARE_AMD_DEV(ATA_SWDMA2, ATA_UDMA5), }; static int __devinit amd74xx_probe(struct pci_dev *dev, const struct pci_device_id *id) @@ -274,7 +260,7 @@ static int __devinit amd74xx_probe(struct pci_dev *dev, const struct pci_device_ if (dev->revision <= 7) d.swdma_mask = 0; d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX; - } else if (idx == 4) { + } else if (idx == 3) { if (dev->subsystem_vendor == PCI_VENDOR_ID_AMD && dev->subsystem_device == PCI_DEVICE_ID_AMD_SERENADE) d.udma_mask = ATA_UDMA5; @@ -308,30 +294,30 @@ static const struct pci_device_id amd74xx_pci_tbl[] = { { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_COBRA_7401), 0 }, { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_VIPER_7409), 1 }, { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_VIPER_7411), 2 }, - { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_OPUS_7441), 3 }, - { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_8111_IDE), 4 }, - { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_IDE), 5 }, - { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE), 6 }, - { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE), 7 }, + { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_OPUS_7441), 2 }, + { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_8111_IDE), 3 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_IDE), 4 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE), 5 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE), 5 }, #ifdef CONFIG_BLK_DEV_IDE_SATA - { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA), 8 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA), 5 }, #endif - { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE), 9 }, - { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE), 10 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE), 5 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE), 5 }, #ifdef CONFIG_BLK_DEV_IDE_SATA - { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA), 11 }, - { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2), 12 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA), 5 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2), 5 }, #endif - { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE), 13 }, - { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE), 14 }, - { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE), 15 }, - { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE), 16 }, - { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE), 17 }, - { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE), 18 }, - { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE), 19 }, - { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE), 20 }, - { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE), 21 }, - { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CS5536_IDE), 22 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE), 5 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE), 5 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE), 5 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE), 5 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE), 5 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE), 5 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE), 5 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE), 5 }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE), 5 }, + { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CS5536_IDE), 6 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, amd74xx_pci_tbl); diff --git a/drivers/ide/pci/atiixp.c b/drivers/ide/pci/atiixp.c index 4c49c1ba61829fd7a4d8619d4f5019cc4c74305a..332f08f43b56f4933bab37b8bf44fb787ac705e6 100644 --- a/drivers/ide/pci/atiixp.c +++ b/drivers/ide/pci/atiixp.c @@ -11,6 +11,8 @@ #include #include +#define DRV_NAME "atiixp" + #define ATIIXP_IDE_PIO_TIMING 0x40 #define ATIIXP_IDE_MDMA_TIMING 0x44 #define ATIIXP_IDE_PIO_CONTROL 0x48 @@ -137,16 +139,17 @@ static const struct ide_port_ops atiixp_port_ops = { }; static const struct ide_port_info atiixp_pci_info[] __devinitdata = { - { /* 0 */ - .name = "ATIIXP", + { /* 0: IXP200/300/400/700 */ + .name = DRV_NAME, .enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}}, .port_ops = &atiixp_port_ops, .host_flags = IDE_HFLAG_LEGACY_IRQS, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, .udma_mask = ATA_UDMA5, - },{ /* 1 */ - .name = "SB600_PATA", + }, + { /* 1: IXP600 */ + .name = DRV_NAME, .enablebits = {{0x48,0x01,0x00}, {0x00,0x00,0x00}}, .port_ops = &atiixp_port_ops, .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_LEGACY_IRQS, diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c index 0a4d194bc35f3c0630279ec81a8d38f0ede692f6..3d84debaf81fe18f54adc332e4c6ef2c800ed37e 100644 --- a/drivers/ide/pci/cmd64x.c +++ b/drivers/ide/pci/cmd64x.c @@ -19,6 +19,8 @@ #include +#define DRV_NAME "cmd64x" + #define CMD_DEBUG 0 #if CMD_DEBUG @@ -407,8 +409,8 @@ static const struct ide_dma_ops cmd648_dma_ops = { }; static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { - { /* 0 */ - .name = "CMD643", + { /* 0: CMD643 */ + .name = DRV_NAME, .init_chipset = init_chipset_cmd64x, .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}}, .port_ops = &cmd64x_port_ops, @@ -418,8 +420,9 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { .pio_mask = ATA_PIO5, .mwdma_mask = ATA_MWDMA2, .udma_mask = 0x00, /* no udma */ - },{ /* 1 */ - .name = "CMD646", + }, + { /* 1: CMD646 */ + .name = DRV_NAME, .init_chipset = init_chipset_cmd64x, .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, .chipset = ide_cmd646, @@ -429,8 +432,9 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { .pio_mask = ATA_PIO5, .mwdma_mask = ATA_MWDMA2, .udma_mask = ATA_UDMA2, - },{ /* 2 */ - .name = "CMD648", + }, + { /* 2: CMD648 */ + .name = DRV_NAME, .init_chipset = init_chipset_cmd64x, .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, .port_ops = &cmd64x_port_ops, @@ -439,8 +443,9 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { .pio_mask = ATA_PIO5, .mwdma_mask = ATA_MWDMA2, .udma_mask = ATA_UDMA4, - },{ /* 3 */ - .name = "CMD649", + }, + { /* 3: CMD649 */ + .name = DRV_NAME, .init_chipset = init_chipset_cmd64x, .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, .port_ops = &cmd64x_port_ops, diff --git a/drivers/ide/pci/cs5520.c b/drivers/ide/pci/cs5520.c index b03d8ae947e6fc10c6682d8944cae1dea4f5f4f9..c0364b287f1765124eb7b8b2ce5cfc191ec69e74 100644 --- a/drivers/ide/pci/cs5520.c +++ b/drivers/ide/pci/cs5520.c @@ -41,6 +41,8 @@ #include #include +#define DRV_NAME "cs5520" + struct pio_clocks { int address; @@ -92,18 +94,11 @@ static const struct ide_port_ops cs5520_port_ops = { .set_dma_mode = cs5520_set_dma_mode, }; -#define DECLARE_CS_DEV(name_str) \ - { \ - .name = name_str, \ - .port_ops = &cs5520_port_ops, \ - .host_flags = IDE_HFLAG_ISA_PORTS | \ - IDE_HFLAG_CS5520, \ - .pio_mask = ATA_PIO4, \ - } - -static const struct ide_port_info cyrix_chipsets[] __devinitdata = { - /* 0 */ DECLARE_CS_DEV("Cyrix 5510"), - /* 1 */ DECLARE_CS_DEV("Cyrix 5520") +static const struct ide_port_info cyrix_chipset __devinitdata = { + .name = DRV_NAME, + .port_ops = &cs5520_port_ops, + .host_flags = IDE_HFLAG_ISA_PORTS | IDE_HFLAG_CS5520, + .pio_mask = ATA_PIO4, }; /* @@ -114,7 +109,7 @@ static const struct ide_port_info cyrix_chipsets[] __devinitdata = { static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_device_id *id) { - const struct ide_port_info *d = &cyrix_chipsets[id->driver_data]; + const struct ide_port_info *d = &cyrix_chipset; hw_regs_t hw[4], *hws[] = { NULL, NULL, NULL, NULL }; ide_setup_pci_noise(dev, d); @@ -128,7 +123,8 @@ static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_devic } pci_set_master(dev); if (pci_set_dma_mask(dev, DMA_32BIT_MASK)) { - printk(KERN_WARNING "cs5520: No suitable DMA available.\n"); + printk(KERN_WARNING "%s: No suitable DMA available.\n", + d->name); return -ENODEV; } diff --git a/drivers/ide/pci/cs5530.c b/drivers/ide/pci/cs5530.c index dff345c763e5018b820397406409cc966d96a85e..5543c8677a5a2bf82e5efa76284bf253d41b2dba 100644 --- a/drivers/ide/pci/cs5530.c +++ b/drivers/ide/pci/cs5530.c @@ -22,6 +22,8 @@ #include +#define DRV_NAME "cs5530" + /* * Here are the standard PIO mode 0-4 timings for each "format". * Format-0 uses fast data reg timings, with slower command reg timings. @@ -243,7 +245,7 @@ static const struct ide_port_ops cs5530_port_ops = { }; static const struct ide_port_info cs5530_chipset __devinitdata = { - .name = "CS5530", + .name = DRV_NAME, .init_chipset = init_chipset_cs5530, .init_hwif = init_hwif_cs5530, .port_ops = &cs5530_port_ops, diff --git a/drivers/ide/pci/cs5535.c b/drivers/ide/pci/cs5535.c index a73001391536a157a1fbeeaf7d889946c393352b..f7b50cdeefa68861b261bf2bd6c9222ba13cac5b 100644 --- a/drivers/ide/pci/cs5535.c +++ b/drivers/ide/pci/cs5535.c @@ -26,6 +26,8 @@ #include #include +#define DRV_NAME "cs5535" + #define MSR_ATAC_BASE 0x51300000 #define ATAC_GLD_MSR_CAP (MSR_ATAC_BASE+0) #define ATAC_GLD_MSR_CONFIG (MSR_ATAC_BASE+0x01) @@ -169,7 +171,7 @@ static const struct ide_port_ops cs5535_port_ops = { }; static const struct ide_port_info cs5535_chipset __devinitdata = { - .name = "CS5535", + .name = DRV_NAME, .port_ops = &cs5535_port_ops, .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_POST_SET_MODE, .pio_mask = ATA_PIO4, diff --git a/drivers/ide/pci/cy82c693.c b/drivers/ide/pci/cy82c693.c index 04f268866b6d098a32939ce0f40ad3dc32d13de5..41c7f3351eb6ca52a3a52216464c6356cabbf1ae 100644 --- a/drivers/ide/pci/cy82c693.c +++ b/drivers/ide/pci/cy82c693.c @@ -48,6 +48,8 @@ #include +#define DRV_NAME "cy82c693" + /* the current version */ #define CY82_VERSION "CY82C693U driver v0.34 99-13-12 Andreas S. Krebs (akrebs@altavista.net)" @@ -398,7 +400,7 @@ static const struct ide_port_ops cy82c693_port_ops = { }; static const struct ide_port_info cy82c693_chipset __devinitdata = { - .name = "CY82C693", + .name = DRV_NAME, .init_chipset = init_chipset_cy82c693, .init_iops = init_iops_cy82c693, .port_ops = &cy82c693_port_ops, diff --git a/drivers/ide/pci/generic.c b/drivers/ide/pci/generic.c index e034e21af7fece1baad0cdda38e3f948900b3935..b07d4f4273b33d2970ceb9f2d7ea0b40af7860b0 100644 --- a/drivers/ide/pci/generic.c +++ b/drivers/ide/pci/generic.c @@ -27,6 +27,8 @@ #include #include +#define DRV_NAME "ide_pci_generic" + static int ide_generic_all; /* Set to claim all devices */ module_param_named(all_generic_ide, ide_generic_all, bool, 0444); @@ -34,9 +36,9 @@ MODULE_PARM_DESC(all_generic_ide, "IDE generic will claim all unknown PCI IDE st #define IDE_HFLAGS_UMC (IDE_HFLAG_NO_DMA | IDE_HFLAG_FORCE_LEGACY_IRQS) -#define DECLARE_GENERIC_PCI_DEV(name_str, extra_flags) \ +#define DECLARE_GENERIC_PCI_DEV(extra_flags) \ { \ - .name = name_str, \ + .name = DRV_NAME, \ .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | \ extra_flags, \ .swdma_mask = ATA_SWDMA2, \ @@ -45,10 +47,11 @@ MODULE_PARM_DESC(all_generic_ide, "IDE generic will claim all unknown PCI IDE st } static const struct ide_port_info generic_chipsets[] __devinitdata = { - /* 0 */ DECLARE_GENERIC_PCI_DEV("Unknown", 0), + /* 0: Unknown */ + DECLARE_GENERIC_PCI_DEV(0), - { /* 1 */ - .name = "NS87410", + { /* 1: NS87410 */ + .name = DRV_NAME, .enablebits = { {0x43, 0x08, 0x08}, {0x47, 0x08, 0x08} }, .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, .swdma_mask = ATA_SWDMA2, @@ -56,17 +59,15 @@ static const struct ide_port_info generic_chipsets[] __devinitdata = { .udma_mask = ATA_UDMA6, }, - /* 2 */ DECLARE_GENERIC_PCI_DEV("SAMURAI", 0), - /* 3 */ DECLARE_GENERIC_PCI_DEV("HT6565", 0), - /* 4 */ DECLARE_GENERIC_PCI_DEV("UM8673F", IDE_HFLAGS_UMC), - /* 5 */ DECLARE_GENERIC_PCI_DEV("UM8886A", IDE_HFLAGS_UMC), - /* 6 */ DECLARE_GENERIC_PCI_DEV("UM8886BF", IDE_HFLAGS_UMC), - /* 7 */ DECLARE_GENERIC_PCI_DEV("HINT_IDE", 0), - /* 8 */ DECLARE_GENERIC_PCI_DEV("VIA_IDE", IDE_HFLAG_NO_AUTODMA), - /* 9 */ DECLARE_GENERIC_PCI_DEV("OPTI621V", IDE_HFLAG_NO_AUTODMA), - - { /* 10 */ - .name = "VIA8237SATA", + /* 2: SAMURAI / HT6565 / HINT_IDE */ + DECLARE_GENERIC_PCI_DEV(0), + /* 3: UM8673F / UM8886A / UM8886BF */ + DECLARE_GENERIC_PCI_DEV(IDE_HFLAGS_UMC), + /* 4: VIA_IDE / OPTI621V / Piccolo010{2,3,5} */ + DECLARE_GENERIC_PCI_DEV(IDE_HFLAG_NO_AUTODMA), + + { /* 5: VIA8237SATA */ + .name = DRV_NAME, .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | IDE_HFLAG_OFF_BOARD, .swdma_mask = ATA_SWDMA2, @@ -74,12 +75,8 @@ static const struct ide_port_info generic_chipsets[] __devinitdata = { .udma_mask = ATA_UDMA6, }, - /* 11 */ DECLARE_GENERIC_PCI_DEV("Piccolo0102", IDE_HFLAG_NO_AUTODMA), - /* 12 */ DECLARE_GENERIC_PCI_DEV("Piccolo0103", IDE_HFLAG_NO_AUTODMA), - /* 13 */ DECLARE_GENERIC_PCI_DEV("Piccolo0105", IDE_HFLAG_NO_AUTODMA), - - { /* 14 */ - .name = "Revolution", + { /* 6: Revolution */ + .name = DRV_NAME, .host_flags = IDE_HFLAG_CLEAR_SIMPLEX | IDE_HFLAG_TRUST_BIOS_FOR_DMA | IDE_HFLAG_OFF_BOARD, @@ -147,20 +144,20 @@ static int __devinit generic_init_one(struct pci_dev *dev, const struct pci_devi static const struct pci_device_id generic_pci_tbl[] = { { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_87410), 1 }, { PCI_VDEVICE(PCTECH, PCI_DEVICE_ID_PCTECH_SAMURAI_IDE), 2 }, - { PCI_VDEVICE(HOLTEK, PCI_DEVICE_ID_HOLTEK_6565), 3 }, - { PCI_VDEVICE(UMC, PCI_DEVICE_ID_UMC_UM8673F), 4 }, - { PCI_VDEVICE(UMC, PCI_DEVICE_ID_UMC_UM8886A), 5 }, - { PCI_VDEVICE(UMC, PCI_DEVICE_ID_UMC_UM8886BF), 6 }, - { PCI_VDEVICE(HINT, PCI_DEVICE_ID_HINT_VXPROII_IDE), 7 }, - { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C561), 8 }, - { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C558), 9 }, + { PCI_VDEVICE(HOLTEK, PCI_DEVICE_ID_HOLTEK_6565), 2 }, + { PCI_VDEVICE(UMC, PCI_DEVICE_ID_UMC_UM8673F), 3 }, + { PCI_VDEVICE(UMC, PCI_DEVICE_ID_UMC_UM8886A), 3 }, + { PCI_VDEVICE(UMC, PCI_DEVICE_ID_UMC_UM8886BF), 3 }, + { PCI_VDEVICE(HINT, PCI_DEVICE_ID_HINT_VXPROII_IDE), 2 }, + { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C561), 4 }, + { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C558), 4 }, #ifdef CONFIG_BLK_DEV_IDE_SATA - { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_8237_SATA), 10 }, + { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_8237_SATA), 5 }, #endif - { PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO), 11 }, - { PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), 12 }, - { PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO_2), 13 }, - { PCI_VDEVICE(NETCELL, PCI_DEVICE_ID_REVOLUTION), 14 }, + { PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO), 4 }, + { PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), 4 }, + { PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO_2), 4 }, + { PCI_VDEVICE(NETCELL, PCI_DEVICE_ID_REVOLUTION), 6 }, /* * Must come last. If you add entries adjust * this table and generic_chipsets[] appropriately. diff --git a/drivers/ide/pci/hpt34x.c b/drivers/ide/pci/hpt34x.c index b52f8339102e75b6388f1e53aa53cd70e7a2597a..baabb4ce0d78ca049308cf7e1f1ac7d2ad34e77f 100644 --- a/drivers/ide/pci/hpt34x.c +++ b/drivers/ide/pci/hpt34x.c @@ -33,6 +33,8 @@ #include #include +#define DRV_NAME "hpt34x" + #define HPT343_DEBUG_DRIVE_INFO 0 static void hpt34x_set_mode(ide_drive_t *drive, const u8 speed) @@ -126,15 +128,15 @@ static const struct ide_port_ops hpt34x_port_ops = { IDE_HFLAG_NO_AUTODMA) static const struct ide_port_info hpt34x_chipsets[] __devinitdata = { - { /* 0 */ - .name = "HPT343", + { /* 0: HPT343 */ + .name = DRV_NAME, .init_chipset = init_chipset_hpt34x, .port_ops = &hpt34x_port_ops, .host_flags = IDE_HFLAGS_HPT34X | IDE_HFLAG_NON_BOOTABLE, .pio_mask = ATA_PIO5, }, - { /* 1 */ - .name = "HPT345", + { /* 1: HPT345 */ + .name = DRV_NAME, .init_chipset = init_chipset_hpt34x, .port_ops = &hpt34x_port_ops, .host_flags = IDE_HFLAGS_HPT34X | IDE_HFLAG_OFF_BOARD, diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c index b8004c331edb957d9d46a54122ea83f41ec7e88c..6a1c65c3be3ee2136760c6cb2e51ca87bbe7ea4f 100644 --- a/drivers/ide/pci/hpt366.c +++ b/drivers/ide/pci/hpt366.c @@ -131,6 +131,8 @@ #include #include +#define DRV_NAME "hpt366" + /* various tuning parameters */ #define HPT_RESET_STATE_ENGINE #undef HPT_DELAY_INTERRUPT @@ -1362,7 +1364,7 @@ static void __devinit hpt374_init(struct pci_dev *dev, struct pci_dev *dev2) if (dev2->irq != dev->irq) { /* FIXME: we need a core pci_set_interrupt() */ dev2->irq = dev->irq; - printk(KERN_INFO "HPT374 %s: PCI config space interrupt " + printk(KERN_INFO DRV_NAME " %s: PCI config space interrupt " "fixed\n", pci_name(dev2)); } } @@ -1398,7 +1400,7 @@ static int __devinit hpt36x_init(struct pci_dev *dev, struct pci_dev *dev2) pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin2); if (pin1 != pin2 && dev->irq == dev2->irq) { - printk(KERN_INFO "HPT36x %s: onboard version of chipset, " + printk(KERN_INFO DRV_NAME " %s: onboard version of chipset, " "pin1=%d pin2=%d\n", pci_name(dev), pin1, pin2); return 1; } @@ -1454,8 +1456,8 @@ static const struct ide_dma_ops hpt36x_dma_ops = { }; static const struct ide_port_info hpt366_chipsets[] __devinitdata = { - { /* 0 */ - .name = "HPT36x", + { /* 0: HPT36x */ + .name = DRV_NAME, .init_chipset = init_chipset_hpt366, .init_hwif = init_hwif_hpt366, .init_dma = init_dma_hpt366, @@ -1471,53 +1473,9 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { .host_flags = IDE_HFLAGS_HPT3XX | IDE_HFLAG_SINGLE, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, - },{ /* 1 */ - .name = "HPT372A", - .init_chipset = init_chipset_hpt366, - .init_hwif = init_hwif_hpt366, - .init_dma = init_dma_hpt366, - .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, - .port_ops = &hpt3xx_port_ops, - .dma_ops = &hpt37x_dma_ops, - .host_flags = IDE_HFLAGS_HPT3XX, - .pio_mask = ATA_PIO4, - .mwdma_mask = ATA_MWDMA2, - },{ /* 2 */ - .name = "HPT302", - .init_chipset = init_chipset_hpt366, - .init_hwif = init_hwif_hpt366, - .init_dma = init_dma_hpt366, - .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, - .port_ops = &hpt3xx_port_ops, - .dma_ops = &hpt37x_dma_ops, - .host_flags = IDE_HFLAGS_HPT3XX, - .pio_mask = ATA_PIO4, - .mwdma_mask = ATA_MWDMA2, - },{ /* 3 */ - .name = "HPT371", - .init_chipset = init_chipset_hpt366, - .init_hwif = init_hwif_hpt366, - .init_dma = init_dma_hpt366, - .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, - .port_ops = &hpt3xx_port_ops, - .dma_ops = &hpt37x_dma_ops, - .host_flags = IDE_HFLAGS_HPT3XX, - .pio_mask = ATA_PIO4, - .mwdma_mask = ATA_MWDMA2, - },{ /* 4 */ - .name = "HPT374", - .init_chipset = init_chipset_hpt366, - .init_hwif = init_hwif_hpt366, - .init_dma = init_dma_hpt366, - .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, - .udma_mask = ATA_UDMA5, - .port_ops = &hpt3xx_port_ops, - .dma_ops = &hpt37x_dma_ops, - .host_flags = IDE_HFLAGS_HPT3XX, - .pio_mask = ATA_PIO4, - .mwdma_mask = ATA_MWDMA2, - },{ /* 5 */ - .name = "HPT372N", + }, + { /* 1: HPT3xx */ + .name = DRV_NAME, .init_chipset = init_chipset_hpt366, .init_hwif = init_hwif_hpt366, .init_dma = init_dma_hpt366, @@ -1583,9 +1541,10 @@ static int __devinit hpt366_init_one(struct pci_dev *dev, const struct pci_devic break; } - d = hpt366_chipsets[idx]; + printk(KERN_INFO DRV_NAME ": %s chipset detected\n", info->chip_name); + + d = hpt366_chipsets[min_t(u8, idx, 1)]; - d.name = info->chip_name; d.udma_mask = info->udma_mask; /* fixup ->dma_ops for HPT370/HPT370A */ diff --git a/drivers/ide/pci/it8213.c b/drivers/ide/pci/it8213.c index 451b87fd8217785ae8d4f363f945cb10eff4cc8c..6eba8f188264be200593779bb7128490a2d3d686 100644 --- a/drivers/ide/pci/it8213.c +++ b/drivers/ide/pci/it8213.c @@ -14,6 +14,8 @@ #include #include +#define DRV_NAME "it8213" + /** * it8213_set_pio_mode - set host controller for PIO mode * @drive: drive @@ -156,7 +158,7 @@ static const struct ide_port_ops it8213_port_ops = { }; static const struct ide_port_info it8213_chipset __devinitdata = { - .name = "IT8213", + .name = DRV_NAME, .enablebits = { {0x41, 0x80, 0x80} }, .port_ops = &it8213_port_ops, .host_flags = IDE_HFLAG_SINGLE, diff --git a/drivers/ide/pci/it821x.c b/drivers/ide/pci/it821x.c index a3d8959436c59944a0219e705553062e0b1665ef..74173352741f949d0b7c1e0bff14e5c3ff065586 100644 --- a/drivers/ide/pci/it821x.c +++ b/drivers/ide/pci/it821x.c @@ -67,6 +67,8 @@ #include #include +#define DRV_NAME "it821x" + struct it821x_dev { unsigned int smart:1, /* Are we in smart raid mode */ @@ -569,7 +571,7 @@ static void __devinit init_hwif_it821x(ide_hwif_t *hwif) idev->timing10 = 1; hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA; if (idev->smart == 0) - printk(KERN_WARNING "it821x %s: revision 0x10, " + printk(KERN_WARNING DRV_NAME " %s: revision 0x10, " "workarounds activated\n", pci_name(dev)); } @@ -610,12 +612,12 @@ static unsigned int __devinit init_chipset_it821x(struct pci_dev *dev, const cha /* Force the card into bypass mode if so requested */ if (it8212_noraid) { - printk(KERN_INFO "it821x %s: forcing bypass mode\n", + printk(KERN_INFO DRV_NAME " %s: forcing bypass mode\n", pci_name(dev)); it8212_disable_raid(dev); } pci_read_config_byte(dev, 0x50, &conf); - printk(KERN_INFO "it821x %s: controller in %s mode\n", + printk(KERN_INFO DRV_NAME " %s: controller in %s mode\n", pci_name(dev), mode[conf & 1]); return 0; } @@ -629,7 +631,7 @@ static const struct ide_port_ops it821x_port_ops = { }; static const struct ide_port_info it821x_chipset __devinitdata = { - .name = "IT821X", + .name = DRV_NAME, .init_chipset = init_chipset_it821x, .init_hwif = init_hwif_it821x, .port_ops = &it821x_port_ops, @@ -652,7 +654,7 @@ static int __devinit it821x_init_one(struct pci_dev *dev, const struct pci_devic itdevs = kzalloc(2 * sizeof(*itdevs), GFP_KERNEL); if (itdevs == NULL) { - printk(KERN_ERR "it821x %s: out of memory\n", pci_name(dev)); + printk(KERN_ERR DRV_NAME " %s: out of memory\n", pci_name(dev)); return -ENOMEM; } diff --git a/drivers/ide/pci/jmicron.c b/drivers/ide/pci/jmicron.c index 39e221b076e2c6cb0c162971d1fab5e94ec021cf..545b6e172d9bcc74b712789edc375d6fd31f6195 100644 --- a/drivers/ide/pci/jmicron.c +++ b/drivers/ide/pci/jmicron.c @@ -12,6 +12,8 @@ #include #include +#define DRV_NAME "jmicron" + typedef enum { PORT_PATA0 = 0, PORT_PATA1 = 1, @@ -102,7 +104,7 @@ static const struct ide_port_ops jmicron_port_ops = { }; static const struct ide_port_info jmicron_chipset __devinitdata = { - .name = "JMB", + .name = DRV_NAME, .enablebits = { { 0x40, 0x01, 0x01 }, { 0x40, 0x10, 0x10 } }, .port_ops = &jmicron_port_ops, .pio_mask = ATA_PIO5, diff --git a/drivers/ide/pci/ns87415.c b/drivers/ide/pci/ns87415.c index afcc742a63accf92c744800bd3ec890b80d872ee..ffefcd15196c709b690bc8348eb2950b5c71e7ea 100644 --- a/drivers/ide/pci/ns87415.c +++ b/drivers/ide/pci/ns87415.c @@ -19,6 +19,8 @@ #include +#define DRV_NAME "ns87415" + #ifdef CONFIG_SUPERIO /* SUPERIO 87560 is a PoS chip that NatSem denies exists. * Unfortunately, it's built-in on all Astro-based PA-RISC workstations @@ -305,7 +307,7 @@ static const struct ide_dma_ops ns87415_dma_ops = { }; static const struct ide_port_info ns87415_chipset __devinitdata = { - .name = "NS87415", + .name = DRV_NAME, .init_hwif = init_hwif_ns87415, .port_ops = &ns87415_port_ops, .dma_ops = &ns87415_dma_ops, diff --git a/drivers/ide/pci/opti621.c b/drivers/ide/pci/opti621.c index 4895f2ff3f05235ee4e6f42aa1f50ba3cf98e38b..e28e672ddafcf9dd5cd940792f4961cc82f179c5 100644 --- a/drivers/ide/pci/opti621.c +++ b/drivers/ide/pci/opti621.c @@ -90,6 +90,8 @@ #include +#define DRV_NAME "opti621" + #define READ_REG 0 /* index of Read cycle timing register */ #define WRITE_REG 1 /* index of Write cycle timing register */ #define CNTRL_REG 3 /* index of Control register */ @@ -200,7 +202,7 @@ static const struct ide_port_ops opti621_port_ops = { }; static const struct ide_port_info opti621_chipset __devinitdata = { - .name = "OPTI621/X", + .name = DRV_NAME, .enablebits = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} }, .port_ops = &opti621_port_ops, .host_flags = IDE_HFLAG_NO_DMA, diff --git a/drivers/ide/pci/pdc202xx_new.c b/drivers/ide/pci/pdc202xx_new.c index 4c2b669d7de686cf2ff332a218a29aaab6f381eb..1f6791957227169c7664fc32ad9010e16f8aac56 100644 --- a/drivers/ide/pci/pdc202xx_new.c +++ b/drivers/ide/pci/pdc202xx_new.c @@ -31,6 +31,8 @@ #include #endif +#define DRV_NAME "pdc202xx_new" + #undef DEBUG #ifdef DEBUG @@ -458,7 +460,7 @@ static struct pci_dev * __devinit pdc20270_get_dev2(struct pci_dev *dev) if (dev2->irq != dev->irq) { dev2->irq = dev->irq; - printk(KERN_INFO "PDC20270 %s: PCI config space " + printk(KERN_INFO DRV_NAME " %s: PCI config space " "interrupt fixed\n", pci_name(dev)); } @@ -476,9 +478,9 @@ static const struct ide_port_ops pdcnew_port_ops = { .cable_detect = pdcnew_cable_detect, }; -#define DECLARE_PDCNEW_DEV(name_str, udma) \ +#define DECLARE_PDCNEW_DEV(udma) \ { \ - .name = name_str, \ + .name = DRV_NAME, \ .init_chipset = init_chipset_pdcnew, \ .port_ops = &pdcnew_port_ops, \ .host_flags = IDE_HFLAG_POST_SET_MODE | \ @@ -490,13 +492,8 @@ static const struct ide_port_ops pdcnew_port_ops = { } static const struct ide_port_info pdcnew_chipsets[] __devinitdata = { - /* 0 */ DECLARE_PDCNEW_DEV("PDC20268", ATA_UDMA5), - /* 1 */ DECLARE_PDCNEW_DEV("PDC20269", ATA_UDMA6), - /* 2 */ DECLARE_PDCNEW_DEV("PDC20270", ATA_UDMA5), - /* 3 */ DECLARE_PDCNEW_DEV("PDC20271", ATA_UDMA6), - /* 4 */ DECLARE_PDCNEW_DEV("PDC20275", ATA_UDMA6), - /* 5 */ DECLARE_PDCNEW_DEV("PDC20276", ATA_UDMA6), - /* 6 */ DECLARE_PDCNEW_DEV("PDC20277", ATA_UDMA6), + /* 0: PDC202{68,70} */ DECLARE_PDCNEW_DEV(ATA_UDMA5), + /* 1: PDC202{69,71,75,76,77} */ DECLARE_PDCNEW_DEV(ATA_UDMA6), }; /** @@ -510,13 +507,10 @@ static const struct ide_port_info pdcnew_chipsets[] __devinitdata = { static int __devinit pdc202new_init_one(struct pci_dev *dev, const struct pci_device_id *id) { - const struct ide_port_info *d; + const struct ide_port_info *d = &pdcnew_chipsets[id->driver_data]; struct pci_dev *bridge = dev->bus->self; - u8 idx = id->driver_data; - - d = &pdcnew_chipsets[idx]; - if (idx == 2 && bridge && + if (dev->device == PCI_DEVICE_ID_PROMISE_20270 && bridge && bridge->vendor == PCI_VENDOR_ID_DEC && bridge->device == PCI_DEVICE_ID_DEC_21150) { struct pci_dev *dev2; @@ -534,11 +528,11 @@ static int __devinit pdc202new_init_one(struct pci_dev *dev, const struct pci_de } } - if (idx == 5 && bridge && + if (dev->device == PCI_DEVICE_ID_PROMISE_20276 && bridge && bridge->vendor == PCI_VENDOR_ID_INTEL && (bridge->device == PCI_DEVICE_ID_INTEL_I960 || bridge->device == PCI_DEVICE_ID_INTEL_I960RM)) { - printk(KERN_INFO "PDC20276 %s: attached to I2O RAID controller," + printk(KERN_INFO DRV_NAME " %s: attached to I2O RAID controller," " skipping\n", pci_name(dev)); return -ENODEV; } @@ -558,11 +552,11 @@ static void __devexit pdc202new_remove(struct pci_dev *dev) static const struct pci_device_id pdc202new_pci_tbl[] = { { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20268), 0 }, { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20269), 1 }, - { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20270), 2 }, - { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20271), 3 }, - { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20275), 4 }, - { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20276), 5 }, - { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20277), 6 }, + { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20270), 0 }, + { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20271), 1 }, + { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20275), 1 }, + { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20276), 1 }, + { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20277), 1 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, pdc202new_pci_tbl); diff --git a/drivers/ide/pci/pdc202xx_old.c b/drivers/ide/pci/pdc202xx_old.c index 5cb2731047e918ed9bbb7fb323559c187fcb7155..da92d127868f14a781e1e346940df15b28ee32de 100644 --- a/drivers/ide/pci/pdc202xx_old.c +++ b/drivers/ide/pci/pdc202xx_old.c @@ -20,6 +20,8 @@ #include +#define DRV_NAME "pdc202xx_old" + #define PDC202XX_DEBUG_DRIVE_INFO 0 static const char *pdc_quirk_drives[] = { @@ -350,9 +352,9 @@ static const struct ide_dma_ops pdc2026x_dma_ops = { .dma_timeout = pdc202xx_dma_timeout, }; -#define DECLARE_PDC2026X_DEV(name_str, udma, extra_flags) \ +#define DECLARE_PDC2026X_DEV(udma, extra_flags) \ { \ - .name = name_str, \ + .name = DRV_NAME, \ .init_chipset = init_chipset_pdc202xx, \ .port_ops = &pdc2026x_port_ops, \ .dma_ops = &pdc2026x_dma_ops, \ @@ -363,8 +365,8 @@ static const struct ide_dma_ops pdc2026x_dma_ops = { } static const struct ide_port_info pdc202xx_chipsets[] __devinitdata = { - { /* 0 */ - .name = "PDC20246", + { /* 0: PDC20246 */ + .name = DRV_NAME, .init_chipset = init_chipset_pdc202xx, .port_ops = &pdc20246_port_ops, .dma_ops = &pdc20246_dma_ops, @@ -374,10 +376,10 @@ static const struct ide_port_info pdc202xx_chipsets[] __devinitdata = { .udma_mask = ATA_UDMA2, }, - /* 1 */ DECLARE_PDC2026X_DEV("PDC20262", ATA_UDMA4, 0), - /* 2 */ DECLARE_PDC2026X_DEV("PDC20263", ATA_UDMA4, 0), - /* 3 */ DECLARE_PDC2026X_DEV("PDC20265", ATA_UDMA5, IDE_HFLAG_RQSIZE_256), - /* 4 */ DECLARE_PDC2026X_DEV("PDC20267", ATA_UDMA5, IDE_HFLAG_RQSIZE_256), + /* 1: PDC2026{2,3} */ + DECLARE_PDC2026X_DEV(ATA_UDMA4, 0), + /* 2: PDC2026{5,7} */ + DECLARE_PDC2026X_DEV(ATA_UDMA5, IDE_HFLAG_RQSIZE_256), }; /** @@ -396,17 +398,17 @@ static int __devinit pdc202xx_init_one(struct pci_dev *dev, const struct pci_dev d = &pdc202xx_chipsets[idx]; - if (idx < 3) + if (idx < 2) pdc202ata4_fixup_irq(dev, d->name); - if (idx == 3) { + if (dev->vendor == PCI_DEVICE_ID_PROMISE_20265) { struct pci_dev *bridge = dev->bus->self; if (bridge && bridge->vendor == PCI_VENDOR_ID_INTEL && (bridge->device == PCI_DEVICE_ID_INTEL_I960 || bridge->device == PCI_DEVICE_ID_INTEL_I960RM)) { - printk(KERN_INFO "pdc202xx_old %s: skipping Promise " + printk(KERN_INFO DRV_NAME " %s: skipping Promise " "PDC20265 attached to I2O RAID controller\n", pci_name(dev)); return -ENODEV; @@ -419,9 +421,9 @@ static int __devinit pdc202xx_init_one(struct pci_dev *dev, const struct pci_dev static const struct pci_device_id pdc202xx_pci_tbl[] = { { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20246), 0 }, { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20262), 1 }, - { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20263), 2 }, - { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20265), 3 }, - { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20267), 4 }, + { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20263), 1 }, + { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20265), 2 }, + { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20267), 2 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, pdc202xx_pci_tbl); diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c index c16b1ab4d4ff7ce2dd5017fa2286effb7e789784..9eb411f5c35832fb26e4adf453289f5f91f9bbb8 100644 --- a/drivers/ide/pci/piix.c +++ b/drivers/ide/pci/piix.c @@ -54,6 +54,8 @@ #include +#define DRV_NAME "piix" + static int no_piix_dma; /** @@ -314,9 +316,9 @@ static const struct ide_port_ops piix_port_ops = { #define IDE_HFLAGS_PIIX 0 #endif -#define DECLARE_PIIX_DEV(name_str, udma) \ +#define DECLARE_PIIX_DEV(udma) \ { \ - .name = name_str, \ + .name = DRV_NAME, \ .init_hwif = init_hwif_piix, \ .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \ .port_ops = &piix_port_ops, \ @@ -327,9 +329,9 @@ static const struct ide_port_ops piix_port_ops = { .udma_mask = udma, \ } -#define DECLARE_ICH_DEV(name_str, udma) \ +#define DECLARE_ICH_DEV(udma) \ { \ - .name = name_str, \ + .name = DRV_NAME, \ .init_chipset = init_chipset_ich, \ .init_hwif = init_hwif_ich, \ .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \ @@ -342,45 +344,31 @@ static const struct ide_port_ops piix_port_ops = { } static const struct ide_port_info piix_pci_info[] __devinitdata = { - /* 0 */ DECLARE_PIIX_DEV("PIIXa", 0x00), /* no udma */ - /* 1 */ DECLARE_PIIX_DEV("PIIXb", 0x00), /* no udma */ - - /* 2 */ + /* 0: MPIIX */ { /* * MPIIX actually has only a single IDE channel mapped to * the primary or secondary ports depending on the value * of the bit 14 of the IDETIM register at offset 0x6c */ - .name = "MPIIX", + .name = DRV_NAME, .enablebits = {{0x6d,0xc0,0x80}, {0x6d,0xc0,0xc0}}, .host_flags = IDE_HFLAG_ISA_PORTS | IDE_HFLAG_NO_DMA | IDE_HFLAGS_PIIX, .pio_mask = ATA_PIO4, /* This is a painful system best to let it self tune for now */ }, - - /* 3 */ DECLARE_PIIX_DEV("PIIX3", 0x00), /* no udma */ - /* 4 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA2), - /* 5 */ DECLARE_ICH_DEV("ICH0", ATA_UDMA2), - /* 6 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA2), - /* 7 */ DECLARE_ICH_DEV("ICH", ATA_UDMA4), - /* 8 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA4), - /* 9 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA2), - /* 10 */ DECLARE_ICH_DEV("ICH2", ATA_UDMA5), - /* 11 */ DECLARE_ICH_DEV("ICH2M", ATA_UDMA5), - /* 12 */ DECLARE_ICH_DEV("ICH3M", ATA_UDMA5), - /* 13 */ DECLARE_ICH_DEV("ICH3", ATA_UDMA5), - /* 14 */ DECLARE_ICH_DEV("ICH4", ATA_UDMA5), - /* 15 */ DECLARE_ICH_DEV("ICH5", ATA_UDMA5), - /* 16 */ DECLARE_ICH_DEV("C-ICH", ATA_UDMA5), - /* 17 */ DECLARE_ICH_DEV("ICH4", ATA_UDMA5), - /* 18 */ DECLARE_ICH_DEV("ICH5-SATA", ATA_UDMA5), - /* 19 */ DECLARE_ICH_DEV("ICH5", ATA_UDMA5), - /* 20 */ DECLARE_ICH_DEV("ICH6", ATA_UDMA5), - /* 21 */ DECLARE_ICH_DEV("ICH7", ATA_UDMA5), - /* 22 */ DECLARE_ICH_DEV("ICH4", ATA_UDMA5), - /* 23 */ DECLARE_ICH_DEV("ESB2", ATA_UDMA5), - /* 24 */ DECLARE_ICH_DEV("ICH8M", ATA_UDMA5), + /* 1: PIIXa/PIIXb/PIIX3 */ + DECLARE_PIIX_DEV(0x00), /* no udma */ + /* 2: PIIX4 */ + DECLARE_PIIX_DEV(ATA_UDMA2), + /* 3: ICH0 */ + DECLARE_ICH_DEV(ATA_UDMA2), + /* 4: ICH */ + DECLARE_ICH_DEV(ATA_UDMA4), + /* 5: PIIX4 */ + DECLARE_PIIX_DEV(ATA_UDMA4), + /* 6: ICH[2-7]/ICH[2-3]M/C-ICH/ICH5-SATA/ESB2/ICH8M */ + DECLARE_ICH_DEV(ATA_UDMA5), }; /** @@ -421,39 +409,39 @@ static void __devinit piix_check_450nx(void) no_piix_dma = 2; } if(no_piix_dma) - printk(KERN_WARNING "piix: 450NX errata present, disabling IDE DMA.\n"); + printk(KERN_WARNING DRV_NAME ": 450NX errata present, disabling IDE DMA.\n"); if(no_piix_dma == 2) - printk(KERN_WARNING "piix: A BIOS update may resolve this.\n"); + printk(KERN_WARNING DRV_NAME ": A BIOS update may resolve this.\n"); } static const struct pci_device_id piix_pci_tbl[] = { - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371FB_0), 0 }, - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371FB_1), 1 }, - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371MX), 2 }, - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371SB_1), 3 }, - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371AB), 4 }, - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801AB_1), 5 }, - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82443MX_1), 6 }, - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801AA_1), 7 }, - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82372FB_1), 8 }, - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82451NX), 9 }, - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801BA_9), 10 }, - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801BA_8), 11 }, - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801CA_10), 12 }, - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801CA_11), 13 }, - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801DB_11), 14 }, - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801EB_11), 15 }, - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801E_11), 16 }, - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801DB_10), 17 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371FB_0), 1 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371FB_1), 1 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371MX), 0 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371SB_1), 1 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371AB), 2 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801AB_1), 3 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82443MX_1), 2 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801AA_1), 4 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82372FB_1), 5 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82451NX), 2 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801BA_9), 6 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801BA_8), 6 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801CA_10), 6 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801CA_11), 6 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801DB_11), 6 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801EB_11), 6 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801E_11), 6 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801DB_10), 6 }, #ifdef CONFIG_BLK_DEV_IDE_SATA - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801EB_1), 18 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801EB_1), 6 }, #endif - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ESB_2), 19 }, - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICH6_19), 20 }, - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICH7_21), 21 }, - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801DB_1), 22 }, - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ESB2_18), 23 }, - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICH8_6), 24 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ESB_2), 6 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICH6_19), 6 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICH7_21), 6 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801DB_1), 6 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ESB2_18), 6 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICH8_6), 6 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, piix_pci_tbl); diff --git a/drivers/ide/pci/rz1000.c b/drivers/ide/pci/rz1000.c index f7a3b9aff29dbd82e190538d75b0520066c50d72..8d11ee838a2a825702f31a56429a1f25dd663010 100644 --- a/drivers/ide/pci/rz1000.c +++ b/drivers/ide/pci/rz1000.c @@ -21,6 +21,8 @@ #include #include +#define DRV_NAME "rz1000" + static void __devinit init_hwif_rz1000 (ide_hwif_t *hwif) { struct pci_dev *dev = to_pci_dev(hwif->dev); @@ -40,7 +42,7 @@ static void __devinit init_hwif_rz1000 (ide_hwif_t *hwif) } static const struct ide_port_info rz1000_chipset __devinitdata = { - .name = "RZ100x", + .name = DRV_NAME, .init_hwif = init_hwif_rz1000, .chipset = ide_rz1000, .host_flags = IDE_HFLAG_NO_DMA, diff --git a/drivers/ide/pci/sc1200.c b/drivers/ide/pci/sc1200.c index 6509560ba665d158d6541c4e1b005917876f2cb9..8efaed16fea31d5b5f14b65e1716114d3ac20c50 100644 --- a/drivers/ide/pci/sc1200.c +++ b/drivers/ide/pci/sc1200.c @@ -22,6 +22,8 @@ #include +#define DRV_NAME "sc1200" + #define SC1200_REV_A 0x00 #define SC1200_REV_B1 0x01 #define SC1200_REV_B3 0x02 @@ -291,7 +293,7 @@ static const struct ide_dma_ops sc1200_dma_ops = { }; static const struct ide_port_info sc1200_chipset __devinitdata = { - .name = "SC1200", + .name = DRV_NAME, .port_ops = &sc1200_port_ops, .dma_ops = &sc1200_dma_ops, .host_flags = IDE_HFLAG_SERIALIZE | diff --git a/drivers/ide/pci/serverworks.c b/drivers/ide/pci/serverworks.c index 1106ff44cdeea7d3452e8fd99a55834c3b1a4f3a..e26bc8326dbb5b5c2d25b63dd9af39886a55e1b3 100644 --- a/drivers/ide/pci/serverworks.c +++ b/drivers/ide/pci/serverworks.c @@ -38,6 +38,8 @@ #include +#define DRV_NAME "serverworks" + #define SVWKS_CSB5_REVISION_NEW 0x92 /* min PCI_REVISION_ID for UDMA5 (A2.0) */ #define SVWKS_CSB6_REVISION 0xa0 /* min PCI_REVISION_ID for UDMA4 (A1.0) */ @@ -353,40 +355,44 @@ static const struct ide_port_ops svwks_port_ops = { #define IDE_HFLAGS_SVWKS IDE_HFLAG_LEGACY_IRQS static const struct ide_port_info serverworks_chipsets[] __devinitdata = { - { /* 0 */ - .name = "SvrWks OSB4", + { /* 0: OSB4 */ + .name = DRV_NAME, .init_chipset = init_chipset_svwks, .port_ops = &osb4_port_ops, .host_flags = IDE_HFLAGS_SVWKS, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, .udma_mask = 0x00, /* UDMA is problematic on OSB4 */ - },{ /* 1 */ - .name = "SvrWks CSB5", + }, + { /* 1: CSB5 */ + .name = DRV_NAME, .init_chipset = init_chipset_svwks, .port_ops = &svwks_port_ops, .host_flags = IDE_HFLAGS_SVWKS, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, .udma_mask = ATA_UDMA5, - },{ /* 2 */ - .name = "SvrWks CSB6", + }, + { /* 2: CSB6 */ + .name = DRV_NAME, .init_chipset = init_chipset_svwks, .port_ops = &svwks_port_ops, .host_flags = IDE_HFLAGS_SVWKS, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, .udma_mask = ATA_UDMA5, - },{ /* 3 */ - .name = "SvrWks CSB6", + }, + { /* 3: CSB6-2 */ + .name = DRV_NAME, .init_chipset = init_chipset_svwks, .port_ops = &svwks_port_ops, .host_flags = IDE_HFLAGS_SVWKS | IDE_HFLAG_SINGLE, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, .udma_mask = ATA_UDMA5, - },{ /* 4 */ - .name = "SvrWks HT1000", + }, + { /* 4: HT1000 */ + .name = DRV_NAME, .init_chipset = init_chipset_svwks, .port_ops = &svwks_port_ops, .host_flags = IDE_HFLAGS_SVWKS | IDE_HFLAG_SINGLE, diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c index fc29f1ca503a22b948626c552a8d7e8b81afb555..572b479a3922963379e31b9eb17726b3deb7ab74 100644 --- a/drivers/ide/pci/siimage.c +++ b/drivers/ide/pci/siimage.c @@ -44,6 +44,8 @@ #include #include +#define DRV_NAME "siimage" + /** * pdev_is_sata - check if device is SATA * @pdev: PCI device to check @@ -717,9 +719,9 @@ static const struct ide_dma_ops sil_dma_ops = { .dma_lost_irq = ide_dma_lost_irq, }; -#define DECLARE_SII_DEV(name_str, p_ops) \ +#define DECLARE_SII_DEV(p_ops) \ { \ - .name = name_str, \ + .name = DRV_NAME, \ .init_chipset = init_chipset_siimage, \ .init_iops = init_iops_siimage, \ .port_ops = p_ops, \ @@ -730,9 +732,8 @@ static const struct ide_dma_ops sil_dma_ops = { } static const struct ide_port_info siimage_chipsets[] __devinitdata = { - /* 0 */ DECLARE_SII_DEV("SiI680", &sil_pata_port_ops), - /* 1 */ DECLARE_SII_DEV("SiI3112 Serial ATA", &sil_sata_port_ops), - /* 2 */ DECLARE_SII_DEV("Adaptec AAR-1210SA", &sil_sata_port_ops) + /* 0: SiI680 */ DECLARE_SII_DEV(&sil_pata_port_ops), + /* 1: SiI3112 */ DECLARE_SII_DEV(&sil_sata_port_ops) }; /** @@ -761,7 +762,7 @@ static int __devinit siimage_init_one(struct pci_dev *dev, static int first = 1; if (first) { - printk(KERN_INFO "siimage: For full SATA support you " + printk(KERN_INFO DRV_NAME ": For full SATA support you " "should use the libata sata_sil module.\n"); first = 0; } @@ -780,7 +781,7 @@ static int __devinit siimage_init_one(struct pci_dev *dev, * seem to get terminally confused in the PCI spaces. */ if (!request_mem_region(bar5, barsize, d.name)) { - printk(KERN_WARNING "siimage %s: MMIO ports not " + printk(KERN_WARNING DRV_NAME " %s: MMIO ports not " "available\n", pci_name(dev)); } else { ioaddr = ioremap(bar5, barsize); @@ -823,7 +824,7 @@ static const struct pci_device_id siimage_pci_tbl[] = { { PCI_VDEVICE(CMD, PCI_DEVICE_ID_SII_680), 0 }, #ifdef CONFIG_BLK_DEV_IDE_SATA { PCI_VDEVICE(CMD, PCI_DEVICE_ID_SII_3112), 1 }, - { PCI_VDEVICE(CMD, PCI_DEVICE_ID_SII_1210SA), 2 }, + { PCI_VDEVICE(CMD, PCI_DEVICE_ID_SII_1210SA), 1 }, #endif { 0, }, }; diff --git a/drivers/ide/pci/sis5513.c b/drivers/ide/pci/sis5513.c index 518d8ab413f3a1b2d68f1e1c95ff3c44cdc18ebc..6fcb46c878718572e4db3c7a9772dc0c014d1b33 100644 --- a/drivers/ide/pci/sis5513.c +++ b/drivers/ide/pci/sis5513.c @@ -52,6 +52,8 @@ #include #include +#define DRV_NAME "sis5513" + /* registers layout and init values are chipset family dependant */ #define ATA_16 0x01 @@ -380,7 +382,7 @@ static int __devinit sis_find_family(struct pci_dev *dev) } pci_dev_put(host); - printk(KERN_INFO "SIS5513 %s: %s %s controller\n", + printk(KERN_INFO DRV_NAME " %s: %s %s controller\n", pci_name(dev), SiSHostChipInfo[i].name, chipset_capability[chipset_family]); } @@ -397,7 +399,7 @@ static int __devinit sis_find_family(struct pci_dev *dev) pci_write_config_dword(dev, 0x54, idemisc); if (trueid == 0x5518) { - printk(KERN_INFO "SIS5513 %s: SiS 962/963 MuTIOL IDE UDMA133 controller\n", + printk(KERN_INFO DRV_NAME " %s: SiS 962/963 MuTIOL IDE UDMA133 controller\n", pci_name(dev)); chipset_family = ATA_133; @@ -407,7 +409,7 @@ static int __devinit sis_find_family(struct pci_dev *dev) */ if ((idemisc & 0x40000000) == 0) { pci_write_config_dword(dev, 0x54, idemisc | 0x40000000); - printk(KERN_INFO "SIS5513 %s: Switching to 5513 register mapping\n", + printk(KERN_INFO DRV_NAME " %s: Switching to 5513 register mapping\n", pci_name(dev)); } } @@ -432,11 +434,11 @@ static int __devinit sis_find_family(struct pci_dev *dev) pci_dev_put(lpc_bridge); if (lpc_bridge->revision == 0x10 && (prefctl & 0x80)) { - printk(KERN_INFO "SIS5513 %s: SiS 961B MuTIOL IDE UDMA133 controller\n", + printk(KERN_INFO DRV_NAME " %s: SiS 961B MuTIOL IDE UDMA133 controller\n", pci_name(dev)); chipset_family = ATA_133a; } else { - printk(KERN_INFO "SIS5513 %s: SiS 961 MuTIOL IDE UDMA100 controller\n", + printk(KERN_INFO DRV_NAME " %s: SiS 961 MuTIOL IDE UDMA100 controller\n", pci_name(dev)); chipset_family = ATA_100; } @@ -560,7 +562,7 @@ static const struct ide_port_ops sis_ata133_port_ops = { }; static const struct ide_port_info sis5513_chipset __devinitdata = { - .name = "SIS5513", + .name = DRV_NAME, .init_chipset = init_chipset_sis5513, .enablebits = { {0x4a, 0x02, 0x02}, {0x4a, 0x04, 0x04} }, .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_NO_AUTODMA, diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c index 72899f85c5ba04a419f927e380c92eb7355d8612..fa720db3de105ca7eb84cec31b1b3e9781a2bd61 100644 --- a/drivers/ide/pci/sl82c105.c +++ b/drivers/ide/pci/sl82c105.c @@ -23,6 +23,8 @@ #include +#define DRV_NAME "sl82c105" + #undef DEBUG #ifdef DEBUG @@ -301,7 +303,7 @@ static const struct ide_dma_ops sl82c105_dma_ops = { }; static const struct ide_port_info sl82c105_chipset __devinitdata = { - .name = "W82C105", + .name = DRV_NAME, .init_chipset = init_chipset_sl82c105, .enablebits = {{0x40,0x01,0x01}, {0x40,0x10,0x10}}, .port_ops = &sl82c105_port_ops, @@ -328,7 +330,7 @@ static int __devinit sl82c105_init_one(struct pci_dev *dev, const struct pci_dev * Never ever EVER under any circumstances enable * DMA when the bridge is this old. */ - printk(KERN_INFO "W82C105_IDE: Winbond W83C553 bridge " + printk(KERN_INFO DRV_NAME ": Winbond W83C553 bridge " "revision %d, BM-DMA disabled\n", rev); d.dma_ops = NULL; d.mwdma_mask = 0; diff --git a/drivers/ide/pci/slc90e66.c b/drivers/ide/pci/slc90e66.c index fee5ebe4bb996e6baa3f0155d2091b7f0b987e2a..13d1fa491f26148a9650d960e441a3a6345a8261 100644 --- a/drivers/ide/pci/slc90e66.c +++ b/drivers/ide/pci/slc90e66.c @@ -15,6 +15,8 @@ #include #include +#define DRV_NAME "slc90e66" + static DEFINE_SPINLOCK(slc90e66_lock); static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio) @@ -132,7 +134,7 @@ static const struct ide_port_ops slc90e66_port_ops = { }; static const struct ide_port_info slc90e66_chipset __devinitdata = { - .name = "SLC90E66", + .name = DRV_NAME, .enablebits = { {0x41, 0x80, 0x80}, {0x43, 0x80, 0x80} }, .port_ops = &slc90e66_port_ops, .host_flags = IDE_HFLAG_LEGACY_IRQS, diff --git a/drivers/ide/pci/tc86c001.c b/drivers/ide/pci/tc86c001.c index 102cd7c40cdd290bc7979299fb1e81e72ec994b9..b1cb8a9ce5a92fc9f6a5711b4cb143b24ea2a285 100644 --- a/drivers/ide/pci/tc86c001.c +++ b/drivers/ide/pci/tc86c001.c @@ -11,7 +11,7 @@ #include #include -#define DRV_NAME "TC86C001" +#define DRV_NAME "tc86c001" static void tc86c001_set_mode(ide_drive_t *drive, const u8 speed) { @@ -193,7 +193,7 @@ static const struct ide_dma_ops tc86c001_dma_ops = { }; static const struct ide_port_info tc86c001_chipset __devinitdata = { - .name = "TC86C001", + .name = DRV_NAME, .init_hwif = init_hwif_tc86c001, .port_ops = &tc86c001_port_ops, .dma_ops = &tc86c001_dma_ops, diff --git a/drivers/ide/pci/triflex.c b/drivers/ide/pci/triflex.c index 78e24ac809724f39fb407d78e6e21e2aa6122b88..b77ec35151b34dec10d691fa57f780faacef1430 100644 --- a/drivers/ide/pci/triflex.c +++ b/drivers/ide/pci/triflex.c @@ -33,6 +33,8 @@ #include #include +#define DRV_NAME "triflex" + static void triflex_set_mode(ide_drive_t *drive, const u8 speed) { ide_hwif_t *hwif = HWIF(drive); @@ -93,7 +95,7 @@ static const struct ide_port_ops triflex_port_ops = { }; static const struct ide_port_info triflex_device __devinitdata = { - .name = "TRIFLEX", + .name = DRV_NAME, .enablebits = {{0x80, 0x01, 0x01}, {0x80, 0x02, 0x02}}, .port_ops = &triflex_port_ops, .pio_mask = ATA_PIO4, diff --git a/drivers/ide/pci/trm290.c b/drivers/ide/pci/trm290.c index 7bda5ed92e1e146959739ec41727958984c14776..fd28b49977fd1e34d5fc9489bb4247e571857dd7 100644 --- a/drivers/ide/pci/trm290.c +++ b/drivers/ide/pci/trm290.c @@ -141,6 +141,8 @@ #include +#define DRV_NAME "trm290" + static void trm290_prepare_drive (ide_drive_t *drive, unsigned int use_dma) { ide_hwif_t *hwif = HWIF(drive); @@ -245,10 +247,10 @@ static void __devinit init_hwif_trm290(ide_hwif_t *hwif) u8 reg = 0; if ((dev->class & 5) && cfg_base) - printk(KERN_INFO "TRM290 %s: chip", pci_name(dev)); + printk(KERN_INFO DRV_NAME " %s: chip", pci_name(dev)); else { cfg_base = 0x3df0; - printk(KERN_INFO "TRM290 %s: using default", pci_name(dev)); + printk(KERN_INFO DRV_NAME " %s: using default", pci_name(dev)); } printk(KERN_CONT " config base at 0x%04x\n", cfg_base); hwif->config_data = cfg_base; @@ -325,7 +327,7 @@ static struct ide_dma_ops trm290_dma_ops = { }; static const struct ide_port_info trm290_chipset __devinitdata = { - .name = "TRM290", + .name = DRV_NAME, .init_hwif = init_hwif_trm290, .chipset = ide_trm290, .port_ops = &trm290_port_ops, diff --git a/drivers/ide/pci/via82cxxx.c b/drivers/ide/pci/via82cxxx.c index 23332556e616c86dcc669ba33a3792a880d70812..170e058f1fbd26dfd82a5c294b6b741ce681e2ef 100644 --- a/drivers/ide/pci/via82cxxx.c +++ b/drivers/ide/pci/via82cxxx.c @@ -35,6 +35,8 @@ #include #endif +#define DRV_NAME "via82cxxx" + #define VIA_IDE_ENABLE 0x40 #define VIA_IDE_CONFIG 0x41 #define VIA_FIFO_CONFIG 0x43 @@ -373,7 +375,7 @@ static const struct ide_port_ops via_port_ops = { }; static const struct ide_port_info via82cxxx_chipset __devinitdata = { - .name = "VP_IDE", + .name = DRV_NAME, .init_chipset = init_chipset_via82cxxx, .enablebits = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } }, .port_ops = &via_port_ops, @@ -401,7 +403,7 @@ static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_i */ via_config = via_config_find(&isa); if (!via_config->id) { - printk(KERN_WARNING "VP_IDE %s: unknown chipset, skipping\n", + printk(KERN_WARNING DRV_NAME " %s: unknown chipset, skipping\n", pci_name(dev)); return -ENODEV; } @@ -409,7 +411,7 @@ static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_i /* * Print the boot message. */ - printk(KERN_INFO "VP_IDE %s: VIA %s (rev %02x) IDE %sDMA%s\n", + printk(KERN_INFO DRV_NAME " %s: VIA %s (rev %02x) IDE %sDMA%s\n", pci_name(dev), via_config->name, isa->revision, via_config->udma_mask ? "U" : "MW", via_dma[via_config->udma_mask ? @@ -429,9 +431,9 @@ static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_i } if (via_clock < 20000 || via_clock > 50000) { - printk(KERN_WARNING "VP_IDE: User given PCI clock speed " + printk(KERN_WARNING DRV_NAME ": User given PCI clock speed " "impossible (%d), using 33 MHz instead.\n", via_clock); - printk(KERN_WARNING "VP_IDE: Use ide0=ata66 if you want " + printk(KERN_WARNING DRV_NAME ": Use ide0=ata66 if you want " "to assume 80-wire cable.\n"); via_clock = 33333; } @@ -453,7 +455,8 @@ static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_i vdev = kzalloc(sizeof(*vdev), GFP_KERNEL); if (!vdev) { - printk(KERN_ERR "VP_IDE %s: out of memory :(\n", pci_name(dev)); + printk(KERN_ERR DRV_NAME " %s: out of memory :(\n", + pci_name(dev)); return -ENOMEM; }