提交 cabd2ea2 编写于 作者: Y Yunzhi Li 提交者: Heiko Stuebner

ARM: dts: rockchip: add properties for dwc2 usb otg controller

Add properties for dwc2 usb device controller according to
Documentation/devicetree/bindings/usb/dwc2.txt
Signed-off-by: NYunzhi Li <lyz@rock-chips.com>
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
上级 8c653f9a
...@@ -442,6 +442,7 @@ ...@@ -442,6 +442,7 @@
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_USBHOST1>; clocks = <&cru HCLK_USBHOST1>;
clock-names = "otg"; clock-names = "otg";
dr_mode = "host";
phys = <&usbphy2>; phys = <&usbphy2>;
phy-names = "usb2-phy"; phy-names = "usb2-phy";
status = "disabled"; status = "disabled";
...@@ -454,6 +455,11 @@ ...@@ -454,6 +455,11 @@
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_OTG0>; clocks = <&cru HCLK_OTG0>;
clock-names = "otg"; clock-names = "otg";
dr_mode = "otg";
g-np-tx-fifo-size = <16>;
g-rx-fifo-size = <275>;
g-tx-fifo-size = <256 128 128 64 64 32>;
g-use-dma;
phys = <&usbphy0>; phys = <&usbphy0>;
phy-names = "usb2-phy"; phy-names = "usb2-phy";
status = "disabled"; status = "disabled";
......
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