提交 a26d3c4f 编写于 作者: A Arnd Bergmann

Merge branch 'cleanup' of...

Merge branch 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup

* 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: Fix L4_EMU_34XX_BASE error after iomap changes
  ARM: OMAP2+: Limit omap_read/write usage to legacy USB drivers
  ARM: OMAP: Remove plat/io.h by splitting it into mach/io.h and mach/hardware.h
  ARM: OMAP2+: Move most of plat/io.h into local iomap.h
  ARM: OMAP1: Move most of plat/io.h into local iomap.h
  ARM: OMAP1: Move 16xx GPIO system clock to platform init code
  ARM: OMAP: Move omap_init_consistent_dma_size() to local common.h
  ARM: OMAP2+: Move SDRC related functions from io.h into local common.h
  ARM: OMAP2+: Drop DISPC L3 firewall code
  ARM: OMAP2xxx: PM: remove obsolete timer disable code in the suspend path
  ARM: OMAP: McSPI: Remove unused flag from struct omap2_mcspi_device_config

(update to latest rmk/for-arm-soc branch)
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
......@@ -186,6 +186,9 @@ config GENERIC_ISA_DMA
config FIQ
bool
config NEED_RET_TO_USER
bool
config ARCH_MTD_XIP
bool
......@@ -479,6 +482,7 @@ config ARCH_IOP13XX
select ARCH_SUPPORTS_MSI
select VMSPLIT_1G
select NEED_MACH_MEMORY_H
select NEED_RET_TO_USER
help
Support for Intel's IOP13XX (XScale) family of processors.
......@@ -486,6 +490,7 @@ config ARCH_IOP32X
bool "IOP32x-based"
depends on MMU
select CPU_XSCALE
select NEED_RET_TO_USER
select PLAT_IOP
select PCI
select ARCH_REQUIRE_GPIOLIB
......@@ -497,6 +502,7 @@ config ARCH_IOP33X
bool "IOP33x-based"
depends on MMU
select CPU_XSCALE
select NEED_RET_TO_USER
select PLAT_IOP
select PCI
select ARCH_REQUIRE_GPIOLIB
......
......@@ -11,14 +11,6 @@
/* IOC / IOMD based hardware */
#include <asm/hardware/iomd.h>
.macro disable_fiq
mov r12, #ioc_base_high
.if ioc_base_low
orr r12, r12, #ioc_base_low
.endif
strb r12, [r12, #0x38] @ Disable FIQ register
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first
ldr \tmp, =irq_prio_h
......
......@@ -19,7 +19,9 @@
#include <asm/glue-df.h>
#include <asm/glue-pf.h>
#include <asm/vfpmacros.h>
#ifndef CONFIG_MULTI_IRQ_HANDLER
#include <mach/entry-macro.S>
#endif
#include <asm/thread_notify.h>
#include <asm/unwind.h>
#include <asm/unistd.h>
......@@ -1101,7 +1103,6 @@ __stubs_start:
* get out of that mode without clobbering one register.
*/
vector_fiq:
disable_fiq
subs pc, lr, #4
/*=============================================================================
......
......@@ -10,9 +10,15 @@
#include <asm/unistd.h>
#include <asm/ftrace.h>
#include <mach/entry-macro.S>
#include <asm/unwind.h>
#ifdef CONFIG_NEED_RET_TO_USER
#include <mach/entry-macro.S>
#else
.macro arch_ret_to_user, tmp1, tmp2
.endm
#endif
#include "entry-header.S"
......
......@@ -13,17 +13,11 @@
#include <mach/hardware.h>
#include <mach/at91_aic.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
ldr \base, =at91_aic_base @ base virtual address of AIC peripheral
ldr \base, [\base]
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number
......
......@@ -21,9 +21,6 @@
#include <mach/hardware.h>
#include <mach/csp/mm_io.h>
.macro disable_fiq
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \base, =(MM_IO_BASE_INTC0)
ldr \irqstat, [\base, #0] @ get status
......@@ -77,6 +74,3 @@
.macro get_irqnr_preamble, base, tmp
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
......@@ -10,15 +10,9 @@
#include <mach/hardware.h>
#include <asm/hardware/clps7111.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
#if (INTSR2 - INTSR1) != (INTMR2 - INTMR1)
#error INTSR stride != INTMR stride
#endif
......
/*
* Low-level IRQ helper macros for Cavium Networks platforms
*
* Copyright 2008 Cavium Networks
*
* This file is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License, Version 2, as
* published by the Free Software Foundation.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
......@@ -11,17 +11,11 @@
#include <mach/io.h>
#include <mach/irqs.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
ldr \base, =davinci_intc_base
ldr \base, [\base]
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
#if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC)
ldr \tmp, =davinci_intc_type
......
......@@ -10,12 +10,6 @@
#include <mach/bridge-regs.h>
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_preamble, base, tmp
ldr \base, =IRQ_VIRT_BASE
.endm
......
......@@ -12,16 +12,10 @@
#define IRQ_STAT 0xff000000 /* read */
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
mov \base, #IRQ_STAT
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, stat, base, tmp
ldrb \stat, [\base] @ get interrupts
mov \irqnr, #0
......
/*
* arch/arm/mach-ep93xx/include/mach/entry-macro.S
* IRQ demultiplexing for EP93xx
*
* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or (at
* your option) any later version.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/* arch/arm/mach-exynos4/include/mach/entry-macro.S
*
* Cloned from arch/arm/mach-realview/include/mach/entry-macro.S
*
* Low-level IRQ helper macros for EXYNOS4 platforms
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
......@@ -14,9 +14,6 @@
.equ dc21285_high, ARMCSR_BASE & 0xff000000
.equ dc21285_low, ARMCSR_BASE & 0x00ffffff
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
mov \base, #dc21285_high
.if dc21285_low
......@@ -24,9 +21,6 @@
.endif
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqstat, [\base, #0x180] @ get interrupts
......
......@@ -12,15 +12,9 @@
#define IRQ_STATUS 0x14
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqstat, =IO_ADDRESS(GEMINI_INTERRUPT_BASE + IRQ_STATUS)
ldr \irqnr, [\irqstat]
......
......@@ -8,15 +8,9 @@
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
#if defined (CONFIG_CPU_H7201) || defined (CONFIG_CPU_H7202)
@ we could use the id register on H7202, but this is not
......
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
......@@ -11,15 +11,9 @@
#include <mach/platform.h>
#include <mach/irqs.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
/* FIXME: should not be using soo many LDRs here */
ldr \base, =IO_ADDRESS(INTEGRATOR_IC_BASE)
......
......@@ -16,9 +16,6 @@
* Place - Suite 330, Boston, MA 02111-1307 USA.
*
*/
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
mrc p15, 0, \tmp, c15, c1, 0
orr \tmp, \tmp, #(1 << 6)
......
......@@ -9,9 +9,6 @@
*/
#include <mach/iop32x.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
mrc p15, 0, \tmp, c15, c1, 0
orr \tmp, \tmp, #(1 << 6)
......
......@@ -9,9 +9,6 @@
*/
#include <mach/iop33x.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
mrc p15, 0, \tmp, c15, c1, 0
orr \tmp, \tmp, #(1 << 6)
......
......@@ -9,15 +9,9 @@
*/
#include <mach/irqs.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
mov \irqnr, #0x0 @clear out irqnr as default
......
......@@ -2,15 +2,9 @@
* arch/arm/mach-ixp23xx/include/mach/entry-macro.S
*/
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET)
ldr \irqnr, [\irqnr] @ get interrupt number
......
......@@ -9,15 +9,9 @@
*/
#include <mach/hardware.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET)
ldr \irqstat, [\irqstat] @ get interrupts
......
......@@ -10,12 +10,6 @@
#include <mach/bridge-regs.h>
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_preamble, base, tmp
ldr \base, =IRQ_VIRT_BASE
.endm
......
......@@ -14,16 +14,10 @@
#include <mach/hardware.h>
#include <mach/regs-irq.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
ldr \base, =KS8695_IRQ_VA @ Base address of interrupt controller
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqstat, [\base, #KS8695_INTMS] @ Mask Status register
......
......@@ -21,16 +21,10 @@
#define LPC32XX_INTC_MASKED_STATUS_OFS 0x8
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
ldr \base, =IO_ADDRESS(LPC32XX_MIC_BASE)
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/*
* Return IRQ number in irqnr. Also return processor Z flag status in CPSR
* as set if an interrupt is pending.
......
......@@ -8,12 +8,6 @@
#include <mach/regs-icu.h>
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_preamble, base, tmp
mrc p15, 0, \tmp, c0, c0, 0 @ CPUID
and \tmp, \tmp, #0xff00
......
......@@ -16,12 +16,6 @@
*
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
#if !defined(CONFIG_ARM_GIC)
#include <mach/msm_iomap.h>
......
......@@ -10,12 +10,6 @@
#include <mach/bridge-regs.h>
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_preamble, base, tmp
ldr \base, =IRQ_VIRT_BASE
.endm
......
......@@ -23,9 +23,6 @@
#define MXS_ICOLL_VBASE MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR)
#define HW_ICOLL_STAT_OFFSET 0x70
.macro disable_fiq
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqnr, [\base, #HW_ICOLL_STAT_OFFSET]
cmp \irqnr, #0x7F
......@@ -36,6 +33,3 @@
.macro get_irqnr_preamble, base, tmp
ldr \base, =MXS_ICOLL_VBASE
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/*
* arch/arm/mach-netx/include/mach/entry-macro.S
*
* Low-level IRQ helper macros for Hilscher netX based platforms
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/*
* Low-level IRQ helper macros for Nomadik platforms
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
......@@ -15,11 +15,12 @@
#include <linux/linkage.h>
#include <plat/io.h>
#include <plat/board-ams-delta.h>
#include <mach/ams-delta-fiq.h>
#include "iomap.h"
/*
* GPIO related definitions, copied from arch/arm/plat-omap/gpio.c.
* Unfortunately, those were not placed in a separate header file.
......
......@@ -22,6 +22,7 @@
#include <plat/board-ams-delta.h>
#include <asm/fiq.h>
#include <mach/ams-delta-fiq.h>
static struct fiq_handler fh = {
......
......@@ -20,25 +20,27 @@
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <linux/export.h>
#include <linux/io.h>
#include <media/soc_camera.h>
#include <asm/serial.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/io.h>
#include <plat/board-ams-delta.h>
#include <plat/keypad.h>
#include <plat/mux.h>
#include <plat/usb.h>
#include <plat/board.h>
#include "common.h"
#include <mach/camera.h>
#include <mach/hardware.h>
#include <mach/ams-delta-fiq.h>
#include <mach/camera.h>
#include "iomap.h"
#include "common.h"
static u8 ams_delta_latch1_reg;
static u16 ams_delta_latch2_reg;
......
......@@ -22,7 +22,6 @@
#include <linux/input.h>
#include <linux/smc91x.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
......@@ -32,9 +31,13 @@
#include <plat/flash.h>
#include <plat/fpga.h>
#include <plat/keypad.h>
#include "common.h"
#include <plat/board.h>
#include <mach/hardware.h>
#include "iomap.h"
#include "common.h"
/* fsample is pretty close to p2-sample */
#define fsample_cpld_read(reg) __raw_readb(reg)
......
......@@ -31,8 +31,6 @@
#include <linux/i2c/tps65010.h>
#include <linux/smc91x.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
......@@ -43,9 +41,11 @@
#include <plat/irda.h>
#include <plat/usb.h>
#include <plat/keypad.h>
#include "common.h"
#include <plat/flash.h>
#include <mach/hardware.h>
#include "common.h"
#include "board-h2.h"
/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
......
......@@ -33,21 +33,21 @@
#include <asm/setup.h>
#include <asm/page.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/irqs.h>
#include <plat/mux.h>
#include <plat/tc.h>
#include <plat/usb.h>
#include <plat/keypad.h>
#include <plat/dma.h>
#include "common.h"
#include <plat/flash.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include "common.h"
#include "board-h3.h"
/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
......
......@@ -27,7 +27,7 @@
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/input.h>
#include <linux/io.h>
#include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <linux/i2c.h>
......@@ -41,7 +41,6 @@
#include <asm/mach/arch.h>
#include <plat/omap7xx.h>
#include "common.h"
#include <plat/board.h>
#include <plat/keypad.h>
#include <plat/usb.h>
......@@ -49,7 +48,7 @@
#include <mach/irqs.h>
#include <linux/delay.h>
#include "common.h"
/* LCD register definition */
#define OMAP_LCDC_CONTROL (0xfffec000 + 0x00)
......
......@@ -26,7 +26,6 @@
#include <linux/input.h>
#include <linux/smc91x.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
......@@ -37,9 +36,13 @@
#include <plat/tc.h>
#include <plat/usb.h>
#include <plat/keypad.h>
#include "common.h"
#include <plat/mmc.h>
#include <mach/hardware.h>
#include "iomap.h"
#include "common.h"
/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
#define INNOVATOR1610_ETHR_START 0x04000300
......
......@@ -21,7 +21,6 @@
#include <linux/workqueue.h>
#include <linux/delay.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
......@@ -30,12 +29,15 @@
#include <plat/usb.h>
#include <plat/board.h>
#include <plat/keypad.h>
#include "common.h"
#include <plat/hwa742.h>
#include <plat/lcd_mipid.h>
#include <plat/mmc.h>
#include <plat/clock.h>
#include <mach/hardware.h>
#include "common.h"
#define ADS7846_PENDOWN_GPIO 15
static const unsigned int nokia770_keymap[] = {
......
......@@ -34,15 +34,11 @@
#include <linux/i2c.h>
#include <linux/leds.h>
#include <linux/smc91x.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/i2c/tps65010.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
......@@ -51,6 +47,9 @@
#include <plat/usb.h>
#include <plat/mux.h>
#include <plat/tc.h>
#include <mach/hardware.h>
#include "common.h"
/* At OMAP5912 OSK the Ethernet is directly connected to CS1 */
......
......@@ -28,7 +28,6 @@
#include <linux/interrupt.h>
#include <linux/apm-emulation.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
......@@ -41,6 +40,9 @@
#include <plat/board.h>
#include <plat/irda.h>
#include <plat/keypad.h>
#include <mach/hardware.h>
#include "common.h"
#define PALMTE_USBDETECT_GPIO 0
......
......@@ -24,8 +24,9 @@
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/leds.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
......@@ -39,10 +40,10 @@
#include <plat/board.h>
#include <plat/irda.h>
#include <plat/keypad.h>
#include "common.h"
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <mach/hardware.h>
#include "common.h"
#define PALMTT_USBDETECT_GPIO 0
#define PALMTT_CABLE_GPIO 1
......
......@@ -27,8 +27,9 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
......@@ -41,10 +42,10 @@
#include <plat/board.h>
#include <plat/irda.h>
#include <plat/keypad.h>
#include "common.h"
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <mach/hardware.h>
#include "common.h"
#define PALMZ71_USBDETECT_GPIO 0
#define PALMZ71_PENIRQ_GPIO 6
......
......@@ -22,7 +22,6 @@
#include <linux/input.h>
#include <linux/smc91x.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
......@@ -32,9 +31,13 @@
#include <plat/fpga.h>
#include <plat/flash.h>
#include <plat/keypad.h>
#include "common.h"
#include <plat/board.h>
#include <mach/hardware.h>
#include "iomap.h"
#include "common.h"
static const unsigned int p2_keymap[] = {
KEY(0, 0, KEY_UP),
KEY(1, 0, KEY_RIGHT),
......
......@@ -28,7 +28,6 @@
#include <linux/errno.h>
#include <linux/export.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
......@@ -40,10 +39,13 @@
#include <plat/usb.h>
#include <plat/tc.h>
#include <plat/board.h>
#include "common.h"
#include <plat/keypad.h>
#include <plat/board-sx1.h>
#include <mach/hardware.h>
#include "common.h"
/* Write to I2C device */
int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value)
{
......
......@@ -27,18 +27,20 @@
#include <linux/smc91x.h>
#include <linux/export.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/board-voiceblue.h>
#include "common.h"
#include <plat/flash.h>
#include <plat/mux.h>
#include <plat/tc.h>
#include <plat/usb.h>
#include <mach/hardware.h>
#include "common.h"
static struct plat_serial8250_port voiceblue_ports[] = {
{
.mapbase = (unsigned long)(OMAP_CS1_PHYS + 0x40000),
......
......@@ -15,8 +15,8 @@
#include <linux/list.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/clkdev.h>
#include <asm/mach-types.h>
......@@ -27,6 +27,9 @@
#include <plat/sram.h>
#include <plat/clkdev_omap.h>
#include <mach/hardware.h>
#include "iomap.h"
#include "clock.h"
#include "opp.h"
......
......@@ -15,10 +15,10 @@
*/
#include <linux/kernel.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/cpufreq.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <asm/mach-types.h> /* for machine_is_* */
......@@ -28,6 +28,9 @@
#include <plat/sram.h> /* for omap_sram_reprogram_clock() */
#include <plat/usb.h> /* for OTG_BASE */
#include <mach/hardware.h>
#include "iomap.h"
#include "clock.h"
/* Some ARM_IDLECT1 bit shifts - used in struct arm_idlect1_clk */
......
......@@ -58,5 +58,6 @@ void omap1_restart(char, const char *);
extern struct sys_timer omap1_timer;
extern bool omap_32k_timer_init(void);
extern void __init omap_init_consistent_dma_size(void);
#endif /* __ARCH_ARM_MACH_OMAP1_COMMON_H */
......@@ -15,14 +15,10 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/spi/spi.h>
#include <mach/camera.h>
#include <mach/hardware.h>
#include <asm/mach/map.h>
#include "common.h"
#include <plat/tc.h>
#include <plat/board.h>
#include <plat/mux.h>
......@@ -30,6 +26,10 @@
#include <plat/omap7xx.h>
#include <plat/mcbsp.h>
#include <mach/camera.h>
#include <mach/hardware.h>
#include "common.h"
#include "clock.h"
/*-------------------------------------------------------------------------*/
......
......@@ -19,11 +19,11 @@
*/
#include <linux/err.h>
#include <linux/io.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/io.h>
#include <plat/dma.h>
#include <plat/tc.h>
......
......@@ -6,13 +6,15 @@
* published by the Free Software Foundation.
*/
#include <linux/io.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#include <plat/io.h>
#include <plat/tc.h>
#include <plat/flash.h>
#include <mach/hardware.h>
void omap1_set_vpp(struct platform_device *pdev, int enable)
{
static int count;
......
......@@ -24,12 +24,15 @@
#include <linux/errno.h>
#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/irq.h>
#include <asm/mach/irq.h>
#include <plat/fpga.h>
#include <mach/hardware.h>
#include "iomap.h"
static void fpga_mask_irq(struct irq_data *d)
{
unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE;
......
......@@ -218,6 +218,13 @@ static int __init omap16xx_gpio_init(void)
if (!cpu_is_omap16xx())
return -EINVAL;
/*
* Enable system clock for GPIO module.
* The CAM_CLK_CTRL *is* really the right place.
*/
omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
ULPD_CAM_CLK_CTRL);
for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++)
platform_device_register(omap16xx_gpio_dev[i]);
......
......@@ -15,8 +15,11 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/io.h>
#include <plat/cpu.h>
#include <mach/hardware.h>
#define OMAP_DIE_ID_0 0xfffe1800
#define OMAP_DIE_ID_1 0xfffe1804
#define OMAP_PRODUCTION_ID_0 0xfffe2000
......
......@@ -9,20 +9,16 @@
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <mach/hardware.h>
#include <mach/io.h>
#include <mach/irqs.h>
#include <asm/hardware/gic.h>
.macro disable_fiq
.endm
#include "../../iomap.h"
.macro get_irqnr_preamble, base, tmp
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE)
ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET]
......
......@@ -2,4 +2,40 @@
* arch/arm/mach-omap1/include/mach/hardware.h
*/
#ifndef __MACH_HARDWARE_H
#define __MACH_HARDWARE_H
#ifndef __ASSEMBLER__
/*
* NOTE: Please use ioremap + __raw_read/write where possible instead of these
*/
extern u8 omap_readb(u32 pa);
extern u16 omap_readw(u32 pa);
extern u32 omap_readl(u32 pa);
extern void omap_writeb(u8 v, u32 pa);
extern void omap_writew(u16 v, u32 pa);
extern void omap_writel(u32 v, u32 pa);
#include <plat/tc.h>
/* Almost all documentation for chip and board memory maps assumes
* BM is clear. Most devel boards have a switch to control booting
* from NOR flash (using external chipselect 3) rather than mask ROM,
* which uses BM to interchange the physical CS0 and CS3 addresses.
*/
static inline u32 omap_cs0m_phys(void)
{
return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM)
? OMAP_CS3_PHYS : 0;
}
static inline u32 omap_cs3_phys(void)
{
return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM)
? 0 : OMAP_CS3_PHYS;
}
#endif
#endif
#include <plat/hardware.h>
/*
* arch/arm/mach-omap1/include/mach/io.h
*
* IO definitions for TI OMAP processors and boards
*
* Copied from arch/arm/mach-sa1100/include/mach/io.h
* Copyright (C) 1997-1999 Russell King
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
* Modifications:
* 06-12-1997 RMK Created.
* 07-04-1999 RMK Major cleanup
*/
#include <plat/io.h>
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
/*
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
......@@ -18,7 +18,8 @@
* Note that the is_lbus_device() test is not very efficient on 1510
* because of the strncmp().
*/
#ifdef CONFIG_ARCH_OMAP15XX
#if defined(CONFIG_ARCH_OMAP15XX) && !defined(__ASSEMBLER__)
#include <plat/cpu.h>
/*
* OMAP-1510 Local Bus address offset
......
......@@ -15,9 +15,12 @@
#include <asm/tlb.h>
#include <asm/mach/map.h>
#include <plat/mux.h>
#include <plat/tc.h>
#include "iomap.h"
#include "common.h"
#include "clock.h"
extern void omap_check_revision(void);
......
/*
* IO mappings for OMAP1
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifdef __ASSEMBLER__
#define IOMEM(x) (x)
#else
#define IOMEM(x) ((void __force __iomem *)(x))
#endif
#define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
#define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET)
/*
* ----------------------------------------------------------------------------
* Omap1 specific IO mapping
* ----------------------------------------------------------------------------
*/
#define OMAP1_IO_PHYS 0xFFFB0000
#define OMAP1_IO_SIZE 0x40000
#define OMAP1_IO_VIRT (OMAP1_IO_PHYS - OMAP1_IO_OFFSET)
......@@ -42,11 +42,13 @@
#include <linux/interrupt.h>
#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/irq.h>
#include <asm/mach/irq.h>
#include <plat/cpu.h>
#include <mach/hardware.h>
#define IRQ_BANK(irq) ((irq) >> 5)
#define IRQ_BIT(irq) ((irq) & 0x1f)
......
......@@ -27,9 +27,10 @@
#include <linux/interrupt.h>
#include <linux/io.h>
#include <plat/dma.h>
#include <mach/hardware.h>
#include <mach/lcdc.h>
#include <plat/dma.h>
int omap_lcd_dma_running(void)
{
......
......@@ -19,12 +19,15 @@
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <mach/irqs.h>
#include <plat/dma.h>
#include <plat/mux.h>
#include <plat/cpu.h>
#include <plat/mcbsp.h>
#include <mach/irqs.h>
#include "iomap.h"
#define DPS_RSTCT2_PER_EN (1 << 0)
#define DSP_RSTCT2_WD_PER_EN (1 << 1)
......
......@@ -49,7 +49,6 @@
#include <asm/mach/irq.h>
#include <plat/cpu.h>
#include <mach/irqs.h>
#include <plat/clock.h>
#include <plat/sram.h>
#include <plat/tc.h>
......@@ -57,6 +56,9 @@
#include <plat/dma.h>
#include <plat/dmtimer.h>
#include <mach/irqs.h>
#include "iomap.h"
#include "pm.h"
static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE];
......
......@@ -4,9 +4,10 @@
#include <linux/kernel.h>
#include <linux/io.h>
#include <mach/hardware.h>
#include <plat/prcm.h>
#include <mach/hardware.h>
void omap1_restart(char mode, const char *cmd)
{
/*
......
......@@ -33,8 +33,12 @@
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <mach/io.h>
#include "iomap.h"
#include "pm.h"
.text
......
......@@ -9,10 +9,14 @@
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <mach/io.h>
#include <mach/hardware.h>
#include "iomap.h"
.text
/*
......
......@@ -45,14 +45,15 @@
#include <linux/io.h>
#include <asm/system.h>
#include <mach/hardware.h>
#include <asm/leds.h>
#include <asm/irq.h>
#include <asm/sched_clock.h>
#include <mach/hardware.h>
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
#include "iomap.h"
#include "common.h"
#ifdef CONFIG_OMAP_MPU_TIMER
......
......@@ -47,14 +47,17 @@
#include <linux/io.h>
#include <asm/system.h>
#include <mach/hardware.h>
#include <asm/leds.h>
#include <asm/irq.h>
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
#include "common.h"
#include <plat/dmtimer.h>
#include <mach/hardware.h>
#include "common.h"
/*
* ---------------------------------------------------------------------------
* 32KHz OS timer
......
......@@ -280,7 +280,6 @@ static struct omap_dss_board_info cm_t35_dss_data = {
static struct omap2_mcspi_device_config tdo24m_mcspi_config = {
.turbo_mode = 0,
.single_channel = 1, /* 0: slave, 1: master */
};
static struct tdo24m_platform_data tdo24m_config = {
......
......@@ -137,7 +137,6 @@ static void __init n8x0_usb_init(void) {}
static struct omap2_mcspi_device_config p54spi_mcspi_config = {
.turbo_mode = 0,
.single_channel = 1,
};
static struct spi_board_info n800_spi_board_info[] __initdata = {
......
......@@ -138,17 +138,14 @@ static struct lp5523_platform_data rx51_lp5523_platform_data = {
static struct omap2_mcspi_device_config wl1251_mcspi_config = {
.turbo_mode = 0,
.single_channel = 1,
};
static struct omap2_mcspi_device_config mipid_mcspi_config = {
.turbo_mode = 0,
.single_channel = 1,
};
static struct omap2_mcspi_device_config tsc2005_mcspi_config = {
.turbo_mode = 0,
.single_channel = 1,
};
static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = {
......
......@@ -117,7 +117,6 @@ static struct omap_dss_board_info zoom_dss_data = {
static struct omap2_mcspi_device_config dss_lcd_mcspi_config = {
.turbo_mode = 1,
.single_channel = 1, /* 0: slave, 1: master */
};
static struct spi_board_info nec_8048_spi_board_info[] __initdata = {
......
......@@ -33,6 +33,7 @@
#include <linux/cpufreq.h>
#include <linux/slab.h>
#include <plat/cpu.h>
#include <plat/clock.h>
#include <plat/sram.h>
#include <plat/sdrc.h>
......
......@@ -22,6 +22,7 @@
#include <asm/div64.h>
#include <plat/clock.h>
#include <plat/cpu.h>
#include "clock.h"
#include "cm-regbits-24xx.h"
......
......@@ -14,11 +14,14 @@
*/
#include <linux/kernel.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/list.h>
#include <plat/hardware.h>
#include <plat/clkdev_omap.h>
#include "iomap.h"
#include "clock.h"
#include "clock2xxx.h"
#include "opp2xxx.h"
......
......@@ -21,8 +21,10 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <plat/hardware.h>
#include <plat/clock.h>
#include "iomap.h"
#include "clock.h"
#include "clock2xxx.h"
#include "cm2xxx_3xxx.h"
......
......@@ -17,8 +17,10 @@
#include <linux/clk.h>
#include <linux/list.h>
#include <plat/hardware.h>
#include <plat/clkdev_omap.h>
#include "iomap.h"
#include "clock.h"
#include "clock2xxx.h"
#include "opp2xxx.h"
......
......@@ -22,6 +22,7 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <plat/cpu.h>
#include <plat/clock.h>
#include "clock.h"
......
......@@ -21,6 +21,7 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <plat/hardware.h>
#include <plat/clock.h>
#include "clock.h"
......
......@@ -20,14 +20,15 @@
#include <linux/clk.h>
#include <linux/list.h>
#include <plat/hardware.h>
#include <plat/clkdev_omap.h>
#include "iomap.h"
#include "clock.h"
#include "clock3xxx.h"
#include "clock34xx.h"
#include "clock36xx.h"
#include "clock3517.h"
#include "cm2xxx_3xxx.h"
#include "cm-regbits-34xx.h"
#include "prm2xxx_3xxx.h"
......
......@@ -26,8 +26,11 @@
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/clk.h>
#include <plat/hardware.h>
#include <plat/clkdev_omap.h>
#include "iomap.h"
#include "clock.h"
#include "clock44xx.h"
#include "cm1_44xx.h"
......
......@@ -18,8 +18,8 @@
#include <linux/err.h>
#include <linux/io.h>
#include "iomap.h"
#include "common.h"
#include "cm.h"
#include "cm2xxx_3xxx.h"
#include "cm-regbits-24xx.h"
......
......@@ -18,8 +18,8 @@
#include <linux/err.h>
#include <linux/io.h>
#include "iomap.h"
#include "common.h"
#include "cm.h"
#include "cm1_44xx.h"
#include "cm2_44xx.h"
......
......@@ -20,8 +20,8 @@
#include <linux/err.h>
#include <linux/io.h>
#include "iomap.h"
#include "common.h"
#include "cm.h"
#include "cm1_44xx.h"
#include "cm2_44xx.h"
......
......@@ -33,7 +33,6 @@
defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
static struct omap2_mcspi_device_config ads7846_mcspi_config = {
.turbo_mode = 0,
.single_channel = 1, /* 0: slave, 1: master */
};
static struct ads7846_platform_data ads7846_config = {
......
......@@ -17,12 +17,12 @@
#include <linux/clk.h>
#include <linux/io.h>
#include "common.h"
#include <plat/board.h>
#include <plat/mux.h>
#include <plat/clock.h>
#include "iomap.h"
#include "common.h"
#include "sdrc.h"
#include "control.h"
......
......@@ -133,6 +133,8 @@ void am33xx_map_io(void);
void omap4_map_io(void);
void ti81xx_map_io(void);
extern void __init omap_init_consistent_dma_size(void);
/**
* omap_test_timeout - busy-loop, testing a condition
* @cond: condition to test until it evaluates to true
......@@ -235,5 +237,10 @@ static inline u32 omap4_mpuss_read_prev_context_state(void)
return 0;
}
#endif
struct omap_sdrc_params;
extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
struct omap_sdrc_params *sdrc_cs1);
#endif /* __ASSEMBLER__ */
#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
......@@ -15,9 +15,10 @@
#include <linux/kernel.h>
#include <linux/io.h>
#include "common.h"
#include <plat/sdrc.h>
#include "iomap.h"
#include "common.h"
#include "cm-regbits-34xx.h"
#include "prm-regbits-34xx.h"
#include "prm2xxx_3xxx.h"
......
......@@ -16,7 +16,6 @@
#ifndef __ARCH_ARM_MACH_OMAP2_CONTROL_H
#define __ARCH_ARM_MACH_OMAP2_CONTROL_H
#include <mach/io.h>
#include <mach/ctrl_module_core_44xx.h>
#include <mach/ctrl_module_wkup_44xx.h>
#include <mach/ctrl_module_pad_core_44xx.h>
......
......@@ -24,7 +24,7 @@
#include <asm/mach/map.h>
#include <asm/pmu.h>
#include <plat/tc.h>
#include "iomap.h"
#include <plat/board.h>
#include <plat/mcbsp.h>
#include <plat/mmc.h>
......
......@@ -30,6 +30,7 @@
#include <plat/omap-pm.h>
#include "common.h"
#include "iomap.h"
#include "mux.h"
#include "control.h"
#include "display.h"
......
......@@ -21,6 +21,10 @@
#include <linux/clk.h>
#include <linux/err.h>
#include <mach/hardware.h>
#include "iomap.h"
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Alexander Shishkin");
......
......@@ -16,6 +16,7 @@
#include <asm/mach/flash.h>
#include <plat/cpu.h>
#include <plat/nand.h>
#include <plat/board.h>
#include <plat/gpmc.h>
......
......@@ -18,6 +18,7 @@
#include <asm/mach/flash.h>
#include <plat/cpu.h>
#include <plat/onenand.h>
#include <plat/board.h>
#include <plat/gpmc.h>
......
/*
* arch/arm/plat-omap/include/mach/entry-macro.S
*
* Low-level IRQ helper macros for OMAP-based platforms
*
* Copyright (C) 2009 Texas Instruments
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/*
* arch/arm/mach-omap2/include/mach/io.h
*
* IO definitions for TI OMAP processors and boards
*
* Copied from arch/arm/mach-sa1100/include/mach/io.h
* Copyright (C) 1997-1999 Russell King
*
* Copyright (C) 2009 Texas Instruments
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
* Modifications:
* 06-12-1997 RMK Created.
* 07-04-1999 RMK Major cleanup
*/
#include <plat/io.h>
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
/*
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
......@@ -24,26 +24,23 @@
#include <linux/omapfb.h>
#include <asm/tlb.h>
#include <asm/mach/map.h>
#include <plat/sram.h>
#include <plat/sdrc.h>
#include <plat/serial.h>
#include "clock2xxx.h"
#include "clock3xxx.h"
#include "clock44xx.h"
#include "common.h"
#include <plat/omap-pm.h>
#include <plat/omap_hwmod.h>
#include <plat/multi.h>
#include "iomap.h"
#include "voltage.h"
#include "powerdomain.h"
#include "clockdomain.h"
#include <plat/omap_hwmod.h>
#include <plat/multi.h>
#include "common.h"
#include "clock2xxx.h"
#include "clock3xxx.h"
#include "clock44xx.h"
/*
* The machine specific code may provide the extra mapping besides the
......@@ -490,43 +487,3 @@ void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
_omap2_init_reprogram_sdrc();
}
}
/*
* NOTE: Please use ioremap + __raw_read/write where possible instead of these
*/
u8 omap_readb(u32 pa)
{
return __raw_readb(OMAP2_L4_IO_ADDRESS(pa));
}
EXPORT_SYMBOL(omap_readb);
u16 omap_readw(u32 pa)
{
return __raw_readw(OMAP2_L4_IO_ADDRESS(pa));
}
EXPORT_SYMBOL(omap_readw);
u32 omap_readl(u32 pa)
{
return __raw_readl(OMAP2_L4_IO_ADDRESS(pa));
}
EXPORT_SYMBOL(omap_readl);
void omap_writeb(u8 v, u32 pa)
{
__raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa));
}
EXPORT_SYMBOL(omap_writeb);
void omap_writew(u16 v, u32 pa)
{
__raw_writew(v, OMAP2_L4_IO_ADDRESS(pa));
}
EXPORT_SYMBOL(omap_writew);
void omap_writel(u32 v, u32 pa)
{
__raw_writel(v, OMAP2_L4_IO_ADDRESS(pa));
}
EXPORT_SYMBOL(omap_writel);
/*
* arch/arm/plat-omap/include/mach/io.h
*
* IO definitions for TI OMAP processors and boards
*
* Copied from arch/arm/mach-sa1100/include/mach/io.h
* Copyright (C) 1997-1999 Russell King
*
* Copyright (C) 2009 Texas Instruments
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
* IO mappings for OMAP2+
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
......@@ -28,30 +20,6 @@
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
* Modifications:
* 06-12-1997 RMK Created.
* 07-04-1999 RMK Major cleanup
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#include <mach/hardware.h>
#define IO_SPACE_LIMIT 0xffffffff
/*
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
/*
* ----------------------------------------------------------------------------
* I/O mapping
* ----------------------------------------------------------------------------
*/
#ifdef __ASSEMBLER__
......@@ -60,13 +28,9 @@
#define IOMEM(x) ((void __force __iomem *)(x))
#endif
#define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
#define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET)
#define OMAP2_L3_IO_OFFSET 0x90000000
#define OMAP2_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */
#define OMAP2_L4_IO_OFFSET 0xb2000000
#define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */
......@@ -85,16 +49,6 @@
#define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */
#define OMAP2_EMU_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_EMU_IO_OFFSET)
/*
* ----------------------------------------------------------------------------
* Omap1 specific IO mapping
* ----------------------------------------------------------------------------
*/
#define OMAP1_IO_PHYS 0xFFFB0000
#define OMAP1_IO_SIZE 0x40000
#define OMAP1_IO_VIRT (OMAP1_IO_PHYS - OMAP1_IO_OFFSET)
/*
* ----------------------------------------------------------------------------
* Omap2 specific IO mapping
......@@ -247,31 +201,3 @@
/* 0x4e000000 --> 0xfd300000 */
#define OMAP44XX_DMM_SIZE SZ_1M
#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + OMAP44XX_EMIF2_SIZE)
/*
* ----------------------------------------------------------------------------
* Omap specific register access
* ----------------------------------------------------------------------------
*/
#ifndef __ASSEMBLER__
/*
* NOTE: Please use ioremap + __raw_read/write where possible instead of these
*/
extern u8 omap_readb(u32 pa);
extern u16 omap_readw(u32 pa);
extern u32 omap_readl(u32 pa);
extern void omap_writeb(u8 v, u32 pa);
extern void omap_writew(u16 v, u32 pa);
extern void omap_writel(u32 v, u32 pa);
struct omap_sdrc_params;
extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
struct omap_sdrc_params *sdrc_cs1);
extern void __init omap_init_consistent_dma_size(void);
#endif
#endif
......@@ -14,10 +14,13 @@
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/exception.h>
#include <asm/mach/irq.h>
#include <mach/hardware.h>
#include "iomap.h"
/* selected INTC register offsets */
......
......@@ -23,11 +23,12 @@
#include <asm/cacheflush.h>
#include <asm/hardware/gic.h>
#include <asm/smp_scu.h>
#include <mach/hardware.h>
#include <mach/omap-secure.h>
#include "iomap.h"
#include "common.h"
#include "clockdomain.h"
/* SCU base address */
......
......@@ -28,6 +28,8 @@
* http://repository.maemo.org/pool/diablo/free/k/kernel-source-diablo/
*/
#include <plat/hardware.h>
#include "opp2xxx.h"
#include "sdrc.h"
#include "clock.h"
......
......@@ -26,6 +26,8 @@
* This is technically part of the OMAP2xxx clock code.
*/
#include <plat/hardware.h>
#include "opp2xxx.h"
#include "sdrc.h"
#include "clock.h"
......
......@@ -26,7 +26,6 @@
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/time.h>
#include <linux/gpio.h>
......@@ -35,12 +34,13 @@
#include <asm/mach/irq.h>
#include <asm/mach-types.h>
#include <mach/irqs.h>
#include <plat/clock.h>
#include <plat/sram.h>
#include <plat/dma.h>
#include <plat/board.h>
#include <mach/irqs.h>
#include "common.h"
#include "prm2xxx_3xxx.h"
#include "prm-regbits-24xx.h"
......@@ -49,7 +49,6 @@
#include "sdrc.h"
#include "pm.h"
#include "control.h"
#include "powerdomain.h"
#include "clockdomain.h"
......@@ -252,26 +251,6 @@ static int omap2_pm_begin(suspend_state_t state)
return 0;
}
static int omap2_pm_suspend(void)
{
u32 wken_wkup, mir1;
wken_wkup = omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN);
wken_wkup &= ~OMAP24XX_EN_GPT1_MASK;
omap2_prm_write_mod_reg(wken_wkup, WKUP_MOD, PM_WKEN);
/* Mask GPT1 */
mir1 = omap_readl(0x480fe0a4);
omap_writel(1 << 5, 0x480fe0ac);
omap2_enter_full_retention();
omap_writel(mir1, 0x480fe0a4);
omap2_prm_write_mod_reg(wken_wkup, WKUP_MOD, PM_WKEN);
return 0;
}
static int omap2_pm_enter(suspend_state_t state)
{
int ret = 0;
......@@ -279,7 +258,7 @@ static int omap2_pm_enter(suspend_state_t state)
switch (state) {
case PM_SUSPEND_STANDBY:
case PM_SUSPEND_MEM:
ret = omap2_pm_suspend();
omap2_enter_full_retention();
break;
default:
ret = -EINVAL;
......
......@@ -15,8 +15,8 @@
#include <linux/err.h>
#include <linux/io.h>
#include "iomap.h"
#include "common.h"
#include "prcm_mpu44xx.h"
#include "cm-regbits-44xx.h"
......
......@@ -17,11 +17,12 @@
#include <linux/err.h>
#include <linux/io.h>
#include "common.h"
#include <plat/cpu.h>
#include <plat/irqs.h>
#include <plat/prcm.h>
#include "iomap.h"
#include "common.h"
#include "vp.h"
#include "prm44xx.h"
#include "prm-regbits-44xx.h"
......
......@@ -16,8 +16,8 @@
#include <linux/err.h>
#include <linux/io.h>
#include "iomap.h"
#include "common.h"
#include "prm44xx.h"
#include "prminst44xx.h"
#include "prm-regbits-44xx.h"
......
......@@ -17,7 +17,6 @@
#include <linux/err.h>
#include <linux/io.h>
#include <plat/io.h>
#include "common.h"
#include <plat/clock.h>
#include <plat/sdrc.h>
......
......@@ -24,13 +24,14 @@
#include <linux/clk.h>
#include <linux/io.h>
#include "common.h"
#include <plat/clock.h>
#include <plat/sram.h>
#include <plat/sdrc.h>
#include "iomap.h"
#include "common.h"
#include "prm2xxx_3xxx.h"
#include "clock.h"
#include <plat/sdrc.h>
#include "sdrc.h"
/* Memory timing, DLL mode flags */
......
......@@ -27,7 +27,6 @@
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <mach/io.h>
#include <plat/omap24xx.h>
......
......@@ -23,10 +23,13 @@
* MA 02111-1307 USA
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <plat/hardware.h>
#include <plat/sram.h>
#include <mach/io.h>
#include "iomap.h"
#include "cm2xxx_3xxx.h"
#include "prm2xxx_3xxx.h"
#include "sdrc.h"
......
......@@ -29,10 +29,12 @@
* These crashes may be intermittent.
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <mach/io.h>
#include <mach/hardware.h>
#include "iomap.h"
#include "prm2xxx_3xxx.h"
#include "cm2xxx_3xxx.h"
#include "sdrc.h"
......
......@@ -29,10 +29,12 @@
* These crashes may be intermittent.
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <mach/io.h>
#include <mach/hardware.h>
#include "iomap.h"
#include "prm2xxx_3xxx.h"
#include "cm2xxx_3xxx.h"
#include "sdrc.h"
......
......@@ -26,11 +26,12 @@
* MA 02111-1307 USA
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <mach/hardware.h>
#include <mach/io.h>
#include <mach/hardware.h>
#include "iomap.h"
#include "sdrc.h"
#include "cm2xxx_3xxx.h"
......
......@@ -10,12 +10,6 @@
#include <mach/bridge-regs.h>
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_preamble, base, tmp
ldr \base, =MAIN_IRQ_CAUSE
.endm
......
/*
* entry-macro.S
*
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
*
* Low-level IRQ helper macros for picoXcell platforms
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
......@@ -25,15 +25,9 @@
#define SIC1_BASE_INT 32
#define SIC2_BASE_INT 64
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
/* decode the MIC interrupt numbers */
ldr \base, =IO_ADDRESS(PNX4008_INTCTRLMIC_BASE)
......
......@@ -20,10 +20,3 @@
cmp \irqnr, #0x40 @ the irq num can't be larger than 0x3f
movges \irqnr, #0
.endm
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/*
* arch/arm/mach-pxa/include/mach/entry-macro.S
*
* Low-level IRQ helper macros for PXA-based platforms
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/*
* arch/arm/mach-realview/include/mach/entry-macro.S
*
* Low-level IRQ helper macros for RealView platforms
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
......@@ -4,7 +4,7 @@
# Object file lists.
obj-y := dma.o irq.o riscpc.o
obj-y := dma.o fiq.o irq.o riscpc.o
obj-m :=
obj-n :=
obj- :=
......
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <mach/hardware.h>
#include <mach/entry-macro.S>
.text
.global rpc_default_fiq_end
ENTRY(rpc_default_fiq_start)
mov r12, #ioc_base_high
.if ioc_base_low
orr r12, r12, #ioc_base_low
.endif
strb r12, [r12, #0x38] @ Disable FIQ register
subs pc, lr, #4
rpc_default_fiq_end:
......@@ -10,7 +10,3 @@
orr \base, \base, #ioc_base_low
.endif
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
......@@ -5,6 +5,7 @@
#include <asm/mach/irq.h>
#include <asm/hardware/iomd.h>
#include <asm/irq.h>
#include <asm/fiq.h>
static void iomd_ack_irq_a(struct irq_data *d)
{
......@@ -112,6 +113,8 @@ static struct irq_chip iomd_fiq_chip = {
.irq_unmask = iomd_unmask_irq_fiq,
};
extern unsigned char rpc_default_fiq_start, rpc_default_fiq_end;
void __init rpc_init_irq(void)
{
unsigned int irq, flags;
......@@ -121,6 +124,9 @@ void __init rpc_init_irq(void)
iomd_writeb(0, IOMD_FIQMASK);
iomd_writeb(0, IOMD_DMAMASK);
set_fiq_handler(&rpc_default_fiq_start,
&rpc_default_fiq_end - &rpc_default_fiq_start);
for (irq = 0; irq < NR_IRQS; irq++) {
flags = IRQF_VALID;
......
......@@ -25,9 +25,6 @@
.macro get_irqnr_preamble, base, tmp
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
mov \base, #S3C24XX_VA_IRQ
......@@ -71,8 +68,3 @@
@@ exit here, Z flag unset if IRQ
.endm
/* currently don't need an disable_fiq macro */
.macro disable_fiq
.endm
/* arch/arm/mach-s3c6400/include/mach/entry-macro.S
*
* Copyright 2008 Openmoko, Inc.
* Copyright 2008 Simtec Electronics
* http://armlinux.simtec.co.uk/
* Ben Dooks <ben@simtec.co.uk>
*
* Low-level IRQ helper macros for the Samsung S3C64XX series
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/* linux/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
*
* Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Low-level IRQ helper macros for the Samsung S5P64X0
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
......@@ -12,14 +12,8 @@
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
.endm
/* linux/arch/arm/mach-s5pv210/include/mach/entry-macro.S
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
*
* Low-level IRQ helper macros for the Samsung S5PV210
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
......@@ -8,17 +8,11 @@
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
mov \base, #0xfa000000 @ ICIP = 0xfa050000
add \base, \base, #0x00050000
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqstat, [\base] @ get irqs
ldr \irqnr, [\base, #4] @ ICMR = 0xfa050004
......
......@@ -7,16 +7,10 @@
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
mov \base, #0xe0000000
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
mov \irqstat, #0x0C
......
/*
* Copyright (C) 2010 Paul Mundt
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/*
* arch/arm/mach-spear3xx/include/mach/entry-macro.S
*
* Low-level IRQ helper macros for SPEAr3xx machine family
*
* Copyright (C) 2009 ST Microelectronics
* Viresh Kumar<viresh.kumar@st.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/*
* arch/arm/mach-spear6xx/include/mach/entry-macro.S
*
* Low-level IRQ helper macros for SPEAr6xx machine family
*
* Copyright (C) 2009 ST Microelectronics
* Rajeev Kumar<rajeev-dlh.kumar@st.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/* arch/arm/mach-tegra/include/mach/entry-macro.S
*
* Copyright (C) 2009 Palm, Inc.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/*
*
* arch-arm/mach-u300/include/mach/entry-macro.S
*
*
* Copyright (C) 2006-2009 ST-Ericsson AB
* License terms: GNU General Public License (GPL) version 2
* Low-level IRQ helper macros for ST-Ericsson U300
* Author: Linus Walleij <linus.walleij@stericsson.com>
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/*
* Low-level IRQ helper macros for U8500 platforms
*
* Copyright (C) 2009 ST-Ericsson.
*
* This file is a copy of ARM Realview platform.
* -just satisfied checkpatch script.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/*
* arch/arm/mach-versatile/include/mach/entry-macro.S
*
* Low-level IRQ helper macros for Versatile platforms
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
......@@ -8,18 +8,12 @@
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
@ physical 0xd8140000 is virtual 0xf8140000
mov \base, #0xf8000000
orr \base, \base, #0x00140000
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqnr, [\base]
cmp \irqnr, #63 @ may be false positive, check interrupt status
......
......@@ -15,9 +15,6 @@
.macro get_irqnr_preamble, base, tmp
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
mov \base, #AIC_BA
......@@ -27,8 +24,3 @@
cmp \irqnr, #0
.endm
/* currently don't need an disable_fiq macro */
.macro disable_fiq
.endm
/*
* arch/arm/mach-zynq/include/mach/entry-macro.S
*
* Low-level IRQ helper macros
*
* Copyright (C) 2011 Xilinx
*
* based on arch/plat-mxc/include/mach/entry-macro.S
*
* Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org>
* Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/*
* Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org>
* Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
......@@ -21,6 +21,7 @@
#include <asm/sched_clock.h>
#include <plat/hardware.h>
#include <plat/common.h>
#include <plat/board.h>
......
......@@ -164,6 +164,8 @@ static inline void set_gdma_dev(int req, int dev)
}
#else
#define set_gdma_dev(req, dev) do {} while (0)
#define omap_readl(reg) 0
#define omap_writel(val, reg) do {} while (0)
#endif
void omap_set_dma_priority(int lch, int dst_port, int priority)
......
......@@ -43,6 +43,8 @@
#include <plat/dmtimer.h>
#include <mach/hardware.h>
static LIST_HEAD(omap_timer_list);
static DEFINE_SPINLOCK(dm_timer_lock);
......
......@@ -43,6 +43,12 @@
#endif
#include <plat/serial.h>
#ifdef __ASSEMBLER__
#define IOMEM(x) (x)
#else
#define IOMEM(x) ((void __force __iomem *)(x))
#endif
/*
* ---------------------------------------------------------------------------
* Common definitions for all OMAP processors
......
......@@ -12,6 +12,8 @@
#ifndef CONFIG_ARCH_OMAP1
#warning Please update the board to use matrix-keypad driver
#define omap_readw(reg) 0
#define omap_writew(val, reg) do {} while (0)
#endif
#include <linux/input/matrix_keypad.h>
......
......@@ -18,9 +18,6 @@ struct omap2_mcspi_dev_attr {
struct omap2_mcspi_device_config {
unsigned turbo_mode:1;
/* Do we want one channel enabled at the same time? */
unsigned single_channel:1;
};
#endif
......@@ -84,23 +84,6 @@
#define EMIFS_CCS(n) (EMIFS_CS0_CONFIG + (4 * (n)))
#define EMIFS_ACS(n) (EMIFS_ACS0 + (4 * (n)))
/* Almost all documentation for chip and board memory maps assumes
* BM is clear. Most devel boards have a switch to control booting
* from NOR flash (using external chipselect 3) rather than mask ROM,
* which uses BM to interchange the physical CS0 and CS3 addresses.
*/
static inline u32 omap_cs0_phys(void)
{
return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM)
? OMAP_CS3_PHYS : 0;
}
static inline u32 omap_cs3_phys(void)
{
return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM)
? 0 : OMAP_CS3_PHYS;
}
#endif /* __ASSEMBLER__ */
#endif /* __ASM_ARCH_TC_H */
......@@ -3,6 +3,7 @@
#ifndef __ASM_ARCH_OMAP_USB_H
#define __ASM_ARCH_OMAP_USB_H
#include <linux/io.h>
#include <linux/usb/musb.h>
#include <plat/board.h>
......@@ -105,6 +106,46 @@ extern int omap4430_phy_set_clk(struct device *dev, int on);
extern int omap4430_phy_init(struct device *dev);
extern int omap4430_phy_exit(struct device *dev);
extern int omap4430_phy_suspend(struct device *dev, int suspend);
/*
* NOTE: Please update omap USB drivers to use ioremap + read/write
*/
#define OMAP2_L4_IO_OFFSET 0xb2000000
#define IOMEM(x) ((void __force __iomem *)(x))
#define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET)
static inline u8 omap_readb(u32 pa)
{
return __raw_readb(OMAP2_L4_IO_ADDRESS(pa));
}
static inline u16 omap_readw(u32 pa)
{
return __raw_readw(OMAP2_L4_IO_ADDRESS(pa));
}
static inline u32 omap_readl(u32 pa)
{
return __raw_readl(OMAP2_L4_IO_ADDRESS(pa));
}
static inline void omap_writeb(u8 v, u32 pa)
{
__raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa));
}
static inline void omap_writew(u16 v, u32 pa)
{
__raw_writew(v, OMAP2_L4_IO_ADDRESS(pa));
}
static inline void omap_writel(u32 v, u32 pa)
{
__raw_writel(v, OMAP2_L4_IO_ADDRESS(pa));
}
#endif
extern void am35x_musb_reset(void);
......
......@@ -26,8 +26,11 @@
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include <asm/system.h>
#include <linux/spinlock.h>
#include <asm/system.h>
#include <plat/cpu.h>
#include <plat/mux.h>
#ifdef CONFIG_OMAP_MUX
......
......@@ -31,11 +31,10 @@
#include "sram.h"
/* XXX These "sideways" includes are a sign that something is wrong */
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
# include "../mach-omap2/prm2xxx_3xxx.h"
# include "../mach-omap2/sdrc.h"
#endif
/* XXX These "sideways" includes will disappear when sram.c becomes a driver */
#include "../mach-omap2/iomap.h"
#include "../mach-omap2/prm2xxx_3xxx.h"
#include "../mach-omap2/sdrc.h"
#define OMAP1_SRAM_PA 0x20000000
#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800)
......
......@@ -29,6 +29,10 @@
#include <plat/usb.h>
#include <plat/board.h>
#include <mach/hardware.h>
#include "../mach-omap2/common.h"
#ifdef CONFIG_ARCH_OMAP_OTG
void __init
......
......@@ -26,6 +26,8 @@
#include <asm/io.h>
#include <plat/cpu.h>
#define RNG_OUT_REG 0x00 /* Output register */
#define RNG_STAT_REG 0x04 /* Status register
[0] = STAT_BUSY */
......
......@@ -1064,13 +1064,6 @@ static void omap_gpio_mod_init(struct gpio_bank *bank, int id)
+ OMAP1610_GPIO_IRQSTATUS1);
__raw_writew(0x0014, bank->base
+ OMAP1610_GPIO_SYSCONFIG);
/*
* Enable system clock for GPIO module.
* The CAM_CLK_CTRL *is* really the right place.
*/
omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
ULPD_CAM_CLK_CTRL);
}
if (cpu_is_omap7xx() && bank->method == METHOD_GPIO_7XX) {
__raw_writel(0xffffffff, bank->base
......
......@@ -3272,11 +3272,6 @@ static void _omap_dispc_initial_config(void)
if (dss_has_feature(FEAT_FUNCGATED))
REG_FLD_MOD(DISPC_CONFIG, 1, 9, 9);
/* L3 firewall setting: enable access to OCM RAM */
/* XXX this should be somewhere in plat-omap */
if (cpu_is_omap24xx())
__raw_writel(0x402000b0, OMAP2_L3_IO_ADDRESS(0x680050a0));
_dispc_setup_color_conv_coef();
dispc_set_loadmode(OMAP_DSS_LOAD_FRAME_ONLY);
......
......@@ -33,7 +33,10 @@
#include <linux/pm_runtime.h>
#include <video/omapdss.h>
#include <plat/cpu.h>
#include <plat/clock.h>
#include "dss.h"
#include "dss_features.h"
......
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