diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 9332558fc3dc2d8c1b5f1e04f5dff8c5a4938ce0..098e7c25f4effb7a7c585a03559c622c9eaeebf7 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1442,8 +1442,6 @@ static void intel_pre_enable_dp(struct intel_encoder *encoder)
 		int pipe = intel_crtc->pipe;
 		u32 val;
 
-		WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
-
 		val = intel_dpio_read(dev_priv, DPIO_DATA_LANE_A(port));
 		val = 0;
 		if (pipe)
@@ -1470,8 +1468,6 @@ static void intel_dp_pre_pll_enable(struct intel_encoder *encoder)
 	if (!IS_VALLEYVIEW(dev))
 		return;
 
-	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
-
 	/* Program Tx lane resets to default */
 	intel_dpio_write(dev_priv, DPIO_PCS_TX(port),
 			 DPIO_PCS_TX_LANE2_RESET |
@@ -1622,8 +1618,6 @@ static uint32_t intel_vlv_signal_levels(struct intel_dp *intel_dp)
 	uint8_t train_set = intel_dp->train_set[0];
 	int port = vlv_dport_to_channel(dport);
 
-	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
-
 	switch (train_set & DP_TRAIN_PRE_EMPHASIS_MASK) {
 	case DP_TRAIN_PRE_EMPHASIS_0:
 		preemph_reg_value = 0x0004000;
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 18f8ce0404c65b9574b6f931da01a5ff41a1b39d..83b63d72af837154e12728727581f614b1027664 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1018,8 +1018,6 @@ static void intel_hdmi_pre_enable(struct intel_encoder *encoder)
 	if (!IS_VALLEYVIEW(dev))
 		return;
 
-	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
-
 	/* Enable clock channels for this port */
 	val = intel_dpio_read(dev_priv, DPIO_DATA_LANE_A(port));
 	val = 0;
@@ -1063,8 +1061,6 @@ static void intel_hdmi_pre_pll_enable(struct intel_encoder *encoder)
 	if (!IS_VALLEYVIEW(dev))
 		return;
 
-	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
-
 	/* Program Tx lane resets to default */
 	intel_dpio_write(dev_priv, DPIO_PCS_TX(port),
 			 DPIO_PCS_TX_LANE2_RESET |