提交 91a7c50c 编写于 作者: C Chris Brandt 提交者: Simon Horman

ARM: dts: r7s72100: fix ethernet clock parent

Technically, the Ethernet block is run off the 133MHz Bus (B) clock, not
the 33MHz Peripheral 0 (P0) clock.

Fixes: 969244f9 ("ARM: dts: r7s72100: add ethernet clock to device tree")
Signed-off-by: NChris Brandt <chris.brandt@renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
上级 403fe77e
......@@ -121,7 +121,7 @@
#clock-cells = <1>;
compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0xfcfe0430 4>;
clocks = <&p0_clk>;
clocks = <&b_clk>;
clock-indices = <R7S72100_CLK_ETHER>;
clock-output-names = "ether";
};
......
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