提交 8a413432 编写于 作者: M Marek Szyprowski

common: DMA-mapping: add WRITE_COMBINE attribute

DMA_ATTR_WRITE_COMBINE specifies that writes to the mapping may be
buffered to improve performance. It will be used by the replacement for
ARM/ARV32 specific dma_alloc_writecombine() function.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Acked-by: NKyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>
上级 9adc5374
...@@ -31,3 +31,13 @@ may be weakly ordered, that is that reads and writes may pass each other. ...@@ -31,3 +31,13 @@ may be weakly ordered, that is that reads and writes may pass each other.
Since it is optional for platforms to implement DMA_ATTR_WEAK_ORDERING, Since it is optional for platforms to implement DMA_ATTR_WEAK_ORDERING,
those that do not will simply ignore the attribute and exhibit default those that do not will simply ignore the attribute and exhibit default
behavior. behavior.
DMA_ATTR_WRITE_COMBINE
----------------------
DMA_ATTR_WRITE_COMBINE specifies that writes to the mapping may be
buffered to improve performance.
Since it is optional for platforms to implement DMA_ATTR_WRITE_COMBINE,
those that do not will simply ignore the attribute and exhibit default
behavior.
...@@ -13,6 +13,7 @@ ...@@ -13,6 +13,7 @@
enum dma_attr { enum dma_attr {
DMA_ATTR_WRITE_BARRIER, DMA_ATTR_WRITE_BARRIER,
DMA_ATTR_WEAK_ORDERING, DMA_ATTR_WEAK_ORDERING,
DMA_ATTR_WRITE_COMBINE,
DMA_ATTR_MAX, DMA_ATTR_MAX,
}; };
......
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