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kernel_linux
提交 5fa2674a 编写于 作者: R Roland Vossen 提交者： Greg Kroah-Hartman
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staging: brcm80211: got rid of static function declarations in softmac phy 

Code cleanup. Reshuffled functions so that the declarations were not necessary
anymore.
Reported-by: NJohannes Berg <johannes@sipsolutions.net>
Signed-off-by: NRoland Vossen <rvossen@broadcom.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
上级 b61c23c8
隐藏空白更改
内联 并排
Showing with 14218 addition and 14422 deletion
drivers/staging/brcm80211/brcmsmac/phy/phy_cmn.c
浏览文件 @ 5fa2674a
......@@ -119,32 +119,6 @@ const u8 ofdm_rate_lookup[] = {
#define PHY_WREG_LIMIT 24
static void wlc_set_phy_uninitted(struct brcms_phy *pi);
static u32 wlc_phy_get_radio_ver(struct brcms_phy *pi);
static void wlc_phy_timercb_phycal(struct brcms_phy *pi);
static bool wlc_phy_noise_calc_phy(struct brcms_phy *pi, u32 *cmplx_pwr,
s8 *pwr_ant);
static void wlc_phy_cal_perical_mphase_schedule(struct brcms_phy *pi,
uint delay);
static void wlc_phy_noise_cb(struct brcms_phy *pi, u8 channel, s8 noise_dbm);
static void wlc_phy_noise_sample_request(struct brcms_phy_pub *pih, u8 reason,
u8 ch);
static void wlc_phy_txpower_reg_limit_calc(struct brcms_phy *pi,
struct txpwr_limits *tp,
u16 chanspec);
static bool wlc_phy_cal_txpower_recalc_sw(struct brcms_phy *pi);
static s8 wlc_user_txpwr_antport_to_rfport(struct brcms_phy *pi, uint chan,
u32 band, u8 rate);
static void wlc_phy_upd_env_txpwr_rate_limits(struct brcms_phy *pi, u32 band);
static s8 wlc_phy_env_measure_vbat(struct brcms_phy *pi);
static s8 wlc_phy_env_measure_temperature(struct brcms_phy *pi);
char *phy_getvar(struct brcms_phy *pi, const char *name)
{
char *vars = pi->vars;
......@@ -480,6 +454,37 @@ struct shared_phy *wlc_phy_shared_attach(struct shared_phy_params *shp)
return sh;
}
static void wlc_phy_timercb_phycal(struct brcms_phy *pi)
{
uint delay = 5;
if (PHY_PERICAL_MPHASE_PENDING(pi)) {
if (!pi->sh->up) {
wlc_phy_cal_perical_mphase_reset(pi);
return;
}
if (SCAN_RM_IN_PROGRESS(pi) || PLT_INPROG_PHY(pi)) {
delay = 1000;
wlc_phy_cal_perical_mphase_restart(pi);
} else
wlc_phy_cal_perical_nphy_run(pi, PHY_PERICAL_AUTO);
wlapi_add_timer(pi->sh->physhim, pi->phycal_timer, delay, 0);
return;
}
}
static u32 wlc_phy_get_radio_ver(struct brcms_phy *pi)
{
u32 ver;
ver = read_radio_id(pi);
return ver;
}
struct brcms_phy_pub *
wlc_phy_attach(struct shared_phy *sh, struct d11regs *regs, int bandtype,
char *vars, struct wiphy *wiphy)
......@@ -692,28 +697,6 @@ u32 wlc_phy_get_coreflags(struct brcms_phy_pub *pih)
return pi->pubpi.coreflags;
}
static void wlc_phy_timercb_phycal(struct brcms_phy *pi)
{
uint delay = 5;
if (PHY_PERICAL_MPHASE_PENDING(pi)) {
if (!pi->sh->up) {
wlc_phy_cal_perical_mphase_reset(pi);
return;
}
if (SCAN_RM_IN_PROGRESS(pi) || PLT_INPROG_PHY(pi)) {
delay = 1000;
wlc_phy_cal_perical_mphase_restart(pi);
} else
wlc_phy_cal_perical_nphy_run(pi, PHY_PERICAL_AUTO);
wlapi_add_timer(pi->sh->physhim, pi->phycal_timer, delay, 0);
return;
}
}
void wlc_phy_anacore(struct brcms_phy_pub *pih, bool on)
{
struct brcms_phy *pi = (struct brcms_phy *) pih;
......@@ -909,15 +892,6 @@ int wlc_phy_down(struct brcms_phy_pub *pih)
return callbacks;
}
static u32 wlc_phy_get_radio_ver(struct brcms_phy *pi)
{
u32 ver;
ver = read_radio_id(pi);
return ver;
}
void
wlc_phy_table_addr(struct brcms_phy *pi, uint tbl_id, uint tbl_offset,
u16 tblAddr, u16 tblDataHi, u16 tblDataLo)
......@@ -1594,6 +1568,46 @@ u8 wlc_phy_txpower_get_target_max(struct brcms_phy_pub *ppi)
return pi->tx_power_max;
}
static s8 wlc_phy_env_measure_vbat(struct brcms_phy *pi)
{
if (ISLCNPHY(pi))
return wlc_lcnphy_vbatsense(pi, 0);
else
return 0;
}
static s8 wlc_phy_env_measure_temperature(struct brcms_phy *pi)
{
if (ISLCNPHY(pi))
return wlc_lcnphy_tempsense_degree(pi, 0);
else
return 0;
}
static void wlc_phy_upd_env_txpwr_rate_limits(struct brcms_phy *pi, u32 band)
{
u8 i;
s8 temp, vbat;
for (i = 0; i < TXP_NUM_RATES; i++)
pi->txpwr_env_limit[i] = BRCMS_TXPWR_MAX;
vbat = wlc_phy_env_measure_vbat(pi);
temp = wlc_phy_env_measure_temperature(pi);
}
static s8
wlc_user_txpwr_antport_to_rfport(struct brcms_phy *pi, uint chan, u32 band,
u8 rate)
{
s8 offset = 0;
if (!pi->user_txpwr_at_rfport)
return offset;
return offset;
}
void wlc_phy_txpower_recalc_target(struct brcms_phy *pi)
{
u8 maxtxpwr, mintxpwr, rate, pactrl;
......@@ -2274,6 +2288,123 @@ wlc_phy_noise_calc_phy(struct brcms_phy *pi, u32 *cmplx_pwr, s8 *pwr_ant)
return true;
}
static void wlc_phy_noise_cb(struct brcms_phy *pi, u8 channel, s8 noise_dbm)
{
if (!pi->phynoise_state)
return;
if (pi->phynoise_state & PHY_NOISE_STATE_MON) {
if (pi->phynoise_chan_watchdog == channel) {
pi->sh->phy_noise_window[pi->sh->phy_noise_index] =
noise_dbm;
pi->sh->phy_noise_index =
MODINC(pi->sh->phy_noise_index, MA_WINDOW_SZ);
}
pi->phynoise_state &= ~PHY_NOISE_STATE_MON;
}
if (pi->phynoise_state & PHY_NOISE_STATE_EXTERNAL)
pi->phynoise_state &= ~PHY_NOISE_STATE_EXTERNAL;
}
static s8 wlc_phy_noise_read_shmem(struct brcms_phy *pi)
{
u32 cmplx_pwr[PHY_CORE_MAX];
s8 noise_dbm_ant[PHY_CORE_MAX];
u16 lo, hi;
u32 cmplx_pwr_tot = 0;
s8 noise_dbm = PHY_NOISE_FIXED_VAL_NPHY;
u8 idx, core;
memset((u8 *) cmplx_pwr, 0, sizeof(cmplx_pwr));
memset((u8 *) noise_dbm_ant, 0, sizeof(noise_dbm_ant));
for (idx = 0, core = 0; core < pi->pubpi.phy_corenum; idx += 2,
core++) {
lo = wlapi_bmac_read_shm(pi->sh->physhim, M_PWRIND_MAP(idx));
hi = wlapi_bmac_read_shm(pi->sh->physhim,
M_PWRIND_MAP(idx + 1));
cmplx_pwr[core] = (hi << 16) + lo;
cmplx_pwr_tot += cmplx_pwr[core];
if (cmplx_pwr[core] == 0)
noise_dbm_ant[core] = PHY_NOISE_FIXED_VAL_NPHY;
else
cmplx_pwr[core] >>= PHY_NOISE_SAMPLE_LOG_NUM_UCODE;
}
if (cmplx_pwr_tot != 0)
wlc_phy_noise_calc_phy(pi, cmplx_pwr, noise_dbm_ant);
for (core = 0; core < pi->pubpi.phy_corenum; core++) {
pi->nphy_noise_win[core][pi->nphy_noise_index] =
noise_dbm_ant[core];
if (noise_dbm_ant[core] > noise_dbm)
noise_dbm = noise_dbm_ant[core];
}
pi->nphy_noise_index =
MODINC_POW2(pi->nphy_noise_index, PHY_NOISE_WINDOW_SZ);
return noise_dbm;
}
void wlc_phy_noise_sample_intr(struct brcms_phy_pub *pih)
{
struct brcms_phy *pi = (struct brcms_phy *) pih;
u16 jssi_aux;
u8 channel = 0;
s8 noise_dbm = PHY_NOISE_FIXED_VAL_NPHY;
if (ISLCNPHY(pi)) {
u32 cmplx_pwr, cmplx_pwr0, cmplx_pwr1;
u16 lo, hi;
s32 pwr_offset_dB, gain_dB;
u16 status_0, status_1;
jssi_aux = wlapi_bmac_read_shm(pi->sh->physhim, M_JSSI_AUX);
channel = jssi_aux & D11_CURCHANNEL_MAX;
lo = wlapi_bmac_read_shm(pi->sh->physhim, M_PWRIND_MAP0);
hi = wlapi_bmac_read_shm(pi->sh->physhim, M_PWRIND_MAP1);
cmplx_pwr0 = (hi << 16) + lo;
lo = wlapi_bmac_read_shm(pi->sh->physhim, M_PWRIND_MAP2);
hi = wlapi_bmac_read_shm(pi->sh->physhim, M_PWRIND_MAP3);
cmplx_pwr1 = (hi << 16) + lo;
cmplx_pwr = (cmplx_pwr0 + cmplx_pwr1) >> 6;
status_0 = 0x44;
status_1 = wlapi_bmac_read_shm(pi->sh->physhim, M_JSSI_0);
if ((cmplx_pwr > 0 && cmplx_pwr < 500)
&& ((status_1 & 0xc000) == 0x4000)) {
wlc_phy_compute_dB(&cmplx_pwr, &noise_dbm,
pi->pubpi.phy_corenum);
pwr_offset_dB = (read_phy_reg(pi, 0x434) & 0xFF);
if (pwr_offset_dB > 127)
pwr_offset_dB -= 256;
noise_dbm += (s8) (pwr_offset_dB - 30);
gain_dB = (status_0 & 0x1ff);
noise_dbm -= (s8) (gain_dB);
} else {
noise_dbm = PHY_NOISE_FIXED_VAL_LCNPHY;
}
} else if (ISNPHY(pi)) {
jssi_aux = wlapi_bmac_read_shm(pi->sh->physhim, M_JSSI_AUX);
channel = jssi_aux & D11_CURCHANNEL_MAX;
noise_dbm = wlc_phy_noise_read_shmem(pi);
}
wlc_phy_noise_cb(pi, channel, noise_dbm);
}
static void
wlc_phy_noise_sample_request(struct brcms_phy_pub *pih, u8 reason, u8 ch)
{
......@@ -2408,123 +2539,6 @@ void wlc_phy_noise_sample_request_external(struct brcms_phy_pub *pih)
wlc_phy_noise_sample_request(pih, PHY_NOISE_SAMPLE_EXTERNAL, channel);
}
static void wlc_phy_noise_cb(struct brcms_phy *pi, u8 channel, s8 noise_dbm)
{
if (!pi->phynoise_state)
return;
if (pi->phynoise_state & PHY_NOISE_STATE_MON) {
if (pi->phynoise_chan_watchdog == channel) {
pi->sh->phy_noise_window[pi->sh->phy_noise_index] =
noise_dbm;
pi->sh->phy_noise_index =
MODINC(pi->sh->phy_noise_index, MA_WINDOW_SZ);
}
pi->phynoise_state &= ~PHY_NOISE_STATE_MON;
}
if (pi->phynoise_state & PHY_NOISE_STATE_EXTERNAL)
pi->phynoise_state &= ~PHY_NOISE_STATE_EXTERNAL;
}
static s8 wlc_phy_noise_read_shmem(struct brcms_phy *pi)
{
u32 cmplx_pwr[PHY_CORE_MAX];
s8 noise_dbm_ant[PHY_CORE_MAX];
u16 lo, hi;
u32 cmplx_pwr_tot = 0;
s8 noise_dbm = PHY_NOISE_FIXED_VAL_NPHY;
u8 idx, core;
memset((u8 *) cmplx_pwr, 0, sizeof(cmplx_pwr));
memset((u8 *) noise_dbm_ant, 0, sizeof(noise_dbm_ant));
for (idx = 0, core = 0; core < pi->pubpi.phy_corenum; idx += 2,
core++) {
lo = wlapi_bmac_read_shm(pi->sh->physhim, M_PWRIND_MAP(idx));
hi = wlapi_bmac_read_shm(pi->sh->physhim,
M_PWRIND_MAP(idx + 1));
cmplx_pwr[core] = (hi << 16) + lo;
cmplx_pwr_tot += cmplx_pwr[core];
if (cmplx_pwr[core] == 0)
noise_dbm_ant[core] = PHY_NOISE_FIXED_VAL_NPHY;
else
cmplx_pwr[core] >>= PHY_NOISE_SAMPLE_LOG_NUM_UCODE;
}
if (cmplx_pwr_tot != 0)
wlc_phy_noise_calc_phy(pi, cmplx_pwr, noise_dbm_ant);
for (core = 0; core < pi->pubpi.phy_corenum; core++) {
pi->nphy_noise_win[core][pi->nphy_noise_index] =
noise_dbm_ant[core];
if (noise_dbm_ant[core] > noise_dbm)
noise_dbm = noise_dbm_ant[core];
}
pi->nphy_noise_index =
MODINC_POW2(pi->nphy_noise_index, PHY_NOISE_WINDOW_SZ);
return noise_dbm;
}
void wlc_phy_noise_sample_intr(struct brcms_phy_pub *pih)
{
struct brcms_phy *pi = (struct brcms_phy *) pih;
u16 jssi_aux;
u8 channel = 0;
s8 noise_dbm = PHY_NOISE_FIXED_VAL_NPHY;
if (ISLCNPHY(pi)) {
u32 cmplx_pwr, cmplx_pwr0, cmplx_pwr1;
u16 lo, hi;
s32 pwr_offset_dB, gain_dB;
u16 status_0, status_1;
jssi_aux = wlapi_bmac_read_shm(pi->sh->physhim, M_JSSI_AUX);
channel = jssi_aux & D11_CURCHANNEL_MAX;
lo = wlapi_bmac_read_shm(pi->sh->physhim, M_PWRIND_MAP0);
hi = wlapi_bmac_read_shm(pi->sh->physhim, M_PWRIND_MAP1);
cmplx_pwr0 = (hi << 16) + lo;
lo = wlapi_bmac_read_shm(pi->sh->physhim, M_PWRIND_MAP2);
hi = wlapi_bmac_read_shm(pi->sh->physhim, M_PWRIND_MAP3);
cmplx_pwr1 = (hi << 16) + lo;
cmplx_pwr = (cmplx_pwr0 + cmplx_pwr1) >> 6;
status_0 = 0x44;
status_1 = wlapi_bmac_read_shm(pi->sh->physhim, M_JSSI_0);
if ((cmplx_pwr > 0 && cmplx_pwr < 500)
&& ((status_1 & 0xc000) == 0x4000)) {
wlc_phy_compute_dB(&cmplx_pwr, &noise_dbm,
pi->pubpi.phy_corenum);
pwr_offset_dB = (read_phy_reg(pi, 0x434) & 0xFF);
if (pwr_offset_dB > 127)
pwr_offset_dB -= 256;
noise_dbm += (s8) (pwr_offset_dB - 30);
gain_dB = (status_0 & 0x1ff);
noise_dbm -= (s8) (gain_dB);
} else {
noise_dbm = PHY_NOISE_FIXED_VAL_LCNPHY;
}
} else if (ISNPHY(pi)) {
jssi_aux = wlapi_bmac_read_shm(pi->sh->physhim, M_JSSI_AUX);
channel = jssi_aux & D11_CURCHANNEL_MAX;
noise_dbm = wlc_phy_noise_read_shmem(pi);
}
wlc_phy_noise_cb(pi, channel, noise_dbm);
}
s8 lcnphy_gain_index_offset_for_pkt_rssi[] = {
8,
8,
......@@ -2985,46 +2999,6 @@ void wlc_lcnphy_epa_switch(struct brcms_phy *pi, bool mode)
}
}
static s8
wlc_user_txpwr_antport_to_rfport(struct brcms_phy *pi, uint chan, u32 band,
u8 rate)
{
s8 offset = 0;
if (!pi->user_txpwr_at_rfport)
return offset;
return offset;
}
static s8 wlc_phy_env_measure_vbat(struct brcms_phy *pi)
{
if (ISLCNPHY(pi))
return wlc_lcnphy_vbatsense(pi, 0);
else
return 0;
}
static s8 wlc_phy_env_measure_temperature(struct brcms_phy *pi)
{
if (ISLCNPHY(pi))
return wlc_lcnphy_tempsense_degree(pi, 0);
else
return 0;
}
static void wlc_phy_upd_env_txpwr_rate_limits(struct brcms_phy *pi, u32 band)
{
u8 i;
s8 temp, vbat;
for (i = 0; i < TXP_NUM_RATES; i++)
pi->txpwr_env_limit[i] = BRCMS_TXPWR_MAX;
vbat = wlc_phy_env_measure_vbat(pi);
temp = wlc_phy_env_measure_temperature(pi);
}
void wlc_phy_ldpc_override_set(struct brcms_phy_pub *ppi, bool ldpc)
{
return;
......
drivers/staging/brcm80211/brcmsmac/phy/phy_lcn.c
浏览文件 @ 5fa2674a
仅显示部分。点此显示全部。
......@@ -965,71 +965,6 @@ u16 LCNPHY_txdigfiltcoeffs_ofdm[LCNPHY_NUM_TX_DIG_FILTERS_OFDM]
#define FIXED_TXPWR 78
#define LCNPHY_TEMPSENSE(val) ((s16)((val > 255) ? (val - 512) : val))
static u32 wlc_lcnphy_qdiv_roundup(u32 divident, u32 divisor,
u8 precision);
static void wlc_lcnphy_set_rx_gain_by_distribution(struct brcms_phy *pi,
u16 ext_lna, u16 trsw,
u16 biq2, u16 biq1,
u16 tia, u16 lna2,
u16 lna1);
static void wlc_lcnphy_clear_tx_power_offsets(struct brcms_phy *pi);
static void wlc_lcnphy_set_pa_gain(struct brcms_phy *pi, u16 gain);
static void wlc_lcnphy_set_trsw_override(struct brcms_phy *pi, bool tx,
bool rx);
static void wlc_lcnphy_set_bbmult(struct brcms_phy *pi, u8 m0);
static u8 wlc_lcnphy_get_bbmult(struct brcms_phy *pi);
static void wlc_lcnphy_get_tx_gain(struct brcms_phy *pi,
struct lcnphy_txgains *gains);
static void wlc_lcnphy_set_tx_gain_override(struct brcms_phy *pi, bool bEnable);
static void wlc_lcnphy_toggle_afe_pwdn(struct brcms_phy *pi);
static void wlc_lcnphy_rx_gain_override_enable(struct brcms_phy *pi,
bool enable);
static void wlc_lcnphy_set_tx_gain(struct brcms_phy *pi,
struct lcnphy_txgains *target_gains);
static bool wlc_lcnphy_rx_iq_est(struct brcms_phy *pi, u16 num_samps,
u8 wait_time, struct lcnphy_iq_est *iq_est);
static bool wlc_lcnphy_calc_rx_iq_comp(struct brcms_phy *pi, u16 num_samps);
static u16 wlc_lcnphy_get_pa_gain(struct brcms_phy *pi);
static void wlc_lcnphy_afe_clk_init(struct brcms_phy *pi, u8 mode);
static void wlc_lcnphy_tx_pwr_ctrl_init(struct brcms_phy_pub *ppi);
static void wlc_lcnphy_radio_2064_channel_tune_4313(struct brcms_phy *pi,
u8 channel);
static void wlc_lcnphy_load_tx_gain_table(
struct brcms_phy *pi,
const struct lcnphy_tx_gain_tbl_entry
*g);
static void wlc_lcnphy_samp_cap(struct brcms_phy *pi, int clip_detect_algo,
u16 thresh, s16 *ptr, int mode);
static int wlc_lcnphy_calc_floor(s16 coeff, int type);
static void wlc_lcnphy_tx_iqlo_loopback(struct brcms_phy *pi,
u16 *values_to_save);
static void wlc_lcnphy_tx_iqlo_loopback_cleanup(struct brcms_phy *pi,
u16 *values_to_save);
static void wlc_lcnphy_set_cc(struct brcms_phy *pi, int cal_type, s16 coeff_x,
s16 coeff_y);
static struct lcnphy_unsign16_struct wlc_lcnphy_get_cc(struct brcms_phy *pi,
int cal_type);
static void wlc_lcnphy_a1(struct brcms_phy *pi, int cal_type,
int num_levels, int step_size_lg2);
static void wlc_lcnphy_tx_iqlo_soft_cal_full(struct brcms_phy *pi);
static void wlc_lcnphy_set_chanspec_tweaks(struct brcms_phy *pi,
u16 chanspec);
static void wlc_lcnphy_agc_temp_init(struct brcms_phy *pi);
static void wlc_lcnphy_temp_adj(struct brcms_phy *pi);
static void wlc_lcnphy_clear_papd_comptable(struct brcms_phy *pi);
static void wlc_lcnphy_baseband_init(struct brcms_phy *pi);
static void wlc_lcnphy_radio_init(struct brcms_phy *pi);
static void wlc_lcnphy_rc_cal(struct brcms_phy *pi);
static void wlc_lcnphy_rcal(struct brcms_phy *pi);
static void wlc_lcnphy_txrx_spur_avoidance_mode(struct brcms_phy *pi,
bool enable);
static int wlc_lcnphy_load_tx_iir_filter(struct brcms_phy *pi, bool is_ofdm,
s16 filt_type);
static void wlc_lcnphy_set_rx_iq_comp(struct brcms_phy *pi, u16 a, u16 b);
void wlc_lcnphy_write_table(struct brcms_phy *pi, const struct phytbl_info *pti)
{
wlc_phy_write_table(pi, pti, 0x455, 0x457, 0x456);
......@@ -1115,3062 +1050,3255 @@ static int wlc_lcnphy_calc_floor(s16 coeff_x, int type)
return k;
}
s8 wlc_lcnphy_get_current_tx_pwr_idx(struct brcms_phy *pi)
{
s8 index;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
if (txpwrctrl_off(pi))
index = pi_lcn->lcnphy_current_index;
else if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi))
index = (s8) (wlc_lcnphy_get_current_tx_pwr_idx_if_pwrctrl_on(
pi) / 2);
else
index = pi_lcn->lcnphy_current_index;
return index;
}
static u32 wlc_lcnphy_measure_digital_power(struct brcms_phy *pi, u16 nsamples)
{
struct lcnphy_iq_est iq_est = { 0, 0, 0 };
if (!wlc_lcnphy_rx_iq_est(pi, nsamples, 32, &iq_est))
return 0;
return (iq_est.i_pwr + iq_est.q_pwr) / nsamples;
}
void wlc_lcnphy_crsuprs(struct brcms_phy *pi, int channel)
static void
wlc_lcnphy_get_tx_gain(struct brcms_phy *pi, struct lcnphy_txgains *gains)
{
u16 afectrlovr, afectrlovrval;
afectrlovr = read_phy_reg(pi, 0x43b);
afectrlovrval = read_phy_reg(pi, 0x43c);
if (channel != 0) {
mod_phy_reg(pi, 0x43b, (0x1 << 1), (1) << 1);
u16 dac_gain;
mod_phy_reg(pi, 0x43c, (0x1 << 1), (0) << 1);
dac_gain = read_phy_reg(pi, 0x439) >> 0;
gains->dac_gain = (dac_gain & 0x380) >> 7;
mod_phy_reg(pi, 0x43b, (0x1 << 4), (1) << 4);
{
u16 rfgain0, rfgain1;
mod_phy_reg(pi, 0x43c, (0x1 << 6), (0) << 6);
rfgain0 = (read_phy_reg(pi, 0x4b5) & (0xffff << 0)) >> 0;
rfgain1 = (read_phy_reg(pi, 0x4fb) & (0x7fff << 0)) >> 0;
write_phy_reg(pi, 0x44b, 0xffff);
wlc_lcnphy_tx_pu(pi, 1);
gains->gm_gain = rfgain0 & 0xff;
gains->pga_gain = (rfgain0 >> 8) & 0xff;
gains->pad_gain = rfgain1 & 0xff;
}
}
mod_phy_reg(pi, 0x634, (0xff << 8), (0) << 8);
or_phy_reg(pi, 0x6da, 0x0080);
static void wlc_lcnphy_set_dac_gain(struct brcms_phy *pi, u16 dac_gain)
{
u16 dac_ctrl;
or_phy_reg(pi, 0x00a, 0x228);
} else {
and_phy_reg(pi, 0x00a, ~(0x228));
dac_ctrl = (read_phy_reg(pi, 0x439) >> 0);
dac_ctrl = dac_ctrl & 0xc7f;
dac_ctrl = dac_ctrl | (dac_gain << 7);
mod_phy_reg(pi, 0x439, (0xfff << 0), (dac_ctrl) << 0);
and_phy_reg(pi, 0x6da, 0xFF7F);
write_phy_reg(pi, 0x43b, afectrlovr);
write_phy_reg(pi, 0x43c, afectrlovrval);
}
}
static void wlc_lcnphy_toggle_afe_pwdn(struct brcms_phy *pi)
static void wlc_lcnphy_set_tx_gain_override(struct brcms_phy *pi, bool bEnable)
{
u16 save_AfeCtrlOvrVal, save_AfeCtrlOvr;
save_AfeCtrlOvrVal = read_phy_reg(pi, 0x43c);
save_AfeCtrlOvr = read_phy_reg(pi, 0x43b);
u16 bit = bEnable ? 1 : 0;
write_phy_reg(pi, 0x43c, save_AfeCtrlOvrVal | 0x1);
write_phy_reg(pi, 0x43b, save_AfeCtrlOvr | 0x1);
mod_phy_reg(pi, 0x4b0, (0x1 << 7), bit << 7);
write_phy_reg(pi, 0x43c, save_AfeCtrlOvrVal & 0xfffe);
write_phy_reg(pi, 0x43b, save_AfeCtrlOvr & 0xfffe);
mod_phy_reg(pi, 0x4b0, (0x1 << 14), bit << 14);
write_phy_reg(pi, 0x43c, save_AfeCtrlOvrVal);
write_phy_reg(pi, 0x43b, save_AfeCtrlOvr);
mod_phy_reg(pi, 0x43b, (0x1 << 6), bit << 6);
}
static void
wlc_lcnphy_txrx_spur_avoidance_mode(struct brcms_phy *pi, bool enable)
wlc_lcnphy_rx_gain_override_enable(struct brcms_phy *pi, bool enable)
{
if (enable) {
write_phy_reg(pi, 0x942, 0x7);
write_phy_reg(pi, 0x93b, ((1 << 13) + 23));
write_phy_reg(pi, 0x93c, ((1 << 13) + 1989));
u16 ebit = enable ? 1 : 0;
write_phy_reg(pi, 0x44a, 0x084);
write_phy_reg(pi, 0x44a, 0x080);
write_phy_reg(pi, 0x6d3, 0x2222);
write_phy_reg(pi, 0x6d3, 0x2220);
mod_phy_reg(pi, 0x4b0, (0x1 << 8), ebit << 8);
mod_phy_reg(pi, 0x44c, (0x1 << 0), ebit << 0);
if (LCNREV_LT(pi->pubpi.phy_rev, 2)) {
mod_phy_reg(pi, 0x44c, (0x1 << 4), ebit << 4);
mod_phy_reg(pi, 0x44c, (0x1 << 6), ebit << 6);
mod_phy_reg(pi, 0x4b0, (0x1 << 5), ebit << 5);
mod_phy_reg(pi, 0x4b0, (0x1 << 6), ebit << 6);
} else {
write_phy_reg(pi, 0x942, 0x0);
write_phy_reg(pi, 0x93b, ((0 << 13) + 23));
write_phy_reg(pi, 0x93c, ((0 << 13) + 1989));
mod_phy_reg(pi, 0x4b0, (0x1 << 12), ebit << 12);
mod_phy_reg(pi, 0x4b0, (0x1 << 13), ebit << 13);
mod_phy_reg(pi, 0x4b0, (0x1 << 5), ebit << 5);
}
if (CHSPEC_IS2G(pi->radio_chanspec)) {
mod_phy_reg(pi, 0x4b0, (0x1 << 10), ebit << 10);
mod_phy_reg(pi, 0x4e5, (0x1 << 3), ebit << 3);
}
wlapi_switch_macfreq(pi->sh->physhim, enable);
}
void wlc_phy_chanspec_set_lcnphy(struct brcms_phy *pi, u16 chanspec)
static void
wlc_lcnphy_set_rx_gain_by_distribution(struct brcms_phy *pi,
u16 trsw,
u16 ext_lna,
u16 biq2,
u16 biq1,
u16 tia, u16 lna2, u16 lna1)
{
u8 channel = CHSPEC_CHANNEL(chanspec);
wlc_phy_chanspec_radio_set((struct brcms_phy_pub *) pi, chanspec);
wlc_lcnphy_set_chanspec_tweaks(pi, pi->radio_chanspec);
or_phy_reg(pi, 0x44a, 0x44);
write_phy_reg(pi, 0x44a, 0x80);
wlc_lcnphy_radio_2064_channel_tune_4313(pi, channel);
udelay(1000);
wlc_lcnphy_toggle_afe_pwdn(pi);
u16 gain0_15, gain16_19;
write_phy_reg(pi, 0x657, lcnphy_sfo_cfg[channel - 1].ptcentreTs20);
write_phy_reg(pi, 0x658, lcnphy_sfo_cfg[channel - 1].ptcentreFactor);
gain16_19 = biq2 & 0xf;
gain0_15 = ((biq1 & 0xf) << 12) |
((tia & 0xf) << 8) |
((lna2 & 0x3) << 6) |
((lna2 &
0x3) << 4) | ((lna1 & 0x3) << 2) | ((lna1 & 0x3) << 0);
if (CHSPEC_CHANNEL(pi->radio_chanspec) == 14) {
mod_phy_reg(pi, 0x448, (0x3 << 8), (2) << 8);
mod_phy_reg(pi, 0x4b6, (0xffff << 0), gain0_15 << 0);
mod_phy_reg(pi, 0x4b7, (0xf << 0), gain16_19 << 0);
mod_phy_reg(pi, 0x4b1, (0x3 << 11), lna1 << 11);
wlc_lcnphy_load_tx_iir_filter(pi, false, 3);
if (LCNREV_LT(pi->pubpi.phy_rev, 2)) {
mod_phy_reg(pi, 0x4b1, (0x1 << 9), ext_lna << 9);
mod_phy_reg(pi, 0x4b1, (0x1 << 10), ext_lna << 10);
} else {
mod_phy_reg(pi, 0x448, (0x3 << 8), (1) << 8);
mod_phy_reg(pi, 0x4b1, (0x1 << 10), 0 << 10);
wlc_lcnphy_load_tx_iir_filter(pi, false, 2);
}
mod_phy_reg(pi, 0x4b1, (0x1 << 15), 0 << 15);
wlc_lcnphy_load_tx_iir_filter(pi, true, 0);
mod_phy_reg(pi, 0x4b1, (0x1 << 9), ext_lna << 9);
}
mod_phy_reg(pi, 0x4eb, (0x7 << 3), (1) << 3);
mod_phy_reg(pi, 0x44d, (0x1 << 0), (!trsw) << 0);
}
static void wlc_lcnphy_set_dac_gain(struct brcms_phy *pi, u16 dac_gain)
static void wlc_lcnphy_set_trsw_override(struct brcms_phy *pi, bool tx, bool rx)
{
u16 dac_ctrl;
dac_ctrl = (read_phy_reg(pi, 0x439) >> 0);
dac_ctrl = dac_ctrl & 0xc7f;
dac_ctrl = dac_ctrl | (dac_gain << 7);
mod_phy_reg(pi, 0x439, (0xfff << 0), (dac_ctrl) << 0);
mod_phy_reg(pi, 0x44d,
(0x1 << 1) |
(0x1 << 0), (tx ? (0x1 << 1) : 0) | (rx ? (0x1 << 0) : 0));
or_phy_reg(pi, 0x44c, (0x1 << 1) | (0x1 << 0));
}
static void wlc_lcnphy_set_tx_gain_override(struct brcms_phy *pi, bool bEnable)
static void wlc_lcnphy_clear_trsw_override(struct brcms_phy *pi)
{
u16 bit = bEnable ? 1 : 0;
mod_phy_reg(pi, 0x4b0, (0x1 << 7), bit << 7);
mod_phy_reg(pi, 0x4b0, (0x1 << 14), bit << 14);
mod_phy_reg(pi, 0x43b, (0x1 << 6), bit << 6);
and_phy_reg(pi, 0x44c, (u16) ~((0x1 << 1) | (0x1 << 0)));
}
static u16 wlc_lcnphy_get_pa_gain(struct brcms_phy *pi)
static void wlc_lcnphy_set_rx_iq_comp(struct brcms_phy *pi, u16 a, u16 b)
{
u16 pa_gain;
pa_gain = (read_phy_reg(pi, 0x4fb) &
LCNPHY_txgainctrlovrval1_pagain_ovr_val1_MASK) >>
LCNPHY_txgainctrlovrval1_pagain_ovr_val1_SHIFT;
mod_phy_reg(pi, 0x645, (0x3ff << 0), (a) << 0);
return pa_gain;
}
mod_phy_reg(pi, 0x646, (0x3ff << 0), (b) << 0);
static void wlc_lcnphy_set_tx_gain(struct brcms_phy *pi,
struct lcnphy_txgains *target_gains)
{
u16 pa_gain = wlc_lcnphy_get_pa_gain(pi);
mod_phy_reg(pi, 0x647, (0x3ff << 0), (a) << 0);
mod_phy_reg(
pi, 0x4b5,
(0xffff << 0),
((target_gains->gm_gain) |
(target_gains->pga_gain << 8)) <<
0);
mod_phy_reg(pi, 0x4fb,
(0x7fff << 0),
((target_gains->pad_gain) | (pa_gain << 8)) << 0);
mod_phy_reg(pi, 0x648, (0x3ff << 0), (b) << 0);
mod_phy_reg(
pi, 0x4fc,
(0xffff << 0),
((target_gains->gm_gain) |
(target_gains->pga_gain << 8)) <<
0);
mod_phy_reg(pi, 0x4fd,
(0x7fff << 0),
((target_gains->pad_gain) | (pa_gain << 8)) << 0);
mod_phy_reg(pi, 0x649, (0x3ff << 0), (a) << 0);
wlc_lcnphy_set_dac_gain(pi, target_gains->dac_gain);
mod_phy_reg(pi, 0x64a, (0x3ff << 0), (b) << 0);
wlc_lcnphy_enable_tx_gain_override(pi);
}
static void wlc_lcnphy_set_bbmult(struct brcms_phy *pi, u8 m0)
static bool
wlc_lcnphy_rx_iq_est(struct brcms_phy *pi,
u16 num_samps,
u8 wait_time, struct lcnphy_iq_est *iq_est)
{
u16 m0m1 = (u16) m0 << 8;
struct phytbl_info tab;
int wait_count = 0;
bool result = true;
u8 phybw40;
phybw40 = CHSPEC_IS40(pi->radio_chanspec);
tab.tbl_ptr = &m0m1;
tab.tbl_len = 1;
tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL;
tab.tbl_offset = 87;
tab.tbl_width = 16;
wlc_lcnphy_write_table(pi, &tab);
}
mod_phy_reg(pi, 0x6da, (0x1 << 5), (1) << 5);
static void wlc_lcnphy_clear_tx_power_offsets(struct brcms_phy *pi)
{
u32 data_buf[64];
struct phytbl_info tab;
mod_phy_reg(pi, 0x410, (0x1 << 3), (0) << 3);
memset(data_buf, 0, sizeof(data_buf));
mod_phy_reg(pi, 0x482, (0xffff << 0), (num_samps) << 0);
tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
tab.tbl_width = 32;
tab.tbl_ptr = data_buf;
mod_phy_reg(pi, 0x481, (0xff << 0), ((u16) wait_time) << 0);
if (!wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) {
mod_phy_reg(pi, 0x481, (0x1 << 8), (0) << 8);
tab.tbl_len = 30;
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET;
wlc_lcnphy_write_table(pi, &tab);
}
mod_phy_reg(pi, 0x481, (0x1 << 9), (1) << 9);
tab.tbl_len = 64;
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_MAC_OFFSET;
wlc_lcnphy_write_table(pi, &tab);
}
while (read_phy_reg(pi, 0x481) & (0x1 << 9)) {
enum lcnphy_tssi_mode {
LCNPHY_TSSI_PRE_PA,
LCNPHY_TSSI_POST_PA,
LCNPHY_TSSI_EXT
};
if (wait_count > (10 * 500)) {
result = false;
goto cleanup;
}
udelay(100);
wait_count++;
}
static void
wlc_lcnphy_set_tssi_mux(struct brcms_phy *pi, enum lcnphy_tssi_mode pos)
{
mod_phy_reg(pi, 0x4d7, (0x1 << 0), (0x1) << 0);
iq_est->iq_prod = ((u32) read_phy_reg(pi, 0x483) << 16) |
(u32) read_phy_reg(pi, 0x484);
iq_est->i_pwr = ((u32) read_phy_reg(pi, 0x485) << 16) |
(u32) read_phy_reg(pi, 0x486);
iq_est->q_pwr = ((u32) read_phy_reg(pi, 0x487) << 16) |
(u32) read_phy_reg(pi, 0x488);
mod_phy_reg(pi, 0x4d7, (0x1 << 6), (1) << 6);
cleanup:
mod_phy_reg(pi, 0x410, (0x1 << 3), (1) << 3);
if (LCNPHY_TSSI_POST_PA == pos) {
mod_phy_reg(pi, 0x4d9, (0x1 << 2), (0) << 2);
mod_phy_reg(pi, 0x6da, (0x1 << 5), (0) << 5);
mod_phy_reg(pi, 0x4d9, (0x1 << 3), (1) << 3);
return result;
}
if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
mod_radio_reg(pi, RADIO_2064_REG086, 0x4, 0x4);
} else {
mod_radio_reg(pi, RADIO_2064_REG03A, 1, 0x1);
mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 0x8);
}
} else {
mod_phy_reg(pi, 0x4d9, (0x1 << 2), (0x1) << 2);
static bool wlc_lcnphy_calc_rx_iq_comp(struct brcms_phy *pi, u16 num_samps)
{
#define LCNPHY_MIN_RXIQ_PWR 2
bool result;
u16 a0_new, b0_new;
struct lcnphy_iq_est iq_est = { 0, 0, 0 };
s32 a, b, temp;
s16 iq_nbits, qq_nbits, arsh, brsh;
s32 iq;
u32 ii, qq;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
mod_phy_reg(pi, 0x4d9, (0x1 << 3), (0) << 3);
a0_new = ((read_phy_reg(pi, 0x645) & (0x3ff << 0)) >> 0);
b0_new = ((read_phy_reg(pi, 0x646) & (0x3ff << 0)) >> 0);
mod_phy_reg(pi, 0x6d1, (0x1 << 2), (0) << 2);
if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
mod_radio_reg(pi, RADIO_2064_REG086, 0x4, 0x4);
} else {
mod_radio_reg(pi, RADIO_2064_REG03A, 1, 0);
mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 0x8);
}
}
mod_phy_reg(pi, 0x637, (0x3 << 14), (0) << 14);
mod_phy_reg(pi, 0x64b, (0x1 << 6), (1) << 6);
if (LCNPHY_TSSI_EXT == pos) {
write_radio_reg(pi, RADIO_2064_REG07F, 1);
mod_radio_reg(pi, RADIO_2064_REG005, 0x7, 0x2);
mod_radio_reg(pi, RADIO_2064_REG112, 0x80, 0x1 << 7);
mod_radio_reg(pi, RADIO_2064_REG028, 0x1f, 0x3);
}
}
wlc_lcnphy_set_rx_iq_comp(pi, 0, 0);
static u16 wlc_lcnphy_rfseq_tbl_adc_pwrup(struct brcms_phy *pi)
{
u16 N1, N2, N3, N4, N5, N6, N;
N1 = ((read_phy_reg(pi, 0x4a5) & (0xff << 0))
>> 0);
N2 = 1 << ((read_phy_reg(pi, 0x4a5) & (0x7 << 12))
>> 12);
N3 = ((read_phy_reg(pi, 0x40d) & (0xff << 0))
>> 0);
N4 = 1 << ((read_phy_reg(pi, 0x40d) & (0x7 << 8))
>> 8);
N5 = ((read_phy_reg(pi, 0x4a2) & (0xff << 0))
>> 0);
N6 = 1 << ((read_phy_reg(pi, 0x4a2) & (0x7 << 8))
>> 8);
N = 2 * (N1 + N2 + N3 + N4 + 2 * (N5 + N6)) + 80;
if (N < 1600)
N = 1600;
return N;
}
result = wlc_lcnphy_rx_iq_est(pi, num_samps, 32, &iq_est);
if (!result)
goto cleanup;
static void wlc_lcnphy_pwrctrl_rssiparams(struct brcms_phy *pi)
{
u16 auxpga_vmid, auxpga_vmid_temp, auxpga_gain_temp;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
iq = (s32) iq_est.iq_prod;
ii = iq_est.i_pwr;
qq = iq_est.q_pwr;
auxpga_vmid = (2 << 8) |
(pi_lcn->lcnphy_rssi_vc << 4) | pi_lcn->lcnphy_rssi_vf;
auxpga_vmid_temp = (2 << 8) | (8 << 4) | 4;
auxpga_gain_temp = 2;
if ((ii + qq) < LCNPHY_MIN_RXIQ_PWR) {
result = false;
goto cleanup;
}
mod_phy_reg(pi, 0x4d8, (0x1 << 0), (0) << 0);
iq_nbits = wlc_phy_nbits(iq);
qq_nbits = wlc_phy_nbits(qq);
mod_phy_reg(pi, 0x4d8, (0x1 << 1), (0) << 1);
arsh = 10 - (30 - iq_nbits);
if (arsh >= 0) {
a = (-(iq << (30 - iq_nbits)) + (ii >> (1 + arsh)));
temp = (s32) (ii >> arsh);
if (temp == 0)
return false;
} else {
a = (-(iq << (30 - iq_nbits)) + (ii << (-1 - arsh)));
temp = (s32) (ii << -arsh);
if (temp == 0)
return false;
}
a /= temp;
brsh = qq_nbits - 31 + 20;
if (brsh >= 0) {
b = (qq << (31 - qq_nbits));
temp = (s32) (ii >> brsh);
if (temp == 0)
return false;
} else {
b = (qq << (31 - qq_nbits));
temp = (s32) (ii << -brsh);
if (temp == 0)
return false;
}
b /= temp;
b -= a * a;
b = (s32) int_sqrt((unsigned long) b);
b -= (1 << 10);
a0_new = (u16) (a & 0x3ff);
b0_new = (u16) (b & 0x3ff);
cleanup:
mod_phy_reg(pi, 0x4d7, (0x1 << 3), (0) << 3);
wlc_lcnphy_set_rx_iq_comp(pi, a0_new, b0_new);
mod_phy_reg(pi, 0x4db,
(0x3ff << 0) |
(0x7 << 12),
(auxpga_vmid << 0) | (pi_lcn->lcnphy_rssi_gs << 12));
mod_phy_reg(pi, 0x64b, (0x1 << 0), (1) << 0);
mod_phy_reg(pi, 0x4dc,
(0x3ff << 0) |
(0x7 << 12),
(auxpga_vmid << 0) | (pi_lcn->lcnphy_rssi_gs << 12));
mod_phy_reg(pi, 0x64b, (0x1 << 3), (1) << 3);
mod_phy_reg(pi, 0x40a,
(0x3ff << 0) |
(0x7 << 12),
(auxpga_vmid << 0) | (pi_lcn->lcnphy_rssi_gs << 12));
pi_lcn->lcnphy_cal_results.rxiqcal_coeff_a0 = a0_new;
pi_lcn->lcnphy_cal_results.rxiqcal_coeff_b0 = b0_new;
mod_phy_reg(pi, 0x40b,
(0x3ff << 0) |
(0x7 << 12),
(auxpga_vmid_temp << 0) | (auxpga_gain_temp << 12));
return result;
}
mod_phy_reg(pi, 0x40c,
(0x3ff << 0) |
(0x7 << 12),
(auxpga_vmid_temp << 0) | (auxpga_gain_temp << 12));
static u32 wlc_lcnphy_measure_digital_power(struct brcms_phy *pi, u16 nsamples)
{
struct lcnphy_iq_est iq_est = { 0, 0, 0 };
mod_radio_reg(pi, RADIO_2064_REG082, (1 << 5), (1 << 5));
if (!wlc_lcnphy_rx_iq_est(pi, nsamples, 32, &iq_est))
return 0;
return (iq_est.i_pwr + iq_est.q_pwr) / nsamples;
}
static void wlc_lcnphy_tssi_setup(struct brcms_phy *pi)
static bool
wlc_lcnphy_rx_iq_cal(struct brcms_phy *pi,
const struct lcnphy_rx_iqcomp *iqcomp,
int iqcomp_sz, bool tx_switch, bool rx_switch, int module,
int tx_gain_idx)
{
struct phytbl_info tab;
u32 rfseq, ind;
struct lcnphy_txgains old_gains;
u16 tx_pwr_ctrl;
u8 tx_gain_index_old = 0;
bool result = false, tx_gain_override_old = false;
u16 i, Core1TxControl_old, RFOverride0_old,
RFOverrideVal0_old, rfoverride2_old, rfoverride2val_old,
rfoverride3_old, rfoverride3val_old, rfoverride4_old,
rfoverride4val_old, afectrlovr_old, afectrlovrval_old;
int tia_gain;
u32 received_power, rx_pwr_threshold;
u16 old_sslpnCalibClkEnCtrl, old_sslpnRxFeClkEnCtrl;
u16 values_to_save[11];
s16 *ptr;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
tab.tbl_width = 32;
tab.tbl_ptr = &ind;
tab.tbl_len = 1;
tab.tbl_offset = 0;
for (ind = 0; ind < 128; ind++) {
wlc_lcnphy_write_table(pi, &tab);
tab.tbl_offset++;
}
tab.tbl_offset = 704;
for (ind = 0; ind < 128; ind++) {
wlc_lcnphy_write_table(pi, &tab);
tab.tbl_offset++;
ptr = kmalloc(sizeof(s16) * 131, GFP_ATOMIC);
if (NULL == ptr)
return false;
if (module == 2) {
while (iqcomp_sz--) {
if (iqcomp[iqcomp_sz].chan ==
CHSPEC_CHANNEL(pi->radio_chanspec)) {
wlc_lcnphy_set_rx_iq_comp(pi,
(u16)
iqcomp[iqcomp_sz].a,
(u16)
iqcomp[iqcomp_sz].b);
result = true;
break;
}
}
goto cal_done;
}
mod_phy_reg(pi, 0x503, (0x1 << 0), (0) << 0);
mod_phy_reg(pi, 0x503, (0x1 << 2), (0) << 2);
if (module == 1) {
mod_phy_reg(pi, 0x503, (0x1 << 4), (1) << 4);
tx_pwr_ctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
wlc_lcnphy_set_tssi_mux(pi, LCNPHY_TSSI_EXT);
mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0) << 14);
for (i = 0; i < 11; i++)
values_to_save[i] =
read_radio_reg(pi, rxiq_cal_rf_reg[i]);
Core1TxControl_old = read_phy_reg(pi, 0x631);
mod_phy_reg(pi, 0x4a4, (0x1 << 15), (1) << 15);
or_phy_reg(pi, 0x631, 0x0015);
mod_phy_reg(pi, 0x4d0, (0x1 << 5), (0) << 5);
RFOverride0_old = read_phy_reg(pi, 0x44c);
RFOverrideVal0_old = read_phy_reg(pi, 0x44d);
rfoverride2_old = read_phy_reg(pi, 0x4b0);
rfoverride2val_old = read_phy_reg(pi, 0x4b1);
rfoverride3_old = read_phy_reg(pi, 0x4f9);
rfoverride3val_old = read_phy_reg(pi, 0x4fa);
rfoverride4_old = read_phy_reg(pi, 0x938);
rfoverride4val_old = read_phy_reg(pi, 0x939);
afectrlovr_old = read_phy_reg(pi, 0x43b);
afectrlovrval_old = read_phy_reg(pi, 0x43c);
old_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da);
old_sslpnRxFeClkEnCtrl = read_phy_reg(pi, 0x6db);
mod_phy_reg(pi, 0x4a4, (0x1ff << 0), (0) << 0);
tx_gain_override_old = wlc_lcnphy_tx_gain_override_enabled(pi);
if (tx_gain_override_old) {
wlc_lcnphy_get_tx_gain(pi, &old_gains);
tx_gain_index_old = pi_lcn->lcnphy_current_index;
}
mod_phy_reg(pi, 0x4a5, (0xff << 0), (255) << 0);
wlc_lcnphy_set_tx_pwr_by_index(pi, tx_gain_idx);
mod_phy_reg(pi, 0x4a5, (0x7 << 12), (5) << 12);
mod_phy_reg(pi, 0x4f9, (0x1 << 0), 1 << 0);
mod_phy_reg(pi, 0x4fa, (0x1 << 0), 0 << 0);
mod_phy_reg(pi, 0x4a5, (0x7 << 8), (0) << 8);
mod_phy_reg(pi, 0x43b, (0x1 << 1), 1 << 1);
mod_phy_reg(pi, 0x43c, (0x1 << 1), 0 << 1);
mod_phy_reg(pi, 0x40d, (0xff << 0), (64) << 0);
write_radio_reg(pi, RADIO_2064_REG116, 0x06);
write_radio_reg(pi, RADIO_2064_REG12C, 0x07);
write_radio_reg(pi, RADIO_2064_REG06A, 0xd3);
write_radio_reg(pi, RADIO_2064_REG098, 0x03);
write_radio_reg(pi, RADIO_2064_REG00B, 0x7);
mod_radio_reg(pi, RADIO_2064_REG113, 1 << 4, 1 << 4);
write_radio_reg(pi, RADIO_2064_REG01D, 0x01);
write_radio_reg(pi, RADIO_2064_REG114, 0x01);
write_radio_reg(pi, RADIO_2064_REG02E, 0x10);
write_radio_reg(pi, RADIO_2064_REG12A, 0x08);
mod_phy_reg(pi, 0x40d, (0x7 << 8), (4) << 8);
mod_phy_reg(pi, 0x938, (0x1 << 0), 1 << 0);
mod_phy_reg(pi, 0x939, (0x1 << 0), 0 << 0);
mod_phy_reg(pi, 0x938, (0x1 << 1), 1 << 1);
mod_phy_reg(pi, 0x939, (0x1 << 1), 1 << 1);
mod_phy_reg(pi, 0x938, (0x1 << 2), 1 << 2);
mod_phy_reg(pi, 0x939, (0x1 << 2), 1 << 2);
mod_phy_reg(pi, 0x938, (0x1 << 3), 1 << 3);
mod_phy_reg(pi, 0x939, (0x1 << 3), 1 << 3);
mod_phy_reg(pi, 0x938, (0x1 << 5), 1 << 5);
mod_phy_reg(pi, 0x939, (0x1 << 5), 0 << 5);
mod_phy_reg(pi, 0x4a2, (0xff << 0), (64) << 0);
mod_phy_reg(pi, 0x43b, (0x1 << 0), 1 << 0);
mod_phy_reg(pi, 0x43c, (0x1 << 0), 0 << 0);
mod_phy_reg(pi, 0x4a2, (0x7 << 8), (4) << 8);
wlc_lcnphy_start_tx_tone(pi, 2000, 120, 0);
write_phy_reg(pi, 0x6da, 0xffff);
or_phy_reg(pi, 0x6db, 0x3);
wlc_lcnphy_set_trsw_override(pi, tx_switch, rx_switch);
wlc_lcnphy_rx_gain_override_enable(pi, true);
mod_phy_reg(pi, 0x4d0, (0x1ff << 6), (0) << 6);
tia_gain = 8;
rx_pwr_threshold = 950;
while (tia_gain > 0) {
tia_gain -= 1;
wlc_lcnphy_set_rx_gain_by_distribution(pi,
0, 0, 2, 2,
(u16)
tia_gain, 1, 0);
udelay(500);
mod_phy_reg(pi, 0x4a8, (0xff << 0), (0x1) << 0);
received_power =
wlc_lcnphy_measure_digital_power(pi, 2000);
if (received_power < rx_pwr_threshold)
break;
}
result = wlc_lcnphy_calc_rx_iq_comp(pi, 0xffff);
wlc_lcnphy_clear_tx_power_offsets(pi);
wlc_lcnphy_stop_tx_tone(pi);
mod_phy_reg(pi, 0x4a6, (0x1 << 15), (1) << 15);
write_phy_reg(pi, 0x631, Core1TxControl_old);
mod_phy_reg(pi, 0x4a6, (0x1ff << 0), (0xff) << 0);
write_phy_reg(pi, 0x44c, RFOverrideVal0_old);
write_phy_reg(pi, 0x44d, RFOverrideVal0_old);
write_phy_reg(pi, 0x4b0, rfoverride2_old);
write_phy_reg(pi, 0x4b1, rfoverride2val_old);
write_phy_reg(pi, 0x4f9, rfoverride3_old);
write_phy_reg(pi, 0x4fa, rfoverride3val_old);
write_phy_reg(pi, 0x938, rfoverride4_old);
write_phy_reg(pi, 0x939, rfoverride4val_old);
write_phy_reg(pi, 0x43b, afectrlovr_old);
write_phy_reg(pi, 0x43c, afectrlovrval_old);
write_phy_reg(pi, 0x6da, old_sslpnCalibClkEnCtrl);
write_phy_reg(pi, 0x6db, old_sslpnRxFeClkEnCtrl);
mod_phy_reg(pi, 0x49a, (0x1ff << 0), (0xff) << 0);
wlc_lcnphy_clear_trsw_override(pi);
if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
mod_radio_reg(pi, RADIO_2064_REG028, 0xf, 0xe);
mod_radio_reg(pi, RADIO_2064_REG086, 0x4, 0x4);
} else {
mod_radio_reg(pi, RADIO_2064_REG03A, 0x1, 1);
mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 1 << 3);
}
mod_phy_reg(pi, 0x44c, (0x1 << 2), 0 << 2);
write_radio_reg(pi, RADIO_2064_REG025, 0xc);
for (i = 0; i < 11; i++)
write_radio_reg(pi, rxiq_cal_rf_reg[i],
values_to_save[i]);
if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
mod_radio_reg(pi, RADIO_2064_REG03A, 0x1, 1);
} else {
if (CHSPEC_IS2G(pi->radio_chanspec))
mod_radio_reg(pi, RADIO_2064_REG03A, 0x2, 1 << 1);
if (tx_gain_override_old)
wlc_lcnphy_set_tx_pwr_by_index(pi, tx_gain_index_old);
else
mod_radio_reg(pi, RADIO_2064_REG03A, 0x2, 0 << 1);
wlc_lcnphy_disable_tx_gain_override(pi);
wlc_lcnphy_set_tx_pwr_ctrl(pi, tx_pwr_ctrl);
wlc_lcnphy_rx_gain_override_enable(pi, false);
}
if (LCNREV_IS(pi->pubpi.phy_rev, 2))
mod_radio_reg(pi, RADIO_2064_REG03A, 0x2, 1 << 1);
else
mod_radio_reg(pi, RADIO_2064_REG03A, 0x4, 1 << 2);
cal_done:
kfree(ptr);
return result;
}
mod_radio_reg(pi, RADIO_2064_REG11A, 0x1, 1 << 0);
s8 wlc_lcnphy_get_current_tx_pwr_idx(struct brcms_phy *pi)
{
s8 index;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
mod_radio_reg(pi, RADIO_2064_REG005, 0x8, 1 << 3);
if (txpwrctrl_off(pi))
index = pi_lcn->lcnphy_current_index;
else if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi))
index = (s8) (wlc_lcnphy_get_current_tx_pwr_idx_if_pwrctrl_on(
pi) / 2);
else
index = pi_lcn->lcnphy_current_index;
return index;
}
if (!wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))
mod_phy_reg(pi, 0x4d7,
(0x1 << 3) | (0x7 << 12), 0 << 3 | 2 << 12);
void wlc_lcnphy_crsuprs(struct brcms_phy *pi, int channel)
{
u16 afectrlovr, afectrlovrval;
afectrlovr = read_phy_reg(pi, 0x43b);
afectrlovrval = read_phy_reg(pi, 0x43c);
if (channel != 0) {
mod_phy_reg(pi, 0x43b, (0x1 << 1), (1) << 1);
rfseq = wlc_lcnphy_rfseq_tbl_adc_pwrup(pi);
tab.tbl_id = LCNPHY_TBL_ID_RFSEQ;
tab.tbl_width = 16;
tab.tbl_ptr = &rfseq;
tab.tbl_len = 1;
tab.tbl_offset = 6;
wlc_lcnphy_write_table(pi, &tab);
mod_phy_reg(pi, 0x43c, (0x1 << 1), (0) << 1);
mod_phy_reg(pi, 0x938, (0x1 << 2), (1) << 2);
mod_phy_reg(pi, 0x43b, (0x1 << 4), (1) << 4);
mod_phy_reg(pi, 0x939, (0x1 << 2), (1) << 2);
mod_phy_reg(pi, 0x43c, (0x1 << 6), (0) << 6);
mod_phy_reg(pi, 0x4a4, (0x1 << 12), (1) << 12);
write_phy_reg(pi, 0x44b, 0xffff);
wlc_lcnphy_tx_pu(pi, 1);
mod_phy_reg(pi, 0x4d7, (0x1 << 2), (1) << 2);
mod_phy_reg(pi, 0x634, (0xff << 8), (0) << 8);
mod_phy_reg(pi, 0x4d7, (0xf << 8), (0) << 8);
or_phy_reg(pi, 0x6da, 0x0080);
wlc_lcnphy_pwrctrl_rssiparams(pi);
or_phy_reg(pi, 0x00a, 0x228);
} else {
and_phy_reg(pi, 0x00a, ~(0x228));
and_phy_reg(pi, 0x6da, 0xFF7F);
write_phy_reg(pi, 0x43b, afectrlovr);
write_phy_reg(pi, 0x43c, afectrlovrval);
}
}
void wlc_lcnphy_tx_pwr_update_npt(struct brcms_phy *pi)
static void wlc_lcnphy_toggle_afe_pwdn(struct brcms_phy *pi)
{
u16 tx_cnt, tx_total, npt;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
tx_total = wlc_lcnphy_total_tx_frames(pi);
tx_cnt = tx_total - pi_lcn->lcnphy_tssi_tx_cnt;
npt = wlc_lcnphy_get_tx_pwr_npt(pi);
u16 save_AfeCtrlOvrVal, save_AfeCtrlOvr;
if (tx_cnt > (1 << npt)) {
save_AfeCtrlOvrVal = read_phy_reg(pi, 0x43c);
save_AfeCtrlOvr = read_phy_reg(pi, 0x43b);
pi_lcn->lcnphy_tssi_tx_cnt = tx_total;
write_phy_reg(pi, 0x43c, save_AfeCtrlOvrVal | 0x1);
write_phy_reg(pi, 0x43b, save_AfeCtrlOvr | 0x1);
pi_lcn->lcnphy_tssi_idx = wlc_lcnphy_get_current_tx_pwr_idx(pi);
pi_lcn->lcnphy_tssi_npt = npt;
write_phy_reg(pi, 0x43c, save_AfeCtrlOvrVal & 0xfffe);
write_phy_reg(pi, 0x43b, save_AfeCtrlOvr & 0xfffe);
}
write_phy_reg(pi, 0x43c, save_AfeCtrlOvrVal);
write_phy_reg(pi, 0x43b, save_AfeCtrlOvr);
}
s32 wlc_lcnphy_tssi2dbm(s32 tssi, s32 a1, s32 b0, s32 b1)
static void
wlc_lcnphy_txrx_spur_avoidance_mode(struct brcms_phy *pi, bool enable)
{
s32 a, b, p;
a = 32768 + (a1 * tssi);
b = (1024 * b0) + (64 * b1 * tssi);
p = ((2 * b) + a) / (2 * a);
if (enable) {
write_phy_reg(pi, 0x942, 0x7);
write_phy_reg(pi, 0x93b, ((1 << 13) + 23));
write_phy_reg(pi, 0x93c, ((1 << 13) + 1989));
return p;
write_phy_reg(pi, 0x44a, 0x084);
write_phy_reg(pi, 0x44a, 0x080);
write_phy_reg(pi, 0x6d3, 0x2222);
write_phy_reg(pi, 0x6d3, 0x2220);
} else {
write_phy_reg(pi, 0x942, 0x0);
write_phy_reg(pi, 0x93b, ((0 << 13) + 23));
write_phy_reg(pi, 0x93c, ((0 << 13) + 1989));
}
wlapi_switch_macfreq(pi->sh->physhim, enable);
}
static void wlc_lcnphy_txpower_reset_npt(struct brcms_phy *pi)
static void
wlc_lcnphy_set_chanspec_tweaks(struct brcms_phy *pi, u16 chanspec)
{
u8 channel = CHSPEC_CHANNEL(chanspec);
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))
return;
pi_lcn->lcnphy_tssi_idx = LCNPHY_TX_PWR_CTRL_START_INDEX_2G_4313;
pi_lcn->lcnphy_tssi_npt = LCNPHY_TX_PWR_CTRL_START_NPT;
}
if (channel == 14)
mod_phy_reg(pi, 0x448, (0x3 << 8), (2) << 8);
else
mod_phy_reg(pi, 0x448, (0x3 << 8), (1) << 8);
void wlc_lcnphy_txpower_recalc_target(struct brcms_phy *pi)
{
struct phytbl_info tab;
u32 rate_table[BRCMS_NUM_RATES_CCK + BRCMS_NUM_RATES_OFDM +
BRCMS_NUM_RATES_MCS_1_STREAM];
uint i, j;
if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))
return;
pi_lcn->lcnphy_bandedge_corr = 2;
if (channel == 1)
pi_lcn->lcnphy_bandedge_corr = 4;
for (i = 0, j = 0; i < ARRAY_SIZE(rate_table); i++, j++) {
if (channel == 1 || channel == 2 || channel == 3 ||
channel == 4 || channel == 9 ||
channel == 10 || channel == 11 || channel == 12) {
si_pmu_pllcontrol(pi->sh->sih, 0x2, 0xffffffff, 0x03000c04);
si_pmu_pllcontrol(pi->sh->sih, 0x3, 0xffffff, 0x0);
si_pmu_pllcontrol(pi->sh->sih, 0x4, 0xffffffff, 0x200005c0);
if (i == BRCMS_NUM_RATES_CCK + BRCMS_NUM_RATES_OFDM)
j = TXP_FIRST_MCS_20_SISO;
si_pmu_pllupd(pi->sh->sih);
write_phy_reg(pi, 0x942, 0);
wlc_lcnphy_txrx_spur_avoidance_mode(pi, false);
pi_lcn->lcnphy_spurmod = 0;
mod_phy_reg(pi, 0x424, (0xff << 8), (0x1b) << 8);
rate_table[i] = (u32) ((s32) (-pi->tx_power_offset[j]));
}
write_phy_reg(pi, 0x425, 0x5907);
} else {
si_pmu_pllcontrol(pi->sh->sih, 0x2, 0xffffffff, 0x03140c04);
si_pmu_pllcontrol(pi->sh->sih, 0x3, 0xffffff, 0x333333);
si_pmu_pllcontrol(pi->sh->sih, 0x4, 0xffffffff, 0x202c2820);
tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
tab.tbl_width = 32;
tab.tbl_len = ARRAY_SIZE(rate_table);
tab.tbl_ptr = rate_table;
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET;
wlc_lcnphy_write_table(pi, &tab);
si_pmu_pllupd(pi->sh->sih);
write_phy_reg(pi, 0x942, 0);
wlc_lcnphy_txrx_spur_avoidance_mode(pi, true);
if (wlc_lcnphy_get_target_tx_pwr(pi) != pi->tx_power_min) {
wlc_lcnphy_set_target_tx_pwr(pi, pi->tx_power_min);
pi_lcn->lcnphy_spurmod = 0;
mod_phy_reg(pi, 0x424, (0xff << 8), (0x1f) << 8);
wlc_lcnphy_txpower_reset_npt(pi);
write_phy_reg(pi, 0x425, 0x590a);
}
or_phy_reg(pi, 0x44a, 0x44);
write_phy_reg(pi, 0x44a, 0x80);
}
static void wlc_lcnphy_set_tx_pwr_soft_ctrl(struct brcms_phy *pi, s8 index)
static void
wlc_lcnphy_radio_2064_channel_tune_4313(struct brcms_phy *pi, u8 channel)
{
u32 cck_offset[4] = { 22, 22, 22, 22 };
u32 ofdm_offset, reg_offset_cck;
int i;
u16 index2;
struct phytbl_info tab;
if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi))
return;
mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0x1) << 14);
uint i;
const struct chan_info_2064_lcnphy *ci;
u8 rfpll_doubler = 0;
u8 pll_pwrup, pll_pwrup_ovr;
s32 qFxtal, qFref, qFvco, qFcal;
u8 d15, d16, f16, e44, e45;
u32 div_int, div_frac, fvco3, fpfd, fref3, fcal_div;
u16 loop_bw, d30, setCount;
mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0x0) << 14);
ci = &chan_info_2064_lcnphy[0];
rfpll_doubler = 1;
or_phy_reg(pi, 0x6da, 0x0040);
mod_radio_reg(pi, RADIO_2064_REG09D, 0x4, 0x1 << 2);
reg_offset_cck = 0;
for (i = 0; i < 4; i++)
cck_offset[i] -= reg_offset_cck;
tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
tab.tbl_width = 32;
tab.tbl_len = 4;
tab.tbl_ptr = cck_offset;
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET;
wlc_lcnphy_write_table(pi, &tab);
ofdm_offset = 0;
tab.tbl_len = 1;
tab.tbl_ptr = &ofdm_offset;
for (i = 836; i < 862; i++) {
tab.tbl_offset = i;
wlc_lcnphy_write_table(pi, &tab);
write_radio_reg(pi, RADIO_2064_REG09E, 0xf);
if (!rfpll_doubler) {
loop_bw = PLL_2064_LOOP_BW;
d30 = PLL_2064_D30;
} else {
loop_bw = PLL_2064_LOOP_BW_DOUBLER;
d30 = PLL_2064_D30_DOUBLER;
}
mod_phy_reg(pi, 0x4a4, (0x1 << 15), (0x1) << 15);
if (CHSPEC_IS2G(pi->radio_chanspec)) {
for (i = 0; i < ARRAY_SIZE(chan_info_2064_lcnphy); i++)
if (chan_info_2064_lcnphy[i].chan == channel)
break;
mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0x1) << 14);
if (i >= ARRAY_SIZE(chan_info_2064_lcnphy))
return;
mod_phy_reg(pi, 0x4a4, (0x1 << 13), (0x1) << 13);
ci = &chan_info_2064_lcnphy[i];
}
mod_phy_reg(pi, 0x4b0, (0x1 << 7), (0) << 7);
write_radio_reg(pi, RADIO_2064_REG02A, ci->logen_buftune);
mod_phy_reg(pi, 0x43b, (0x1 << 6), (0) << 6);
mod_radio_reg(pi, RADIO_2064_REG030, 0x3, ci->logen_rccr_tx);
mod_phy_reg(pi, 0x4a9, (0x1 << 15), (1) << 15);
mod_radio_reg(pi, RADIO_2064_REG091, 0x3, ci->txrf_mix_tune_ctrl);
index2 = (u16) (index * 2);
mod_phy_reg(pi, 0x4a9, (0x1ff << 0), (index2) << 0);
mod_radio_reg(pi, RADIO_2064_REG038, 0xf, ci->pa_input_tune_g);
mod_phy_reg(pi, 0x6a3, (0x1 << 4), (0) << 4);
mod_radio_reg(pi, RADIO_2064_REG030, 0x3 << 2,
(ci->logen_rccr_rx) << 2);
}
mod_radio_reg(pi, RADIO_2064_REG05E, 0xf, ci->pa_rxrf_lna1_freq_tune);
static s8 wlc_lcnphy_tempcompensated_txpwrctrl(struct brcms_phy *pi)
{
s8 index, delta_brd, delta_temp, new_index, tempcorrx;
s16 manp, meas_temp, temp_diff;
bool neg = 0;
u16 temp;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
mod_radio_reg(pi, RADIO_2064_REG05E, (0xf) << 4,
(ci->pa_rxrf_lna2_freq_tune) << 4);
if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi))
return pi_lcn->lcnphy_current_index;
write_radio_reg(pi, RADIO_2064_REG06C, ci->rxrf_rxrf_spare1);
index = FIXED_TXPWR;
pll_pwrup = (u8) read_radio_reg(pi, RADIO_2064_REG044);
pll_pwrup_ovr = (u8) read_radio_reg(pi, RADIO_2064_REG12B);
if (pi_lcn->lcnphy_tempsense_slope == 0)
return index;
or_radio_reg(pi, RADIO_2064_REG044, 0x07);
temp = (u16) wlc_lcnphy_tempsense(pi, 0);
meas_temp = LCNPHY_TEMPSENSE(temp);
or_radio_reg(pi, RADIO_2064_REG12B, (0x07) << 1);
e44 = 0;
e45 = 0;
if (pi->tx_power_min != 0)
delta_brd = (pi_lcn->lcnphy_measPower - pi->tx_power_min);
fpfd = rfpll_doubler ? (pi->xtalfreq << 1) : (pi->xtalfreq);
if (pi->xtalfreq > 26000000)
e44 = 1;
if (pi->xtalfreq > 52000000)
e45 = 1;
if (e44 == 0)
fcal_div = 1;
else if (e45 == 0)
fcal_div = 2;
else
delta_brd = 0;
fcal_div = 4;
fvco3 = (ci->freq * 3);
fref3 = 2 * fpfd;
manp = LCNPHY_TEMPSENSE(pi_lcn->lcnphy_rawtempsense);
temp_diff = manp - meas_temp;
if (temp_diff < 0) {
neg = 1;
temp_diff = -temp_diff;
}
qFxtal = wlc_lcnphy_qdiv_roundup(pi->xtalfreq, PLL_2064_MHZ, 16);
qFref = wlc_lcnphy_qdiv_roundup(fpfd, PLL_2064_MHZ, 16);
qFcal = pi->xtalfreq * fcal_div / PLL_2064_MHZ;
qFvco = wlc_lcnphy_qdiv_roundup(fvco3, 2, 16);
delta_temp = (s8) wlc_lcnphy_qdiv_roundup((u32) (temp_diff * 192),
(u32) (pi_lcn->
lcnphy_tempsense_slope
* 10), 0);
if (neg)
delta_temp = -delta_temp;
write_radio_reg(pi, RADIO_2064_REG04F, 0x02);
if (pi_lcn->lcnphy_tempsense_option == 3
&& LCNREV_IS(pi->pubpi.phy_rev, 0))
delta_temp = 0;
if (pi_lcn->lcnphy_tempcorrx > 31)
tempcorrx = (s8) (pi_lcn->lcnphy_tempcorrx - 64);
else
tempcorrx = (s8) pi_lcn->lcnphy_tempcorrx;
if (LCNREV_IS(pi->pubpi.phy_rev, 1))
tempcorrx = 4;
new_index =
index + delta_brd + delta_temp - pi_lcn->lcnphy_bandedge_corr;
new_index += tempcorrx;
d15 = (pi->xtalfreq * fcal_div * 4 / 5) / PLL_2064_MHZ - 1;
write_radio_reg(pi, RADIO_2064_REG052, (0x07 & (d15 >> 2)));
write_radio_reg(pi, RADIO_2064_REG053, (d15 & 0x3) << 5);
if (LCNREV_IS(pi->pubpi.phy_rev, 1))
index = 127;
d16 = (qFcal * 8 / (d15 + 1)) - 1;
write_radio_reg(pi, RADIO_2064_REG051, d16);
if (new_index < 0 || new_index > 126)
return index;
f16 = ((d16 + 1) * (d15 + 1)) / qFcal;
setCount = f16 * 3 * (ci->freq) / 32 - 1;
mod_radio_reg(pi, RADIO_2064_REG053, (0x0f << 0),
(u8) (setCount >> 8));
return new_index;
}
or_radio_reg(pi, RADIO_2064_REG053, 0x10);
write_radio_reg(pi, RADIO_2064_REG054, (u8) (setCount & 0xff));
static u16 wlc_lcnphy_set_tx_pwr_ctrl_mode(struct brcms_phy *pi, u16 mode)
{
div_int = ((fvco3 * (PLL_2064_MHZ >> 4)) / fref3) << 4;
u16 current_mode = mode;
if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) &&
mode == LCNPHY_TX_PWR_CTRL_HW)
current_mode = LCNPHY_TX_PWR_CTRL_TEMPBASED;
if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi) &&
mode == LCNPHY_TX_PWR_CTRL_TEMPBASED)
current_mode = LCNPHY_TX_PWR_CTRL_HW;
return current_mode;
}
div_frac = ((fvco3 * (PLL_2064_MHZ >> 4)) % fref3) << 4;
while (div_frac >= fref3) {
div_int++;
div_frac -= fref3;
}
div_frac = wlc_lcnphy_qdiv_roundup(div_frac, fref3, 20);
void wlc_lcnphy_set_tx_pwr_ctrl(struct brcms_phy *pi, u16 mode)
{
u16 old_mode = wlc_lcnphy_get_tx_pwr_ctrl(pi);
s8 index;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
mod_radio_reg(pi, RADIO_2064_REG045, (0x1f << 0),
(u8) (div_int >> 4));
mod_radio_reg(pi, RADIO_2064_REG046, (0x1f << 4),
(u8) (div_int << 4));
mod_radio_reg(pi, RADIO_2064_REG046, (0x0f << 0),
(u8) (div_frac >> 16));
write_radio_reg(pi, RADIO_2064_REG047, (u8) (div_frac >> 8) & 0xff);
write_radio_reg(pi, RADIO_2064_REG048, (u8) div_frac & 0xff);
mode = wlc_lcnphy_set_tx_pwr_ctrl_mode(pi, mode);
old_mode = wlc_lcnphy_set_tx_pwr_ctrl_mode(pi, old_mode);
write_radio_reg(pi, RADIO_2064_REG040, 0xfb);
mod_phy_reg(pi, 0x6da, (0x1 << 6),
((LCNPHY_TX_PWR_CTRL_HW == mode) ? 1 : 0) << 6);
write_radio_reg(pi, RADIO_2064_REG041, 0x9A);
write_radio_reg(pi, RADIO_2064_REG042, 0xA3);
write_radio_reg(pi, RADIO_2064_REG043, 0x0C);
mod_phy_reg(pi, 0x6a3, (0x1 << 4),
((LCNPHY_TX_PWR_CTRL_HW == mode) ? 0 : 1) << 4);
{
u8 h29, h23, c28, d29, h28_ten, e30, h30_ten, cp_current;
u16 c29, c38, c30, g30, d28;
c29 = loop_bw;
d29 = 200;
c38 = 1250;
h29 = d29 / c29;
h23 = 1;
c28 = 30;
d28 = (((PLL_2064_HIGH_END_KVCO - PLL_2064_LOW_END_KVCO) *
(fvco3 / 2 - PLL_2064_LOW_END_VCO)) /
(PLL_2064_HIGH_END_VCO - PLL_2064_LOW_END_VCO))
+ PLL_2064_LOW_END_KVCO;
h28_ten = (d28 * 10) / c28;
c30 = 2640;
e30 = (d30 - 680) / 490;
g30 = 680 + (e30 * 490);
h30_ten = (g30 * 10) / c30;
cp_current = ((c38 * h29 * h23 * 100) / h28_ten) / h30_ten;
mod_radio_reg(pi, RADIO_2064_REG03C, 0x3f, cp_current);
}
if (channel >= 1 && channel <= 5)
write_radio_reg(pi, RADIO_2064_REG03C, 0x8);
else
write_radio_reg(pi, RADIO_2064_REG03C, 0x7);
write_radio_reg(pi, RADIO_2064_REG03D, 0x3);
if (old_mode != mode) {
if (LCNPHY_TX_PWR_CTRL_HW == old_mode) {
mod_radio_reg(pi, RADIO_2064_REG044, 0x0c, 0x0c);
udelay(1);
wlc_lcnphy_tx_pwr_update_npt(pi);
wlc_2064_vco_cal(pi);
wlc_lcnphy_clear_tx_power_offsets(pi);
}
if (LCNPHY_TX_PWR_CTRL_HW == mode) {
write_radio_reg(pi, RADIO_2064_REG044, pll_pwrup);
write_radio_reg(pi, RADIO_2064_REG12B, pll_pwrup_ovr);
if (LCNREV_IS(pi->pubpi.phy_rev, 1)) {
write_radio_reg(pi, RADIO_2064_REG038, 3);
write_radio_reg(pi, RADIO_2064_REG091, 7);
}
}
wlc_lcnphy_txpower_recalc_target(pi);
static int
wlc_lcnphy_load_tx_iir_filter(struct brcms_phy *pi, bool is_ofdm, s16 filt_type)
{
s16 filt_index = -1;
int j;
wlc_lcnphy_set_start_tx_pwr_idx(pi,
pi_lcn->
lcnphy_tssi_idx);
wlc_lcnphy_set_tx_pwr_npt(pi, pi_lcn->lcnphy_tssi_npt);
mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 0);
u16 addr[] = {
0x910,
0x91e,
0x91f,
0x924,
0x925,
0x926,
0x920,
0x921,
0x927,
0x928,
0x929,
0x922,
0x923,
0x930,
0x931,
0x932
};
pi_lcn->lcnphy_tssi_tx_cnt =
wlc_lcnphy_total_tx_frames(pi);
u16 addr_ofdm[] = {
0x90f,
0x900,
0x901,
0x906,
0x907,
0x908,
0x902,
0x903,
0x909,
0x90a,
0x90b,
0x904,
0x905,
0x90c,
0x90d,
0x90e
};
wlc_lcnphy_disable_tx_gain_override(pi);
pi_lcn->lcnphy_tx_power_idx_override = -1;
} else
wlc_lcnphy_enable_tx_gain_override(pi);
if (!is_ofdm) {
for (j = 0; j < LCNPHY_NUM_TX_DIG_FILTERS_CCK; j++) {
if (filt_type == LCNPHY_txdigfiltcoeffs_cck[j][0]) {
filt_index = (s16) j;
break;
}
}
mod_phy_reg(pi, 0x4a4,
((0x1 << 15) | (0x1 << 14) | (0x1 << 13)), mode);
if (mode == LCNPHY_TX_PWR_CTRL_TEMPBASED) {
index = wlc_lcnphy_tempcompensated_txpwrctrl(pi);
wlc_lcnphy_set_tx_pwr_soft_ctrl(pi, index);
pi_lcn->lcnphy_current_index = (s8)
((read_phy_reg(pi,
0x4a9) &
0xFF) / 2);
if (filt_index != -1) {
for (j = 0; j < LCNPHY_NUM_DIG_FILT_COEFFS; j++)
write_phy_reg(pi, addr[j],
LCNPHY_txdigfiltcoeffs_cck
[filt_index][j + 1]);
}
} else {
for (j = 0; j < LCNPHY_NUM_TX_DIG_FILTERS_OFDM; j++) {
if (filt_type == LCNPHY_txdigfiltcoeffs_ofdm[j][0]) {
filt_index = (s16) j;
break;
}
}
if (filt_index != -1) {
for (j = 0; j < LCNPHY_NUM_DIG_FILT_COEFFS; j++)
write_phy_reg(pi, addr_ofdm[j],
LCNPHY_txdigfiltcoeffs_ofdm
[filt_index][j + 1]);
}
}
return (filt_index != -1) ? 0 : -1;
}
static bool wlc_lcnphy_iqcal_wait(struct brcms_phy *pi)
void wlc_phy_chanspec_set_lcnphy(struct brcms_phy *pi, u16 chanspec)
{
uint delay_count = 0;
u8 channel = CHSPEC_CHANNEL(chanspec);
while (wlc_lcnphy_iqcal_active(pi)) {
udelay(100);
delay_count++;
wlc_phy_chanspec_radio_set((struct brcms_phy_pub *) pi, chanspec);
if (delay_count > (10 * 500))
break;
}
wlc_lcnphy_set_chanspec_tweaks(pi, pi->radio_chanspec);
return (0 == wlc_lcnphy_iqcal_active(pi));
}
or_phy_reg(pi, 0x44a, 0x44);
write_phy_reg(pi, 0x44a, 0x80);
static void
wlc_lcnphy_tx_iqlo_cal(struct brcms_phy *pi,
struct lcnphy_txgains *target_gains,
enum lcnphy_cal_mode cal_mode, bool keep_tone)
{
wlc_lcnphy_radio_2064_channel_tune_4313(pi, channel);
udelay(1000);
struct lcnphy_txgains cal_gains, temp_gains;
u16 hash;
u8 band_idx;
int j;
u16 ncorr_override[5];
u16 syst_coeffs[] = { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000};
wlc_lcnphy_toggle_afe_pwdn(pi);
u16 commands_fullcal[] = {
0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234
};
write_phy_reg(pi, 0x657, lcnphy_sfo_cfg[channel - 1].ptcentreTs20);
write_phy_reg(pi, 0x658, lcnphy_sfo_cfg[channel - 1].ptcentreFactor);
u16 commands_recal[] = {
0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234
};
if (CHSPEC_CHANNEL(pi->radio_chanspec) == 14) {
mod_phy_reg(pi, 0x448, (0x3 << 8), (2) << 8);
u16 command_nums_fullcal[] = {
0x7a97, 0x7a97, 0x7a97, 0x7a87, 0x7a87, 0x7b97
};
wlc_lcnphy_load_tx_iir_filter(pi, false, 3);
} else {
mod_phy_reg(pi, 0x448, (0x3 << 8), (1) << 8);
u16 command_nums_recal[] = {
0x7a97, 0x7a97, 0x7a97, 0x7a87, 0x7a87, 0x7b97
};
u16 *command_nums = command_nums_fullcal;
wlc_lcnphy_load_tx_iir_filter(pi, false, 2);
}
u16 *start_coeffs = NULL, *cal_cmds = NULL, cal_type, diq_start;
u16 tx_pwr_ctrl_old, save_txpwrctrlrfctrl2;
u16 save_sslpnCalibClkEnCtrl, save_sslpnRxFeClkEnCtrl;
bool tx_gain_override_old;
struct lcnphy_txgains old_gains;
uint i, n_cal_cmds = 0, n_cal_start = 0;
u16 *values_to_save;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
wlc_lcnphy_load_tx_iir_filter(pi, true, 0);
values_to_save = kmalloc(sizeof(u16) * 20, GFP_ATOMIC);
if (NULL == values_to_save)
return;
mod_phy_reg(pi, 0x4eb, (0x7 << 3), (1) << 3);
save_sslpnRxFeClkEnCtrl = read_phy_reg(pi, 0x6db);
save_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da);
}
or_phy_reg(pi, 0x6da, 0x40);
or_phy_reg(pi, 0x6db, 0x3);
static u16 wlc_lcnphy_get_pa_gain(struct brcms_phy *pi)
{
u16 pa_gain;
switch (cal_mode) {
case LCNPHY_CAL_FULL:
start_coeffs = syst_coeffs;
cal_cmds = commands_fullcal;
n_cal_cmds = ARRAY_SIZE(commands_fullcal);
break;
pa_gain = (read_phy_reg(pi, 0x4fb) &
LCNPHY_txgainctrlovrval1_pagain_ovr_val1_MASK) >>
LCNPHY_txgainctrlovrval1_pagain_ovr_val1_SHIFT;
case LCNPHY_CAL_RECAL:
start_coeffs = syst_coeffs;
cal_cmds = commands_recal;
n_cal_cmds = ARRAY_SIZE(commands_recal);
command_nums = command_nums_recal;
break;
return pa_gain;
}
default:
break;
}
static void wlc_lcnphy_set_tx_gain(struct brcms_phy *pi,
struct lcnphy_txgains *target_gains)
{
u16 pa_gain = wlc_lcnphy_get_pa_gain(pi);
wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
start_coeffs, 11, 16, 64);
mod_phy_reg(
pi, 0x4b5,
(0xffff << 0),
((target_gains->gm_gain) |
(target_gains->pga_gain << 8)) <<
0);
mod_phy_reg(pi, 0x4fb,
(0x7fff << 0),
((target_gains->pad_gain) | (pa_gain << 8)) << 0);
write_phy_reg(pi, 0x6da, 0xffff);
mod_phy_reg(pi, 0x503, (0x1 << 3), (1) << 3);
mod_phy_reg(
pi, 0x4fc,
(0xffff << 0),
((target_gains->gm_gain) |
(target_gains->pga_gain << 8)) <<
0);
mod_phy_reg(pi, 0x4fd,
(0x7fff << 0),
((target_gains->pad_gain) | (pa_gain << 8)) << 0);
tx_pwr_ctrl_old = wlc_lcnphy_get_tx_pwr_ctrl(pi);
wlc_lcnphy_set_dac_gain(pi, target_gains->dac_gain);
mod_phy_reg(pi, 0x4a4, (0x1 << 12), (1) << 12);
wlc_lcnphy_enable_tx_gain_override(pi);
}
wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
static void wlc_lcnphy_set_bbmult(struct brcms_phy *pi, u8 m0)
{
u16 m0m1 = (u16) m0 << 8;
struct phytbl_info tab;
save_txpwrctrlrfctrl2 = read_phy_reg(pi, 0x4db);
tab.tbl_ptr = &m0m1;
tab.tbl_len = 1;
tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL;
tab.tbl_offset = 87;
tab.tbl_width = 16;
wlc_lcnphy_write_table(pi, &tab);
}
mod_phy_reg(pi, 0x4db, (0x3ff << 0), (0x2a6) << 0);
static void wlc_lcnphy_clear_tx_power_offsets(struct brcms_phy *pi)
{
u32 data_buf[64];
struct phytbl_info tab;
mod_phy_reg(pi, 0x4db, (0x7 << 12), (2) << 12);
memset(data_buf, 0, sizeof(data_buf));
wlc_lcnphy_tx_iqlo_loopback(pi, values_to_save);
tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
tab.tbl_width = 32;
tab.tbl_ptr = data_buf;
tx_gain_override_old = wlc_lcnphy_tx_gain_override_enabled(pi);
if (tx_gain_override_old)
wlc_lcnphy_get_tx_gain(pi, &old_gains);
if (!wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) {
if (!target_gains) {
if (!tx_gain_override_old)
wlc_lcnphy_set_tx_pwr_by_index(pi,
pi_lcn->lcnphy_tssi_idx);
wlc_lcnphy_get_tx_gain(pi, &temp_gains);
target_gains = &temp_gains;
tab.tbl_len = 30;
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET;
wlc_lcnphy_write_table(pi, &tab);
}
hash = (target_gains->gm_gain << 8) |
(target_gains->pga_gain << 4) | (target_gains->pad_gain);
tab.tbl_len = 64;
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_MAC_OFFSET;
wlc_lcnphy_write_table(pi, &tab);
}
band_idx = (CHSPEC_IS5G(pi->radio_chanspec) ? 1 : 0);
enum lcnphy_tssi_mode {
LCNPHY_TSSI_PRE_PA,
LCNPHY_TSSI_POST_PA,
LCNPHY_TSSI_EXT
};
cal_gains = *target_gains;
memset(ncorr_override, 0, sizeof(ncorr_override));
for (j = 0; j < iqcal_gainparams_numgains_lcnphy[band_idx]; j++) {
if (hash == tbl_iqcal_gainparams_lcnphy[band_idx][j][0]) {
cal_gains.gm_gain =
tbl_iqcal_gainparams_lcnphy[band_idx][j][1];
cal_gains.pga_gain =
tbl_iqcal_gainparams_lcnphy[band_idx][j][2];
cal_gains.pad_gain =
tbl_iqcal_gainparams_lcnphy[band_idx][j][3];
memcpy(ncorr_override,
&tbl_iqcal_gainparams_lcnphy[band_idx][j][3],
sizeof(ncorr_override));
break;
}
}
static void
wlc_lcnphy_set_tssi_mux(struct brcms_phy *pi, enum lcnphy_tssi_mode pos)
{
mod_phy_reg(pi, 0x4d7, (0x1 << 0), (0x1) << 0);
wlc_lcnphy_set_tx_gain(pi, &cal_gains);
mod_phy_reg(pi, 0x4d7, (0x1 << 6), (1) << 6);
write_phy_reg(pi, 0x453, 0xaa9);
write_phy_reg(pi, 0x93d, 0xc0);
if (LCNPHY_TSSI_POST_PA == pos) {
mod_phy_reg(pi, 0x4d9, (0x1 << 2), (0) << 2);
wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
lcnphy_iqcal_loft_gainladder,
ARRAY_SIZE(lcnphy_iqcal_loft_gainladder),
16, 0);
mod_phy_reg(pi, 0x4d9, (0x1 << 3), (1) << 3);
wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
lcnphy_iqcal_ir_gainladder,
ARRAY_SIZE(
lcnphy_iqcal_ir_gainladder), 16,
32);
if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
mod_radio_reg(pi, RADIO_2064_REG086, 0x4, 0x4);
} else {
mod_radio_reg(pi, RADIO_2064_REG03A, 1, 0x1);
mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 0x8);
}
} else {
mod_phy_reg(pi, 0x4d9, (0x1 << 2), (0x1) << 2);
if (pi->phy_tx_tone_freq) {
mod_phy_reg(pi, 0x4d9, (0x1 << 3), (0) << 3);
wlc_lcnphy_stop_tx_tone(pi);
udelay(5);
wlc_lcnphy_start_tx_tone(pi, 3750, 88, 1);
} else {
wlc_lcnphy_start_tx_tone(pi, 3750, 88, 1);
if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
mod_radio_reg(pi, RADIO_2064_REG086, 0x4, 0x4);
} else {
mod_radio_reg(pi, RADIO_2064_REG03A, 1, 0);
mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 0x8);
}
}
mod_phy_reg(pi, 0x637, (0x3 << 14), (0) << 14);
write_phy_reg(pi, 0x6da, 0xffff);
if (LCNPHY_TSSI_EXT == pos) {
write_radio_reg(pi, RADIO_2064_REG07F, 1);
mod_radio_reg(pi, RADIO_2064_REG005, 0x7, 0x2);
mod_radio_reg(pi, RADIO_2064_REG112, 0x80, 0x1 << 7);
mod_radio_reg(pi, RADIO_2064_REG028, 0x1f, 0x3);
}
}
for (i = n_cal_start; i < n_cal_cmds; i++) {
u16 zero_diq = 0;
u16 best_coeffs[11];
u16 command_num;
static u16 wlc_lcnphy_rfseq_tbl_adc_pwrup(struct brcms_phy *pi)
{
u16 N1, N2, N3, N4, N5, N6, N;
N1 = ((read_phy_reg(pi, 0x4a5) & (0xff << 0))
>> 0);
N2 = 1 << ((read_phy_reg(pi, 0x4a5) & (0x7 << 12))
>> 12);
N3 = ((read_phy_reg(pi, 0x40d) & (0xff << 0))
>> 0);
N4 = 1 << ((read_phy_reg(pi, 0x40d) & (0x7 << 8))
>> 8);
N5 = ((read_phy_reg(pi, 0x4a2) & (0xff << 0))
>> 0);
N6 = 1 << ((read_phy_reg(pi, 0x4a2) & (0x7 << 8))
>> 8);
N = 2 * (N1 + N2 + N3 + N4 + 2 * (N5 + N6)) + 80;
if (N < 1600)
N = 1600;
return N;
}
cal_type = (cal_cmds[i] & 0x0f00) >> 8;
static void wlc_lcnphy_pwrctrl_rssiparams(struct brcms_phy *pi)
{
u16 auxpga_vmid, auxpga_vmid_temp, auxpga_gain_temp;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
command_num = command_nums[i];
if (ncorr_override[cal_type])
command_num =
ncorr_override[cal_type] << 8 | (command_num &
0xff);
auxpga_vmid = (2 << 8) |
(pi_lcn->lcnphy_rssi_vc << 4) | pi_lcn->lcnphy_rssi_vf;
auxpga_vmid_temp = (2 << 8) | (8 << 4) | 4;
auxpga_gain_temp = 2;
write_phy_reg(pi, 0x452, command_num);
mod_phy_reg(pi, 0x4d8, (0x1 << 0), (0) << 0);
if ((cal_type == 3) || (cal_type == 4)) {
wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL,
&diq_start, 1, 16, 69);
mod_phy_reg(pi, 0x4d8, (0x1 << 1), (0) << 1);
wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
&zero_diq, 1, 16, 69);
}
mod_phy_reg(pi, 0x4d7, (0x1 << 3), (0) << 3);
write_phy_reg(pi, 0x451, cal_cmds[i]);
mod_phy_reg(pi, 0x4db,
(0x3ff << 0) |
(0x7 << 12),
(auxpga_vmid << 0) | (pi_lcn->lcnphy_rssi_gs << 12));
if (!wlc_lcnphy_iqcal_wait(pi))
goto cleanup;
mod_phy_reg(pi, 0x4dc,
(0x3ff << 0) |
(0x7 << 12),
(auxpga_vmid << 0) | (pi_lcn->lcnphy_rssi_gs << 12));
wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL,
best_coeffs,
ARRAY_SIZE(best_coeffs), 16, 96);
wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
best_coeffs,
ARRAY_SIZE(best_coeffs), 16, 64);
mod_phy_reg(pi, 0x40a,
(0x3ff << 0) |
(0x7 << 12),
(auxpga_vmid << 0) | (pi_lcn->lcnphy_rssi_gs << 12));
if ((cal_type == 3) || (cal_type == 4))
wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
&diq_start, 1, 16, 69);
wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL,
pi_lcn->lcnphy_cal_results.
txiqlocal_bestcoeffs,
ARRAY_SIZE(pi_lcn->
lcnphy_cal_results.
txiqlocal_bestcoeffs),
16, 96);
}
mod_phy_reg(pi, 0x40b,
(0x3ff << 0) |
(0x7 << 12),
(auxpga_vmid_temp << 0) | (auxpga_gain_temp << 12));
wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL,
pi_lcn->lcnphy_cal_results.
txiqlocal_bestcoeffs,
ARRAY_SIZE(pi_lcn->lcnphy_cal_results.
txiqlocal_bestcoeffs), 16, 96);
pi_lcn->lcnphy_cal_results.txiqlocal_bestcoeffs_valid = true;
mod_phy_reg(pi, 0x40c,
(0x3ff << 0) |
(0x7 << 12),
(auxpga_vmid_temp << 0) | (auxpga_gain_temp << 12));
wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
&pi_lcn->lcnphy_cal_results.
txiqlocal_bestcoeffs[0], 4, 16, 80);
mod_radio_reg(pi, RADIO_2064_REG082, (1 << 5), (1 << 5));
}
wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
&pi_lcn->lcnphy_cal_results.
txiqlocal_bestcoeffs[5], 2, 16, 85);
static void wlc_lcnphy_tssi_setup(struct brcms_phy *pi)
{
struct phytbl_info tab;
u32 rfseq, ind;
cleanup:
wlc_lcnphy_tx_iqlo_loopback_cleanup(pi, values_to_save);
kfree(values_to_save);
tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
tab.tbl_width = 32;
tab.tbl_ptr = &ind;
tab.tbl_len = 1;
tab.tbl_offset = 0;
for (ind = 0; ind < 128; ind++) {
wlc_lcnphy_write_table(pi, &tab);
tab.tbl_offset++;
}
tab.tbl_offset = 704;
for (ind = 0; ind < 128; ind++) {
wlc_lcnphy_write_table(pi, &tab);
tab.tbl_offset++;
}
mod_phy_reg(pi, 0x503, (0x1 << 0), (0) << 0);
if (!keep_tone)
wlc_lcnphy_stop_tx_tone(pi);
mod_phy_reg(pi, 0x503, (0x1 << 2), (0) << 2);
write_phy_reg(pi, 0x4db, save_txpwrctrlrfctrl2);
mod_phy_reg(pi, 0x503, (0x1 << 4), (1) << 4);
write_phy_reg(pi, 0x453, 0);
wlc_lcnphy_set_tssi_mux(pi, LCNPHY_TSSI_EXT);
mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0) << 14);
if (tx_gain_override_old)
wlc_lcnphy_set_tx_gain(pi, &old_gains);
wlc_lcnphy_set_tx_pwr_ctrl(pi, tx_pwr_ctrl_old);
mod_phy_reg(pi, 0x4a4, (0x1 << 15), (1) << 15);
write_phy_reg(pi, 0x6da, save_sslpnCalibClkEnCtrl);
write_phy_reg(pi, 0x6db, save_sslpnRxFeClkEnCtrl);
mod_phy_reg(pi, 0x4d0, (0x1 << 5), (0) << 5);
}
mod_phy_reg(pi, 0x4a4, (0x1ff << 0), (0) << 0);
static void wlc_lcnphy_idle_tssi_est(struct brcms_phy_pub *ppi)
{
bool suspend, tx_gain_override_old;
struct lcnphy_txgains old_gains;
struct brcms_phy *pi = (struct brcms_phy *) ppi;
u16 idleTssi, idleTssi0_2C, idleTssi0_OB, idleTssi0_regvalue_OB,
idleTssi0_regvalue_2C;
u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
u16 SAVE_lpfgain = read_radio_reg(pi, RADIO_2064_REG112);
u16 SAVE_jtag_bb_afe_switch =
read_radio_reg(pi, RADIO_2064_REG007) & 1;
u16 SAVE_jtag_auxpga = read_radio_reg(pi, RADIO_2064_REG0FF) & 0x10;
u16 SAVE_iqadc_aux_en = read_radio_reg(pi, RADIO_2064_REG11F) & 4;
idleTssi = read_phy_reg(pi, 0x4ab);
suspend =
(0 ==
(R_REG(&((struct brcms_phy *) pi)->regs->maccontrol) &
MCTL_EN_MAC));
if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim);
wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
mod_phy_reg(pi, 0x4a5, (0xff << 0), (255) << 0);
tx_gain_override_old = wlc_lcnphy_tx_gain_override_enabled(pi);
wlc_lcnphy_get_tx_gain(pi, &old_gains);
mod_phy_reg(pi, 0x4a5, (0x7 << 12), (5) << 12);
wlc_lcnphy_enable_tx_gain_override(pi);
wlc_lcnphy_set_tx_pwr_by_index(pi, 127);
write_radio_reg(pi, RADIO_2064_REG112, 0x6);
mod_radio_reg(pi, RADIO_2064_REG007, 0x1, 1);
mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, 1 << 4);
mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 1 << 2);
wlc_lcnphy_tssi_setup(pi);
wlc_phy_do_dummy_tx(pi, true, OFF);
idleTssi = ((read_phy_reg(pi, 0x4ab) & (0x1ff << 0))
>> 0);
idleTssi0_2C = ((read_phy_reg(pi, 0x63e) & (0x1ff << 0))
>> 0);
if (idleTssi0_2C >= 256)
idleTssi0_OB = idleTssi0_2C - 256;
else
idleTssi0_OB = idleTssi0_2C + 256;
idleTssi0_regvalue_OB = idleTssi0_OB;
if (idleTssi0_regvalue_OB >= 256)
idleTssi0_regvalue_2C = idleTssi0_regvalue_OB - 256;
else
idleTssi0_regvalue_2C = idleTssi0_regvalue_OB + 256;
mod_phy_reg(pi, 0x4a6, (0x1ff << 0), (idleTssi0_regvalue_2C) << 0);
mod_phy_reg(pi, 0x4a5, (0x7 << 8), (0) << 8);
mod_phy_reg(pi, 0x44c, (0x1 << 12), (0) << 12);
mod_phy_reg(pi, 0x40d, (0xff << 0), (64) << 0);
wlc_lcnphy_set_tx_gain_override(pi, tx_gain_override_old);
wlc_lcnphy_set_tx_gain(pi, &old_gains);
wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_txpwrctrl);
mod_phy_reg(pi, 0x40d, (0x7 << 8), (4) << 8);
write_radio_reg(pi, RADIO_2064_REG112, SAVE_lpfgain);
mod_radio_reg(pi, RADIO_2064_REG007, 0x1, SAVE_jtag_bb_afe_switch);
mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, SAVE_jtag_auxpga);
mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, SAVE_iqadc_aux_en);
mod_radio_reg(pi, RADIO_2064_REG112, 0x80, 1 << 7);
if (!suspend)
wlapi_enable_mac(pi->sh->physhim);
}
mod_phy_reg(pi, 0x4a2, (0xff << 0), (64) << 0);
static void wlc_lcnphy_vbat_temp_sense_setup(struct brcms_phy *pi, u8 mode)
{
bool suspend;
u16 save_txpwrCtrlEn;
u8 auxpga_vmidcourse, auxpga_vmidfine, auxpga_gain;
u16 auxpga_vmid;
struct phytbl_info tab;
u32 val;
u8 save_reg007, save_reg0FF, save_reg11F, save_reg005, save_reg025,
save_reg112;
u16 values_to_save[14];
s8 index;
int i;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
udelay(999);
mod_phy_reg(pi, 0x4a2, (0x7 << 8), (4) << 8);
save_reg007 = (u8) read_radio_reg(pi, RADIO_2064_REG007);
save_reg0FF = (u8) read_radio_reg(pi, RADIO_2064_REG0FF);
save_reg11F = (u8) read_radio_reg(pi, RADIO_2064_REG11F);
save_reg005 = (u8) read_radio_reg(pi, RADIO_2064_REG005);
save_reg025 = (u8) read_radio_reg(pi, RADIO_2064_REG025);
save_reg112 = (u8) read_radio_reg(pi, RADIO_2064_REG112);
mod_phy_reg(pi, 0x4d0, (0x1ff << 6), (0) << 6);
for (i = 0; i < 14; i++)
values_to_save[i] = read_phy_reg(pi, tempsense_phy_regs[i]);
suspend = (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim);
save_txpwrCtrlEn = read_radio_reg(pi, 0x4a4);
mod_phy_reg(pi, 0x4a8, (0xff << 0), (0x1) << 0);
wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
index = pi_lcn->lcnphy_current_index;
wlc_lcnphy_set_tx_pwr_by_index(pi, 127);
mod_radio_reg(pi, RADIO_2064_REG007, 0x1, 0x1);
mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, 0x1 << 4);
mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 0x1 << 2);
mod_phy_reg(pi, 0x503, (0x1 << 0), (0) << 0);
wlc_lcnphy_clear_tx_power_offsets(pi);
mod_phy_reg(pi, 0x503, (0x1 << 2), (0) << 2);
mod_phy_reg(pi, 0x4a6, (0x1 << 15), (1) << 15);
mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0) << 14);
mod_phy_reg(pi, 0x4a6, (0x1ff << 0), (0xff) << 0);
mod_phy_reg(pi, 0x4a4, (0x1 << 15), (0) << 15);
mod_phy_reg(pi, 0x49a, (0x1ff << 0), (0xff) << 0);
mod_phy_reg(pi, 0x4d0, (0x1 << 5), (0) << 5);
if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
mod_radio_reg(pi, RADIO_2064_REG028, 0xf, 0xe);
mod_radio_reg(pi, RADIO_2064_REG086, 0x4, 0x4);
} else {
mod_radio_reg(pi, RADIO_2064_REG03A, 0x1, 1);
mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 1 << 3);
}
mod_phy_reg(pi, 0x4a5, (0xff << 0), (255) << 0);
write_radio_reg(pi, RADIO_2064_REG025, 0xc);
mod_phy_reg(pi, 0x4a5, (0x7 << 12), (5) << 12);
if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
mod_radio_reg(pi, RADIO_2064_REG03A, 0x1, 1);
} else {
if (CHSPEC_IS2G(pi->radio_chanspec))
mod_radio_reg(pi, RADIO_2064_REG03A, 0x2, 1 << 1);
else
mod_radio_reg(pi, RADIO_2064_REG03A, 0x2, 0 << 1);
}
mod_phy_reg(pi, 0x4a5, (0x7 << 8), (0) << 8);
if (LCNREV_IS(pi->pubpi.phy_rev, 2))
mod_radio_reg(pi, RADIO_2064_REG03A, 0x2, 1 << 1);
else
mod_radio_reg(pi, RADIO_2064_REG03A, 0x4, 1 << 2);
mod_phy_reg(pi, 0x40d, (0xff << 0), (64) << 0);
mod_radio_reg(pi, RADIO_2064_REG11A, 0x1, 1 << 0);
mod_phy_reg(pi, 0x40d, (0x7 << 8), (6) << 8);
mod_radio_reg(pi, RADIO_2064_REG005, 0x8, 1 << 3);
mod_phy_reg(pi, 0x4a2, (0xff << 0), (64) << 0);
if (!wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))
mod_phy_reg(pi, 0x4d7,
(0x1 << 3) | (0x7 << 12), 0 << 3 | 2 << 12);
mod_phy_reg(pi, 0x4a2, (0x7 << 8), (6) << 8);
rfseq = wlc_lcnphy_rfseq_tbl_adc_pwrup(pi);
tab.tbl_id = LCNPHY_TBL_ID_RFSEQ;
tab.tbl_width = 16;
tab.tbl_ptr = &rfseq;
tab.tbl_len = 1;
tab.tbl_offset = 6;
wlc_lcnphy_write_table(pi, &tab);
mod_phy_reg(pi, 0x4d9, (0x7 << 4), (2) << 4);
mod_phy_reg(pi, 0x938, (0x1 << 2), (1) << 2);
mod_phy_reg(pi, 0x4d9, (0x7 << 8), (3) << 8);
mod_phy_reg(pi, 0x939, (0x1 << 2), (1) << 2);
mod_phy_reg(pi, 0x4d9, (0x7 << 12), (1) << 12);
mod_phy_reg(pi, 0x4a4, (0x1 << 12), (1) << 12);
mod_phy_reg(pi, 0x4da, (0x1 << 12), (0) << 12);
mod_phy_reg(pi, 0x4d7, (0x1 << 2), (1) << 2);
mod_phy_reg(pi, 0x4da, (0x1 << 13), (1) << 13);
mod_phy_reg(pi, 0x4d7, (0xf << 8), (0) << 8);
mod_phy_reg(pi, 0x4a6, (0x1 << 15), (1) << 15);
wlc_lcnphy_pwrctrl_rssiparams(pi);
}
write_radio_reg(pi, RADIO_2064_REG025, 0xC);
void wlc_lcnphy_tx_pwr_update_npt(struct brcms_phy *pi)
{
u16 tx_cnt, tx_total, npt;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
mod_radio_reg(pi, RADIO_2064_REG005, 0x8, 0x1 << 3);
tx_total = wlc_lcnphy_total_tx_frames(pi);
tx_cnt = tx_total - pi_lcn->lcnphy_tssi_tx_cnt;
npt = wlc_lcnphy_get_tx_pwr_npt(pi);
mod_phy_reg(pi, 0x938, (0x1 << 2), (1) << 2);
if (tx_cnt > (1 << npt)) {
mod_phy_reg(pi, 0x939, (0x1 << 2), (1) << 2);
pi_lcn->lcnphy_tssi_tx_cnt = tx_total;
mod_phy_reg(pi, 0x4a4, (0x1 << 12), (1) << 12);
pi_lcn->lcnphy_tssi_idx = wlc_lcnphy_get_current_tx_pwr_idx(pi);
pi_lcn->lcnphy_tssi_npt = npt;
val = wlc_lcnphy_rfseq_tbl_adc_pwrup(pi);
tab.tbl_id = LCNPHY_TBL_ID_RFSEQ;
tab.tbl_width = 16;
tab.tbl_len = 1;
tab.tbl_ptr = &val;
tab.tbl_offset = 6;
wlc_lcnphy_write_table(pi, &tab);
if (mode == TEMPSENSE) {
mod_phy_reg(pi, 0x4d7, (0x1 << 3), (1) << 3);
}
}
mod_phy_reg(pi, 0x4d7, (0x7 << 12), (1) << 12);
s32 wlc_lcnphy_tssi2dbm(s32 tssi, s32 a1, s32 b0, s32 b1)
{
s32 a, b, p;
auxpga_vmidcourse = 8;
auxpga_vmidfine = 0x4;
auxpga_gain = 2;
mod_radio_reg(pi, RADIO_2064_REG082, 0x20, 1 << 5);
} else {
mod_phy_reg(pi, 0x4d7, (0x1 << 3), (1) << 3);
a = 32768 + (a1 * tssi);
b = (1024 * b0) + (64 * b1 * tssi);
p = ((2 * b) + a) / (2 * a);
mod_phy_reg(pi, 0x4d7, (0x7 << 12), (3) << 12);
return p;
}
auxpga_vmidcourse = 7;
auxpga_vmidfine = 0xa;
auxpga_gain = 2;
}
auxpga_vmid =
(u16) ((2 << 8) | (auxpga_vmidcourse << 4) | auxpga_vmidfine);
mod_phy_reg(pi, 0x4d8, (0x1 << 0), (1) << 0);
static void wlc_lcnphy_txpower_reset_npt(struct brcms_phy *pi)
{
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))
return;
mod_phy_reg(pi, 0x4d8, (0x3ff << 2), (auxpga_vmid) << 2);
pi_lcn->lcnphy_tssi_idx = LCNPHY_TX_PWR_CTRL_START_INDEX_2G_4313;
pi_lcn->lcnphy_tssi_npt = LCNPHY_TX_PWR_CTRL_START_NPT;
}
mod_phy_reg(pi, 0x4d8, (0x1 << 1), (1) << 1);
void wlc_lcnphy_txpower_recalc_target(struct brcms_phy *pi)
{
struct phytbl_info tab;
u32 rate_table[BRCMS_NUM_RATES_CCK + BRCMS_NUM_RATES_OFDM +
BRCMS_NUM_RATES_MCS_1_STREAM];
uint i, j;
if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))
return;
mod_phy_reg(pi, 0x4d8, (0x7 << 12), (auxpga_gain) << 12);
for (i = 0, j = 0; i < ARRAY_SIZE(rate_table); i++, j++) {
mod_phy_reg(pi, 0x4d0, (0x1 << 5), (1) << 5);
if (i == BRCMS_NUM_RATES_CCK + BRCMS_NUM_RATES_OFDM)
j = TXP_FIRST_MCS_20_SISO;
write_radio_reg(pi, RADIO_2064_REG112, 0x6);
rate_table[i] = (u32) ((s32) (-pi->tx_power_offset[j]));
}
wlc_phy_do_dummy_tx(pi, true, OFF);
if (!tempsense_done(pi))
udelay(10);
tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
tab.tbl_width = 32;
tab.tbl_len = ARRAY_SIZE(rate_table);
tab.tbl_ptr = rate_table;
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET;
wlc_lcnphy_write_table(pi, &tab);
write_radio_reg(pi, RADIO_2064_REG007, (u16) save_reg007);
write_radio_reg(pi, RADIO_2064_REG0FF, (u16) save_reg0FF);
write_radio_reg(pi, RADIO_2064_REG11F, (u16) save_reg11F);
write_radio_reg(pi, RADIO_2064_REG005, (u16) save_reg005);
write_radio_reg(pi, RADIO_2064_REG025, (u16) save_reg025);
write_radio_reg(pi, RADIO_2064_REG112, (u16) save_reg112);
for (i = 0; i < 14; i++)
write_phy_reg(pi, tempsense_phy_regs[i], values_to_save[i]);
wlc_lcnphy_set_tx_pwr_by_index(pi, (int)index);
if (wlc_lcnphy_get_target_tx_pwr(pi) != pi->tx_power_min) {
wlc_lcnphy_set_target_tx_pwr(pi, pi->tx_power_min);
write_radio_reg(pi, 0x4a4, save_txpwrCtrlEn);
if (!suspend)
wlapi_enable_mac(pi->sh->physhim);
udelay(999);
wlc_lcnphy_txpower_reset_npt(pi);
}
}
static void wlc_lcnphy_tx_pwr_ctrl_init(struct brcms_phy_pub *ppi)
static void wlc_lcnphy_set_tx_pwr_soft_ctrl(struct brcms_phy *pi, s8 index)
{
struct lcnphy_txgains tx_gains;
u8 bbmult;
u32 cck_offset[4] = { 22, 22, 22, 22 };
u32 ofdm_offset, reg_offset_cck;
int i;
u16 index2;
struct phytbl_info tab;
s32 a1, b0, b1;
s32 tssi, pwr, maxtargetpwr, mintargetpwr;
bool suspend;
struct brcms_phy *pi = (struct brcms_phy *) ppi;
suspend =
(0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim);
if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi))
return;
if (!pi->hwpwrctrl_capable) {
if (CHSPEC_IS2G(pi->radio_chanspec)) {
tx_gains.gm_gain = 4;
tx_gains.pga_gain = 12;
tx_gains.pad_gain = 12;
tx_gains.dac_gain = 0;
bbmult = 150;
} else {
tx_gains.gm_gain = 7;
tx_gains.pga_gain = 15;
tx_gains.pad_gain = 14;
tx_gains.dac_gain = 0;
bbmult = 150;
}
wlc_lcnphy_set_tx_gain(pi, &tx_gains);
wlc_lcnphy_set_bbmult(pi, bbmult);
wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE);
} else {
mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0x1) << 14);
wlc_lcnphy_idle_tssi_est(ppi);
mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0x0) << 14);
wlc_lcnphy_clear_tx_power_offsets(pi);
or_phy_reg(pi, 0x6da, 0x0040);
b0 = pi->txpa_2g[0];
b1 = pi->txpa_2g[1];
a1 = pi->txpa_2g[2];
maxtargetpwr = wlc_lcnphy_tssi2dbm(10, a1, b0, b1);
mintargetpwr = wlc_lcnphy_tssi2dbm(125, a1, b0, b1);
reg_offset_cck = 0;
for (i = 0; i < 4; i++)
cck_offset[i] -= reg_offset_cck;
tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
tab.tbl_width = 32;
tab.tbl_len = 4;
tab.tbl_ptr = cck_offset;
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET;
wlc_lcnphy_write_table(pi, &tab);
ofdm_offset = 0;
tab.tbl_len = 1;
tab.tbl_ptr = &ofdm_offset;
for (i = 836; i < 862; i++) {
tab.tbl_offset = i;
wlc_lcnphy_write_table(pi, &tab);
}
tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
tab.tbl_width = 32;
tab.tbl_ptr = &pwr;
tab.tbl_len = 1;
tab.tbl_offset = 0;
for (tssi = 0; tssi < 128; tssi++) {
pwr = wlc_lcnphy_tssi2dbm(tssi, a1, b0, b1);
mod_phy_reg(pi, 0x4a4, (0x1 << 15), (0x1) << 15);
pwr = (pwr < mintargetpwr) ? mintargetpwr : pwr;
wlc_lcnphy_write_table(pi, &tab);
tab.tbl_offset++;
}
mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0x1) << 14);
mod_phy_reg(pi, 0x410, (0x1 << 7), (0) << 7);
mod_phy_reg(pi, 0x4a4, (0x1 << 13), (0x1) << 13);
write_phy_reg(pi, 0x4a8, 10);
mod_phy_reg(pi, 0x4b0, (0x1 << 7), (0) << 7);
wlc_lcnphy_set_target_tx_pwr(pi, LCN_TARGET_PWR);
mod_phy_reg(pi, 0x43b, (0x1 << 6), (0) << 6);
wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_HW);
}
if (!suspend)
wlapi_enable_mac(pi->sh->physhim);
}
mod_phy_reg(pi, 0x4a9, (0x1 << 15), (1) << 15);
static u8 wlc_lcnphy_get_bbmult(struct brcms_phy *pi)
{
u16 m0m1;
struct phytbl_info tab;
index2 = (u16) (index * 2);
mod_phy_reg(pi, 0x4a9, (0x1ff << 0), (index2) << 0);
tab.tbl_ptr = &m0m1;
tab.tbl_len = 1;
tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL;
tab.tbl_offset = 87;
tab.tbl_width = 16;
wlc_lcnphy_read_table(pi, &tab);
mod_phy_reg(pi, 0x6a3, (0x1 << 4), (0) << 4);
return (u8) ((m0m1 & 0xff00) >> 8);
}
static void wlc_lcnphy_set_pa_gain(struct brcms_phy *pi, u16 gain)
static s8 wlc_lcnphy_tempcompensated_txpwrctrl(struct brcms_phy *pi)
{
mod_phy_reg(pi, 0x4fb,
LCNPHY_txgainctrlovrval1_pagain_ovr_val1_MASK,
gain << LCNPHY_txgainctrlovrval1_pagain_ovr_val1_SHIFT);
mod_phy_reg(pi, 0x4fd,
LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_MASK,
gain << LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_SHIFT);
}
s8 index, delta_brd, delta_temp, new_index, tempcorrx;
s16 manp, meas_temp, temp_diff;
bool neg = 0;
u16 temp;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
void
wlc_lcnphy_get_radio_loft(struct brcms_phy *pi,
u8 *ei0, u8 *eq0, u8 *fi0, u8 *fq0)
{
*ei0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG089));
*eq0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08A));
*fi0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08B));
*fq0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08C));
}
if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi))
return pi_lcn->lcnphy_current_index;
static void
wlc_lcnphy_get_tx_gain(struct brcms_phy *pi, struct lcnphy_txgains *gains)
{
u16 dac_gain;
index = FIXED_TXPWR;
dac_gain = read_phy_reg(pi, 0x439) >> 0;
gains->dac_gain = (dac_gain & 0x380) >> 7;
if (pi_lcn->lcnphy_tempsense_slope == 0)
return index;
{
u16 rfgain0, rfgain1;
temp = (u16) wlc_lcnphy_tempsense(pi, 0);
meas_temp = LCNPHY_TEMPSENSE(temp);
rfgain0 = (read_phy_reg(pi, 0x4b5) & (0xffff << 0)) >> 0;
rfgain1 = (read_phy_reg(pi, 0x4fb) & (0x7fff << 0)) >> 0;
if (pi->tx_power_min != 0)
delta_brd = (pi_lcn->lcnphy_measPower - pi->tx_power_min);
else
delta_brd = 0;
gains->gm_gain = rfgain0 & 0xff;
gains->pga_gain = (rfgain0 >> 8) & 0xff;
gains->pad_gain = rfgain1 & 0xff;
manp = LCNPHY_TEMPSENSE(pi_lcn->lcnphy_rawtempsense);
temp_diff = manp - meas_temp;
if (temp_diff < 0) {
neg = 1;
temp_diff = -temp_diff;
}
}
void wlc_lcnphy_set_tx_iqcc(struct brcms_phy *pi, u16 a, u16 b)
{
struct phytbl_info tab;
u16 iqcc[2];
delta_temp = (s8) wlc_lcnphy_qdiv_roundup((u32) (temp_diff * 192),
(u32) (pi_lcn->
lcnphy_tempsense_slope
* 10), 0);
if (neg)
delta_temp = -delta_temp;
iqcc[0] = a;
iqcc[1] = b;
if (pi_lcn->lcnphy_tempsense_option == 3
&& LCNREV_IS(pi->pubpi.phy_rev, 0))
delta_temp = 0;
if (pi_lcn->lcnphy_tempcorrx > 31)
tempcorrx = (s8) (pi_lcn->lcnphy_tempcorrx - 64);
else
tempcorrx = (s8) pi_lcn->lcnphy_tempcorrx;
if (LCNREV_IS(pi->pubpi.phy_rev, 1))
tempcorrx = 4;
new_index =
index + delta_brd + delta_temp - pi_lcn->lcnphy_bandedge_corr;
new_index += tempcorrx;
tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL;
tab.tbl_width = 16;
tab.tbl_ptr = iqcc;
tab.tbl_len = 2;
tab.tbl_offset = 80;
wlc_lcnphy_write_table(pi, &tab);
if (LCNREV_IS(pi->pubpi.phy_rev, 1))
index = 127;
if (new_index < 0 || new_index > 126)
return index;
return new_index;
}
void wlc_lcnphy_set_tx_locc(struct brcms_phy *pi, u16 didq)
static u16 wlc_lcnphy_set_tx_pwr_ctrl_mode(struct brcms_phy *pi, u16 mode)
{
struct phytbl_info tab;
tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL;
tab.tbl_width = 16;
tab.tbl_ptr = &didq;
tab.tbl_len = 1;
tab.tbl_offset = 85;
wlc_lcnphy_write_table(pi, &tab);
u16 current_mode = mode;
if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) &&
mode == LCNPHY_TX_PWR_CTRL_HW)
current_mode = LCNPHY_TX_PWR_CTRL_TEMPBASED;
if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi) &&
mode == LCNPHY_TX_PWR_CTRL_TEMPBASED)
current_mode = LCNPHY_TX_PWR_CTRL_HW;
return current_mode;
}
void wlc_lcnphy_set_tx_pwr_by_index(struct brcms_phy *pi, int index)
void wlc_lcnphy_set_tx_pwr_ctrl(struct brcms_phy *pi, u16 mode)
{
struct phytbl_info tab;
u16 a, b;
u8 bb_mult;
u32 bbmultiqcomp, txgain, locoeffs, rfpower;
struct lcnphy_txgains gains;
u16 old_mode = wlc_lcnphy_get_tx_pwr_ctrl(pi);
s8 index;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
pi_lcn->lcnphy_tx_power_idx_override = (s8) index;
pi_lcn->lcnphy_current_index = (u8) index;
tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
tab.tbl_width = 32;
tab.tbl_len = 1;
mode = wlc_lcnphy_set_tx_pwr_ctrl_mode(pi, mode);
old_mode = wlc_lcnphy_set_tx_pwr_ctrl_mode(pi, old_mode);
wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
mod_phy_reg(pi, 0x6da, (0x1 << 6),
((LCNPHY_TX_PWR_CTRL_HW == mode) ? 1 : 0) << 6);
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_IQ_OFFSET + index;
tab.tbl_ptr = &bbmultiqcomp;
wlc_lcnphy_read_table(pi, &tab);
mod_phy_reg(pi, 0x6a3, (0x1 << 4),
((LCNPHY_TX_PWR_CTRL_HW == mode) ? 0 : 1) << 4);
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_GAIN_OFFSET + index;
tab.tbl_width = 32;
tab.tbl_ptr = &txgain;
wlc_lcnphy_read_table(pi, &tab);
if (old_mode != mode) {
if (LCNPHY_TX_PWR_CTRL_HW == old_mode) {
gains.gm_gain = (u16) (txgain & 0xff);
gains.pga_gain = (u16) (txgain >> 8) & 0xff;
gains.pad_gain = (u16) (txgain >> 16) & 0xff;
gains.dac_gain = (u16) (bbmultiqcomp >> 28) & 0x07;
wlc_lcnphy_set_tx_gain(pi, &gains);
wlc_lcnphy_set_pa_gain(pi, (u16) (txgain >> 24) & 0x7f);
wlc_lcnphy_tx_pwr_update_npt(pi);
bb_mult = (u8) ((bbmultiqcomp >> 20) & 0xff);
wlc_lcnphy_set_bbmult(pi, bb_mult);
wlc_lcnphy_clear_tx_power_offsets(pi);
}
if (LCNPHY_TX_PWR_CTRL_HW == mode) {
wlc_lcnphy_enable_tx_gain_override(pi);
wlc_lcnphy_txpower_recalc_target(pi);
if (!wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) {
wlc_lcnphy_set_start_tx_pwr_idx(pi,
pi_lcn->
lcnphy_tssi_idx);
wlc_lcnphy_set_tx_pwr_npt(pi, pi_lcn->lcnphy_tssi_npt);
mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 0);
a = (u16) ((bbmultiqcomp >> 10) & 0x3ff);
b = (u16) (bbmultiqcomp & 0x3ff);
wlc_lcnphy_set_tx_iqcc(pi, a, b);
pi_lcn->lcnphy_tssi_tx_cnt =
wlc_lcnphy_total_tx_frames(pi);
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_LO_OFFSET + index;
tab.tbl_ptr = &locoeffs;
wlc_lcnphy_read_table(pi, &tab);
wlc_lcnphy_set_tx_locc(pi, (u16) locoeffs);
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_PWR_OFFSET + index;
tab.tbl_ptr = &rfpower;
wlc_lcnphy_read_table(pi, &tab);
mod_phy_reg(pi, 0x6a6, (0x1fff << 0), (rfpower * 8) << 0);
wlc_lcnphy_disable_tx_gain_override(pi);
pi_lcn->lcnphy_tx_power_idx_override = -1;
} else
wlc_lcnphy_enable_tx_gain_override(pi);
mod_phy_reg(pi, 0x4a4,
((0x1 << 15) | (0x1 << 14) | (0x1 << 13)), mode);
if (mode == LCNPHY_TX_PWR_CTRL_TEMPBASED) {
index = wlc_lcnphy_tempcompensated_txpwrctrl(pi);
wlc_lcnphy_set_tx_pwr_soft_ctrl(pi, index);
pi_lcn->lcnphy_current_index = (s8)
((read_phy_reg(pi,
0x4a9) &
0xFF) / 2);
}
}
}
static void wlc_lcnphy_set_trsw_override(struct brcms_phy *pi, bool tx, bool rx)
static void
wlc_lcnphy_tx_iqlo_loopback(struct brcms_phy *pi, u16 *values_to_save)
{
u16 vmid;
int i;
for (i = 0; i < 20; i++)
values_to_save[i] =
read_radio_reg(pi, iqlo_loopback_rf_regs[i]);
mod_phy_reg(pi, 0x44d,
(0x1 << 1) |
(0x1 << 0), (tx ? (0x1 << 1) : 0) | (rx ? (0x1 << 0) : 0));
or_phy_reg(pi, 0x44c, (0x1 << 1) | (0x1 << 0));
}
static void wlc_lcnphy_clear_papd_comptable(struct brcms_phy *pi)
{
u32 j;
struct phytbl_info tab;
u32 temp_offset[128];
tab.tbl_ptr = temp_offset;
tab.tbl_len = 128;
tab.tbl_id = LCNPHY_TBL_ID_PAPDCOMPDELTATBL;
tab.tbl_width = 32;
tab.tbl_offset = 0;
mod_phy_reg(pi, 0x44c, (0x1 << 12), 1 << 12);
mod_phy_reg(pi, 0x44d, (0x1 << 14), 1 << 14);
memset(temp_offset, 0, sizeof(temp_offset));
for (j = 1; j < 128; j += 2)
temp_offset[j] = 0x80000;
mod_phy_reg(pi, 0x44c, (0x1 << 11), 1 << 11);
mod_phy_reg(pi, 0x44d, (0x1 << 13), 0 << 13);
wlc_lcnphy_write_table(pi, &tab);
return;
}
mod_phy_reg(pi, 0x43b, (0x1 << 1), 1 << 1);
mod_phy_reg(pi, 0x43c, (0x1 << 1), 0 << 1);
static void
wlc_lcnphy_set_rx_gain_by_distribution(struct brcms_phy *pi,
u16 trsw,
u16 ext_lna,
u16 biq2,
u16 biq1,
u16 tia, u16 lna2, u16 lna1)
{
u16 gain0_15, gain16_19;
mod_phy_reg(pi, 0x43b, (0x1 << 0), 1 << 0);
mod_phy_reg(pi, 0x43c, (0x1 << 0), 0 << 0);
gain16_19 = biq2 & 0xf;
gain0_15 = ((biq1 & 0xf) << 12) |
((tia & 0xf) << 8) |
((lna2 & 0x3) << 6) |
((lna2 &
0x3) << 4) | ((lna1 & 0x3) << 2) | ((lna1 & 0x3) << 0);
if (LCNREV_IS(pi->pubpi.phy_rev, 2))
and_radio_reg(pi, RADIO_2064_REG03A, 0xFD);
else
and_radio_reg(pi, RADIO_2064_REG03A, 0xF9);
or_radio_reg(pi, RADIO_2064_REG11A, 0x1);
mod_phy_reg(pi, 0x4b6, (0xffff << 0), gain0_15 << 0);
mod_phy_reg(pi, 0x4b7, (0xf << 0), gain16_19 << 0);
mod_phy_reg(pi, 0x4b1, (0x3 << 11), lna1 << 11);
or_radio_reg(pi, RADIO_2064_REG036, 0x01);
or_radio_reg(pi, RADIO_2064_REG11A, 0x18);
udelay(20);
if (LCNREV_LT(pi->pubpi.phy_rev, 2)) {
mod_phy_reg(pi, 0x4b1, (0x1 << 9), ext_lna << 9);
mod_phy_reg(pi, 0x4b1, (0x1 << 10), ext_lna << 10);
if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
if (CHSPEC_IS5G(pi->radio_chanspec))
mod_radio_reg(pi, RADIO_2064_REG03A, 1, 0);
else
or_radio_reg(pi, RADIO_2064_REG03A, 1);
} else {
mod_phy_reg(pi, 0x4b1, (0x1 << 10), 0 << 10);
if (CHSPEC_IS5G(pi->radio_chanspec))
mod_radio_reg(pi, RADIO_2064_REG03A, 3, 1);
else
or_radio_reg(pi, RADIO_2064_REG03A, 0x3);
}
mod_phy_reg(pi, 0x4b1, (0x1 << 15), 0 << 15);
udelay(20);
mod_phy_reg(pi, 0x4b1, (0x1 << 9), ext_lna << 9);
write_radio_reg(pi, RADIO_2064_REG025, 0xF);
if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
if (CHSPEC_IS5G(pi->radio_chanspec))
mod_radio_reg(pi, RADIO_2064_REG028, 0xF, 0x4);
else
mod_radio_reg(pi, RADIO_2064_REG028, 0xF, 0x6);
} else {
if (CHSPEC_IS5G(pi->radio_chanspec))
mod_radio_reg(pi, RADIO_2064_REG028, 0x1e, 0x4 << 1);
else
mod_radio_reg(pi, RADIO_2064_REG028, 0x1e, 0x6 << 1);
}
mod_phy_reg(pi, 0x44d, (0x1 << 0), (!trsw) << 0);
udelay(20);
}
write_radio_reg(pi, RADIO_2064_REG005, 0x8);
or_radio_reg(pi, RADIO_2064_REG112, 0x80);
udelay(20);
static void
wlc_lcnphy_rx_gain_override_enable(struct brcms_phy *pi, bool enable)
{
u16 ebit = enable ? 1 : 0;
or_radio_reg(pi, RADIO_2064_REG0FF, 0x10);
or_radio_reg(pi, RADIO_2064_REG11F, 0x44);
udelay(20);
mod_phy_reg(pi, 0x4b0, (0x1 << 8), ebit << 8);
or_radio_reg(pi, RADIO_2064_REG00B, 0x7);
or_radio_reg(pi, RADIO_2064_REG113, 0x10);
udelay(20);
mod_phy_reg(pi, 0x44c, (0x1 << 0), ebit << 0);
write_radio_reg(pi, RADIO_2064_REG007, 0x1);
udelay(20);
if (LCNREV_LT(pi->pubpi.phy_rev, 2)) {
mod_phy_reg(pi, 0x44c, (0x1 << 4), ebit << 4);
mod_phy_reg(pi, 0x44c, (0x1 << 6), ebit << 6);
mod_phy_reg(pi, 0x4b0, (0x1 << 5), ebit << 5);
mod_phy_reg(pi, 0x4b0, (0x1 << 6), ebit << 6);
} else {
mod_phy_reg(pi, 0x4b0, (0x1 << 12), ebit << 12);
mod_phy_reg(pi, 0x4b0, (0x1 << 13), ebit << 13);
mod_phy_reg(pi, 0x4b0, (0x1 << 5), ebit << 5);
}
vmid = 0x2A6;
mod_radio_reg(pi, RADIO_2064_REG0FC, 0x3 << 0, (vmid >> 8) & 0x3);
write_radio_reg(pi, RADIO_2064_REG0FD, (vmid & 0xff));
or_radio_reg(pi, RADIO_2064_REG11F, 0x44);
udelay(20);
if (CHSPEC_IS2G(pi->radio_chanspec)) {
mod_phy_reg(pi, 0x4b0, (0x1 << 10), ebit << 10);
mod_phy_reg(pi, 0x4e5, (0x1 << 3), ebit << 3);
}
or_radio_reg(pi, RADIO_2064_REG0FF, 0x10);
udelay(20);
write_radio_reg(pi, RADIO_2064_REG012, 0x02);
or_radio_reg(pi, RADIO_2064_REG112, 0x06);
write_radio_reg(pi, RADIO_2064_REG036, 0x11);
write_radio_reg(pi, RADIO_2064_REG059, 0xcc);
write_radio_reg(pi, RADIO_2064_REG05C, 0x2e);
write_radio_reg(pi, RADIO_2064_REG078, 0xd7);
write_radio_reg(pi, RADIO_2064_REG092, 0x15);
}
void wlc_lcnphy_tx_pu(struct brcms_phy *pi, bool bEnable)
static bool wlc_lcnphy_iqcal_wait(struct brcms_phy *pi)
{
if (!bEnable) {
uint delay_count = 0;
and_phy_reg(pi, 0x43b, ~(u16) ((0x1 << 1) | (0x1 << 4)));
while (wlc_lcnphy_iqcal_active(pi)) {
udelay(100);
delay_count++;
mod_phy_reg(pi, 0x43c, (0x1 << 1), 1 << 1);
if (delay_count > (10 * 500))
break;
}
and_phy_reg(pi, 0x44c,
~(u16) ((0x1 << 3) |
(0x1 << 5) |
(0x1 << 12) |
(0x1 << 0) | (0x1 << 1) | (0x1 << 2)));
return (0 == wlc_lcnphy_iqcal_active(pi));
}
and_phy_reg(pi, 0x44d,
~(u16) ((0x1 << 3) | (0x1 << 5) | (0x1 << 14)));
mod_phy_reg(pi, 0x44d, (0x1 << 2), 1 << 2);
static void
wlc_lcnphy_tx_iqlo_loopback_cleanup(struct brcms_phy *pi, u16 *values_to_save)
{
int i;
mod_phy_reg(pi, 0x44d, (0x1 << 1) | (0x1 << 0), (0x1 << 0));
and_phy_reg(pi, 0x44c, 0x0 >> 11);
and_phy_reg(pi, 0x4f9,
~(u16) ((0x1 << 0) | (0x1 << 1) | (0x1 << 2)));
and_phy_reg(pi, 0x43b, 0xC);
and_phy_reg(pi, 0x4fa,
~(u16) ((0x1 << 0) | (0x1 << 1) | (0x1 << 2)));
} else {
for (i = 0; i < 20; i++)
write_radio_reg(pi, iqlo_loopback_rf_regs[i],
values_to_save[i]);
}
mod_phy_reg(pi, 0x43b, (0x1 << 1), 1 << 1);
mod_phy_reg(pi, 0x43c, (0x1 << 1), 0 << 1);
static void
wlc_lcnphy_tx_iqlo_cal(struct brcms_phy *pi,
struct lcnphy_txgains *target_gains,
enum lcnphy_cal_mode cal_mode, bool keep_tone)
{
mod_phy_reg(pi, 0x43b, (0x1 << 4), 1 << 4);
mod_phy_reg(pi, 0x43c, (0x1 << 6), 0 << 6);
struct lcnphy_txgains cal_gains, temp_gains;
u16 hash;
u8 band_idx;
int j;
u16 ncorr_override[5];
u16 syst_coeffs[] = { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000};
mod_phy_reg(pi, 0x44c, (0x1 << 12), 1 << 12);
mod_phy_reg(pi, 0x44d, (0x1 << 14), 1 << 14);
u16 commands_fullcal[] = {
0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234
};
wlc_lcnphy_set_trsw_override(pi, true, false);
u16 commands_recal[] = {
0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234
};
mod_phy_reg(pi, 0x44d, (0x1 << 2), 0 << 2);
mod_phy_reg(pi, 0x44c, (0x1 << 2), 1 << 2);
u16 command_nums_fullcal[] = {
0x7a97, 0x7a97, 0x7a97, 0x7a87, 0x7a87, 0x7b97
};
if (CHSPEC_IS2G(pi->radio_chanspec)) {
u16 command_nums_recal[] = {
0x7a97, 0x7a97, 0x7a97, 0x7a87, 0x7a87, 0x7b97
};
u16 *command_nums = command_nums_fullcal;
mod_phy_reg(pi, 0x44c, (0x1 << 3), 1 << 3);
mod_phy_reg(pi, 0x44d, (0x1 << 3), 1 << 3);
u16 *start_coeffs = NULL, *cal_cmds = NULL, cal_type, diq_start;
u16 tx_pwr_ctrl_old, save_txpwrctrlrfctrl2;
u16 save_sslpnCalibClkEnCtrl, save_sslpnRxFeClkEnCtrl;
bool tx_gain_override_old;
struct lcnphy_txgains old_gains;
uint i, n_cal_cmds = 0, n_cal_start = 0;
u16 *values_to_save;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
mod_phy_reg(pi, 0x44c, (0x1 << 5), 1 << 5);
mod_phy_reg(pi, 0x44d, (0x1 << 5), 0 << 5);
values_to_save = kmalloc(sizeof(u16) * 20, GFP_ATOMIC);
if (NULL == values_to_save)
return;
mod_phy_reg(pi, 0x4f9, (0x1 << 1), 1 << 1);
mod_phy_reg(pi, 0x4fa, (0x1 << 1), 1 << 1);
save_sslpnRxFeClkEnCtrl = read_phy_reg(pi, 0x6db);
save_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da);
mod_phy_reg(pi, 0x4f9, (0x1 << 2), 1 << 2);
mod_phy_reg(pi, 0x4fa, (0x1 << 2), 1 << 2);
or_phy_reg(pi, 0x6da, 0x40);
or_phy_reg(pi, 0x6db, 0x3);
mod_phy_reg(pi, 0x4f9, (0x1 << 0), 1 << 0);
mod_phy_reg(pi, 0x4fa, (0x1 << 0), 1 << 0);
} else {
mod_phy_reg(pi, 0x44c, (0x1 << 3), 1 << 3);
mod_phy_reg(pi, 0x44d, (0x1 << 3), 0 << 3);
mod_phy_reg(pi, 0x44c, (0x1 << 5), 1 << 5);
mod_phy_reg(pi, 0x44d, (0x1 << 5), 1 << 5);
mod_phy_reg(pi, 0x4f9, (0x1 << 1), 1 << 1);
mod_phy_reg(pi, 0x4fa, (0x1 << 1), 0 << 1);
switch (cal_mode) {
case LCNPHY_CAL_FULL:
start_coeffs = syst_coeffs;
cal_cmds = commands_fullcal;
n_cal_cmds = ARRAY_SIZE(commands_fullcal);
break;
mod_phy_reg(pi, 0x4f9, (0x1 << 2), 1 << 2);
mod_phy_reg(pi, 0x4fa, (0x1 << 2), 0 << 2);
case LCNPHY_CAL_RECAL:
start_coeffs = syst_coeffs;
cal_cmds = commands_recal;
n_cal_cmds = ARRAY_SIZE(commands_recal);
command_nums = command_nums_recal;
break;
mod_phy_reg(pi, 0x4f9, (0x1 << 0), 1 << 0);
mod_phy_reg(pi, 0x4fa, (0x1 << 0), 0 << 0);
}
default:
break;
}
}
static void
wlc_lcnphy_run_samples(struct brcms_phy *pi,
u16 num_samps,
u16 num_loops, u16 wait, bool iqcalmode)
{
wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
start_coeffs, 11, 16, 64);
or_phy_reg(pi, 0x6da, 0x8080);
write_phy_reg(pi, 0x6da, 0xffff);
mod_phy_reg(pi, 0x503, (0x1 << 3), (1) << 3);
mod_phy_reg(pi, 0x642, (0x7f << 0), (num_samps - 1) << 0);
if (num_loops != 0xffff)
num_loops--;
mod_phy_reg(pi, 0x640, (0xffff << 0), num_loops << 0);
tx_pwr_ctrl_old = wlc_lcnphy_get_tx_pwr_ctrl(pi);
mod_phy_reg(pi, 0x641, (0xffff << 0), wait << 0);
mod_phy_reg(pi, 0x4a4, (0x1 << 12), (1) << 12);
if (iqcalmode) {
wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
and_phy_reg(pi, 0x453, (u16) ~(0x1 << 15));
or_phy_reg(pi, 0x453, (0x1 << 15));
} else {
write_phy_reg(pi, 0x63f, 1);
wlc_lcnphy_tx_pu(pi, 1);
}
save_txpwrctrlrfctrl2 = read_phy_reg(pi, 0x4db);
or_radio_reg(pi, RADIO_2064_REG112, 0x6);
}
mod_phy_reg(pi, 0x4db, (0x3ff << 0), (0x2a6) << 0);
void wlc_lcnphy_deaf_mode(struct brcms_phy *pi, bool mode)
{
mod_phy_reg(pi, 0x4db, (0x7 << 12), (2) << 12);
u8 phybw40;
phybw40 = CHSPEC_IS40(pi->radio_chanspec);
wlc_lcnphy_tx_iqlo_loopback(pi, values_to_save);
if (LCNREV_LT(pi->pubpi.phy_rev, 2)) {
mod_phy_reg(pi, 0x4b0, (0x1 << 5), (mode) << 5);
mod_phy_reg(pi, 0x4b1, (0x1 << 9), 0 << 9);
} else {
mod_phy_reg(pi, 0x4b0, (0x1 << 5), (mode) << 5);
mod_phy_reg(pi, 0x4b1, (0x1 << 9), 0 << 9);
}
tx_gain_override_old = wlc_lcnphy_tx_gain_override_enabled(pi);
if (tx_gain_override_old)
wlc_lcnphy_get_tx_gain(pi, &old_gains);
if (phybw40 == 0) {
mod_phy_reg((pi), 0x410,
(0x1 << 6) |
(0x1 << 5),
((CHSPEC_IS2G(
pi->radio_chanspec)) ? (!mode) : 0) <<
6 | (!mode) << 5);
mod_phy_reg(pi, 0x410, (0x1 << 7), (mode) << 7);
if (!target_gains) {
if (!tx_gain_override_old)
wlc_lcnphy_set_tx_pwr_by_index(pi,
pi_lcn->lcnphy_tssi_idx);
wlc_lcnphy_get_tx_gain(pi, &temp_gains);
target_gains = &temp_gains;
}
}
void
wlc_lcnphy_start_tx_tone(struct brcms_phy *pi, s32 f_kHz, u16 max_val,
bool iqcalmode)
{
u8 phy_bw;
u16 num_samps, t, k;
u32 bw;
s32 theta = 0, rot = 0;
struct cordic_iq tone_samp;
u32 data_buf[64];
u16 i_samp, q_samp;
struct phytbl_info tab;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
pi->phy_tx_tone_freq = f_kHz;
hash = (target_gains->gm_gain << 8) |
(target_gains->pga_gain << 4) | (target_gains->pad_gain);
wlc_lcnphy_deaf_mode(pi, true);
band_idx = (CHSPEC_IS5G(pi->radio_chanspec) ? 1 : 0);
phy_bw = 40;
if (pi_lcn->lcnphy_spurmod) {
write_phy_reg(pi, 0x942, 0x2);
write_phy_reg(pi, 0x93b, 0x0);
write_phy_reg(pi, 0x93c, 0x0);
wlc_lcnphy_txrx_spur_avoidance_mode(pi, false);
cal_gains = *target_gains;
memset(ncorr_override, 0, sizeof(ncorr_override));
for (j = 0; j < iqcal_gainparams_numgains_lcnphy[band_idx]; j++) {
if (hash == tbl_iqcal_gainparams_lcnphy[band_idx][j][0]) {
cal_gains.gm_gain =
tbl_iqcal_gainparams_lcnphy[band_idx][j][1];
cal_gains.pga_gain =
tbl_iqcal_gainparams_lcnphy[band_idx][j][2];
cal_gains.pad_gain =
tbl_iqcal_gainparams_lcnphy[band_idx][j][3];
memcpy(ncorr_override,
&tbl_iqcal_gainparams_lcnphy[band_idx][j][3],
sizeof(ncorr_override));
break;
}
}
if (f_kHz) {
k = 1;
do {
bw = phy_bw * 1000 * k;
num_samps = bw / ABS(f_kHz);
k++;
} while ((num_samps * (u32) (ABS(f_kHz))) != bw);
} else
num_samps = 2;
wlc_lcnphy_set_tx_gain(pi, &cal_gains);
rot = ((f_kHz * 36) / phy_bw) / 100;
theta = 0;
write_phy_reg(pi, 0x453, 0xaa9);
write_phy_reg(pi, 0x93d, 0xc0);
for (t = 0; t < num_samps; t++) {
wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
lcnphy_iqcal_loft_gainladder,
ARRAY_SIZE(lcnphy_iqcal_loft_gainladder),
16, 0);
tone_samp = cordic_calc_iq(theta);
wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
lcnphy_iqcal_ir_gainladder,
ARRAY_SIZE(
lcnphy_iqcal_ir_gainladder), 16,
32);
theta += rot;
if (pi->phy_tx_tone_freq) {
i_samp = (u16) (FLOAT(tone_samp.i * max_val) & 0x3ff);
q_samp = (u16) (FLOAT(tone_samp.q * max_val) & 0x3ff);
data_buf[t] = (i_samp << 10) | q_samp;
wlc_lcnphy_stop_tx_tone(pi);
udelay(5);
wlc_lcnphy_start_tx_tone(pi, 3750, 88, 1);
} else {
wlc_lcnphy_start_tx_tone(pi, 3750, 88, 1);
}
mod_phy_reg(pi, 0x6d6, (0x3 << 0), 0 << 0);
mod_phy_reg(pi, 0x6da, (0x1 << 3), 1 << 3);
write_phy_reg(pi, 0x6da, 0xffff);
tab.tbl_ptr = data_buf;
tab.tbl_len = num_samps;
tab.tbl_id = LCNPHY_TBL_ID_SAMPLEPLAY;
tab.tbl_offset = 0;
tab.tbl_width = 32;
wlc_lcnphy_write_table(pi, &tab);
for (i = n_cal_start; i < n_cal_cmds; i++) {
u16 zero_diq = 0;
u16 best_coeffs[11];
u16 command_num;
wlc_lcnphy_run_samples(pi, num_samps, 0xffff, 0, iqcalmode);
}
cal_type = (cal_cmds[i] & 0x0f00) >> 8;
void wlc_lcnphy_stop_tx_tone(struct brcms_phy *pi)
{
s16 playback_status;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
command_num = command_nums[i];
if (ncorr_override[cal_type])
command_num =
ncorr_override[cal_type] << 8 | (command_num &
0xff);
pi->phy_tx_tone_freq = 0;
if (pi_lcn->lcnphy_spurmod) {
write_phy_reg(pi, 0x942, 0x7);
write_phy_reg(pi, 0x93b, 0x2017);
write_phy_reg(pi, 0x93c, 0x27c5);
wlc_lcnphy_txrx_spur_avoidance_mode(pi, true);
}
write_phy_reg(pi, 0x452, command_num);
playback_status = read_phy_reg(pi, 0x644);
if (playback_status & (0x1 << 0)) {
wlc_lcnphy_tx_pu(pi, 0);
mod_phy_reg(pi, 0x63f, (0x1 << 1), 1 << 1);
} else if (playback_status & (0x1 << 1))
mod_phy_reg(pi, 0x453, (0x1 << 15), 0 << 15);
if ((cal_type == 3) || (cal_type == 4)) {
wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL,
&diq_start, 1, 16, 69);
mod_phy_reg(pi, 0x6d6, (0x3 << 0), 1 << 0);
wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
&zero_diq, 1, 16, 69);
}
mod_phy_reg(pi, 0x6da, (0x1 << 3), 0 << 3);
write_phy_reg(pi, 0x451, cal_cmds[i]);
mod_phy_reg(pi, 0x6da, (0x1 << 7), 0 << 7);
if (!wlc_lcnphy_iqcal_wait(pi))
goto cleanup;
and_radio_reg(pi, RADIO_2064_REG112, 0xFFF9);
wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL,
best_coeffs,
ARRAY_SIZE(best_coeffs), 16, 96);
wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
best_coeffs,
ARRAY_SIZE(best_coeffs), 16, 64);
wlc_lcnphy_deaf_mode(pi, false);
}
if ((cal_type == 3) || (cal_type == 4))
wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
&diq_start, 1, 16, 69);
wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL,
pi_lcn->lcnphy_cal_results.
txiqlocal_bestcoeffs,
ARRAY_SIZE(pi_lcn->
lcnphy_cal_results.
txiqlocal_bestcoeffs),
16, 96);
}
static void wlc_lcnphy_clear_trsw_override(struct brcms_phy *pi)
{
wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL,
pi_lcn->lcnphy_cal_results.
txiqlocal_bestcoeffs,
ARRAY_SIZE(pi_lcn->lcnphy_cal_results.
txiqlocal_bestcoeffs), 16, 96);
pi_lcn->lcnphy_cal_results.txiqlocal_bestcoeffs_valid = true;
and_phy_reg(pi, 0x44c, (u16) ~((0x1 << 1) | (0x1 << 0)));
}
wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
&pi_lcn->lcnphy_cal_results.
txiqlocal_bestcoeffs[0], 4, 16, 80);
void wlc_lcnphy_get_tx_iqcc(struct brcms_phy *pi, u16 *a, u16 *b)
{
u16 iqcc[2];
struct phytbl_info tab;
wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
&pi_lcn->lcnphy_cal_results.
txiqlocal_bestcoeffs[5], 2, 16, 85);
tab.tbl_ptr = iqcc;
tab.tbl_len = 2;
tab.tbl_id = 0;
tab.tbl_offset = 80;
tab.tbl_width = 16;
wlc_lcnphy_read_table(pi, &tab);
cleanup:
wlc_lcnphy_tx_iqlo_loopback_cleanup(pi, values_to_save);
kfree(values_to_save);
*a = iqcc[0];
*b = iqcc[1];
}
if (!keep_tone)
wlc_lcnphy_stop_tx_tone(pi);
u16 wlc_lcnphy_get_tx_locc(struct brcms_phy *pi)
{
struct phytbl_info tab;
u16 didq;
write_phy_reg(pi, 0x4db, save_txpwrctrlrfctrl2);
tab.tbl_id = 0;
tab.tbl_width = 16;
tab.tbl_ptr = &didq;
tab.tbl_len = 1;
tab.tbl_offset = 85;
wlc_lcnphy_read_table(pi, &tab);
write_phy_reg(pi, 0x453, 0);
if (tx_gain_override_old)
wlc_lcnphy_set_tx_gain(pi, &old_gains);
wlc_lcnphy_set_tx_pwr_ctrl(pi, tx_pwr_ctrl_old);
write_phy_reg(pi, 0x6da, save_sslpnCalibClkEnCtrl);
write_phy_reg(pi, 0x6db, save_sslpnRxFeClkEnCtrl);
return didq;
}
static void wlc_lcnphy_txpwrtbl_iqlo_cal(struct brcms_phy *pi)
static void wlc_lcnphy_idle_tssi_est(struct brcms_phy_pub *ppi)
{
struct lcnphy_txgains target_gains, old_gains;
u8 save_bb_mult;
u16 a, b, didq, save_pa_gain = 0;
uint idx, SAVE_txpwrindex = 0xFF;
u32 val;
bool suspend, tx_gain_override_old;
struct lcnphy_txgains old_gains;
struct brcms_phy *pi = (struct brcms_phy *) ppi;
u16 idleTssi, idleTssi0_2C, idleTssi0_OB, idleTssi0_regvalue_OB,
idleTssi0_regvalue_2C;
u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
struct phytbl_info tab;
u8 ei0, eq0, fi0, fq0;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
u16 SAVE_lpfgain = read_radio_reg(pi, RADIO_2064_REG112);
u16 SAVE_jtag_bb_afe_switch =
read_radio_reg(pi, RADIO_2064_REG007) & 1;
u16 SAVE_jtag_auxpga = read_radio_reg(pi, RADIO_2064_REG0FF) & 0x10;
u16 SAVE_iqadc_aux_en = read_radio_reg(pi, RADIO_2064_REG11F) & 4;
idleTssi = read_phy_reg(pi, 0x4ab);
suspend =
(0 ==
(R_REG(&((struct brcms_phy *) pi)->regs->maccontrol) &
MCTL_EN_MAC));
if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim);
wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
tx_gain_override_old = wlc_lcnphy_tx_gain_override_enabled(pi);
wlc_lcnphy_get_tx_gain(pi, &old_gains);
save_pa_gain = wlc_lcnphy_get_pa_gain(pi);
save_bb_mult = wlc_lcnphy_get_bbmult(pi);
wlc_lcnphy_enable_tx_gain_override(pi);
wlc_lcnphy_set_tx_pwr_by_index(pi, 127);
write_radio_reg(pi, RADIO_2064_REG112, 0x6);
mod_radio_reg(pi, RADIO_2064_REG007, 0x1, 1);
mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, 1 << 4);
mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 1 << 2);
wlc_lcnphy_tssi_setup(pi);
wlc_phy_do_dummy_tx(pi, true, OFF);
idleTssi = ((read_phy_reg(pi, 0x4ab) & (0x1ff << 0))
>> 0);
if (SAVE_txpwrctrl == LCNPHY_TX_PWR_CTRL_OFF)
SAVE_txpwrindex = wlc_lcnphy_get_current_tx_pwr_idx(pi);
idleTssi0_2C = ((read_phy_reg(pi, 0x63e) & (0x1ff << 0))
>> 0);
wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
if (idleTssi0_2C >= 256)
idleTssi0_OB = idleTssi0_2C - 256;
else
idleTssi0_OB = idleTssi0_2C + 256;
target_gains.gm_gain = 7;
target_gains.pga_gain = 0;
target_gains.pad_gain = 21;
target_gains.dac_gain = 0;
wlc_lcnphy_set_tx_gain(pi, &target_gains);
wlc_lcnphy_set_tx_pwr_by_index(pi, 16);
idleTssi0_regvalue_OB = idleTssi0_OB;
if (idleTssi0_regvalue_OB >= 256)
idleTssi0_regvalue_2C = idleTssi0_regvalue_OB - 256;
else
idleTssi0_regvalue_2C = idleTssi0_regvalue_OB + 256;
mod_phy_reg(pi, 0x4a6, (0x1ff << 0), (idleTssi0_regvalue_2C) << 0);
if (LCNREV_IS(pi->pubpi.phy_rev, 1) || pi_lcn->lcnphy_hw_iqcal_en) {
mod_phy_reg(pi, 0x44c, (0x1 << 12), (0) << 12);
wlc_lcnphy_set_tx_pwr_by_index(pi, 30);
wlc_lcnphy_set_tx_gain_override(pi, tx_gain_override_old);
wlc_lcnphy_set_tx_gain(pi, &old_gains);
wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_txpwrctrl);
wlc_lcnphy_tx_iqlo_cal(pi, &target_gains,
(pi_lcn->
lcnphy_recal ? LCNPHY_CAL_RECAL :
LCNPHY_CAL_FULL), false);
} else {
wlc_lcnphy_tx_iqlo_soft_cal_full(pi);
}
write_radio_reg(pi, RADIO_2064_REG112, SAVE_lpfgain);
mod_radio_reg(pi, RADIO_2064_REG007, 0x1, SAVE_jtag_bb_afe_switch);
mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, SAVE_jtag_auxpga);
mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, SAVE_iqadc_aux_en);
mod_radio_reg(pi, RADIO_2064_REG112, 0x80, 1 << 7);
if (!suspend)
wlapi_enable_mac(pi->sh->physhim);
}
wlc_lcnphy_get_radio_loft(pi, &ei0, &eq0, &fi0, &fq0);
if ((ABS((s8) fi0) == 15) && (ABS((s8) fq0) == 15)) {
if (CHSPEC_IS5G(pi->radio_chanspec)) {
target_gains.gm_gain = 255;
target_gains.pga_gain = 255;
target_gains.pad_gain = 0xf0;
target_gains.dac_gain = 0;
} else {
target_gains.gm_gain = 7;
target_gains.pga_gain = 45;
target_gains.pad_gain = 186;
target_gains.dac_gain = 0;
}
static void wlc_lcnphy_vbat_temp_sense_setup(struct brcms_phy *pi, u8 mode)
{
bool suspend;
u16 save_txpwrCtrlEn;
u8 auxpga_vmidcourse, auxpga_vmidfine, auxpga_gain;
u16 auxpga_vmid;
struct phytbl_info tab;
u32 val;
u8 save_reg007, save_reg0FF, save_reg11F, save_reg005, save_reg025,
save_reg112;
u16 values_to_save[14];
s8 index;
int i;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
udelay(999);
if (LCNREV_IS(pi->pubpi.phy_rev, 1)
|| pi_lcn->lcnphy_hw_iqcal_en) {
save_reg007 = (u8) read_radio_reg(pi, RADIO_2064_REG007);
save_reg0FF = (u8) read_radio_reg(pi, RADIO_2064_REG0FF);
save_reg11F = (u8) read_radio_reg(pi, RADIO_2064_REG11F);
save_reg005 = (u8) read_radio_reg(pi, RADIO_2064_REG005);
save_reg025 = (u8) read_radio_reg(pi, RADIO_2064_REG025);
save_reg112 = (u8) read_radio_reg(pi, RADIO_2064_REG112);
target_gains.pga_gain = 0;
target_gains.pad_gain = 30;
wlc_lcnphy_set_tx_pwr_by_index(pi, 16);
wlc_lcnphy_tx_iqlo_cal(pi, &target_gains,
LCNPHY_CAL_FULL, false);
} else {
wlc_lcnphy_tx_iqlo_soft_cal_full(pi);
}
}
for (i = 0; i < 14; i++)
values_to_save[i] = read_phy_reg(pi, tempsense_phy_regs[i]);
suspend = (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim);
save_txpwrCtrlEn = read_radio_reg(pi, 0x4a4);
wlc_lcnphy_get_tx_iqcc(pi, &a, &b);
wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
index = pi_lcn->lcnphy_current_index;
wlc_lcnphy_set_tx_pwr_by_index(pi, 127);
mod_radio_reg(pi, RADIO_2064_REG007, 0x1, 0x1);
mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, 0x1 << 4);
mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 0x1 << 2);
mod_phy_reg(pi, 0x503, (0x1 << 0), (0) << 0);
didq = wlc_lcnphy_get_tx_locc(pi);
mod_phy_reg(pi, 0x503, (0x1 << 2), (0) << 2);
tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
tab.tbl_width = 32;
tab.tbl_ptr = &val;
mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0) << 14);
tab.tbl_len = 1;
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET;
mod_phy_reg(pi, 0x4a4, (0x1 << 15), (0) << 15);
for (idx = 0; idx < 128; idx++) {
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_IQ_OFFSET + idx;
mod_phy_reg(pi, 0x4d0, (0x1 << 5), (0) << 5);
wlc_lcnphy_read_table(pi, &tab);
val = (val & 0xfff00000) |
((u32) (a & 0x3FF) << 10) | (b & 0x3ff);
wlc_lcnphy_write_table(pi, &tab);
mod_phy_reg(pi, 0x4a5, (0xff << 0), (255) << 0);
val = didq;
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_LO_OFFSET + idx;
wlc_lcnphy_write_table(pi, &tab);
}
mod_phy_reg(pi, 0x4a5, (0x7 << 12), (5) << 12);
pi_lcn->lcnphy_cal_results.txiqlocal_a = a;
pi_lcn->lcnphy_cal_results.txiqlocal_b = b;
pi_lcn->lcnphy_cal_results.txiqlocal_didq = didq;
pi_lcn->lcnphy_cal_results.txiqlocal_ei0 = ei0;
pi_lcn->lcnphy_cal_results.txiqlocal_eq0 = eq0;
pi_lcn->lcnphy_cal_results.txiqlocal_fi0 = fi0;
pi_lcn->lcnphy_cal_results.txiqlocal_fq0 = fq0;
mod_phy_reg(pi, 0x4a5, (0x7 << 8), (0) << 8);
wlc_lcnphy_set_bbmult(pi, save_bb_mult);
wlc_lcnphy_set_pa_gain(pi, save_pa_gain);
wlc_lcnphy_set_tx_gain(pi, &old_gains);
mod_phy_reg(pi, 0x40d, (0xff << 0), (64) << 0);
if (SAVE_txpwrctrl != LCNPHY_TX_PWR_CTRL_OFF)
wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_txpwrctrl);
else
wlc_lcnphy_set_tx_pwr_by_index(pi, SAVE_txpwrindex);
}
mod_phy_reg(pi, 0x40d, (0x7 << 8), (6) << 8);
s16 wlc_lcnphy_tempsense_new(struct brcms_phy *pi, bool mode)
{
u16 tempsenseval1, tempsenseval2;
s16 avg = 0;
bool suspend = 0;
mod_phy_reg(pi, 0x4a2, (0xff << 0), (64) << 0);
if (mode == 1) {
suspend =
(0 ==
(R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim);
wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE);
}
tempsenseval1 = read_phy_reg(pi, 0x476) & 0x1FF;
tempsenseval2 = read_phy_reg(pi, 0x477) & 0x1FF;
mod_phy_reg(pi, 0x4a2, (0x7 << 8), (6) << 8);
if (tempsenseval1 > 255)
avg = (s16) (tempsenseval1 - 512);
else
avg = (s16) tempsenseval1;
mod_phy_reg(pi, 0x4d9, (0x7 << 4), (2) << 4);
if (tempsenseval2 > 255)
avg += (s16) (tempsenseval2 - 512);
else
avg += (s16) tempsenseval2;
mod_phy_reg(pi, 0x4d9, (0x7 << 8), (3) << 8);
avg /= 2;
mod_phy_reg(pi, 0x4d9, (0x7 << 12), (1) << 12);
if (mode == 1) {
mod_phy_reg(pi, 0x4da, (0x1 << 12), (0) << 12);
mod_phy_reg(pi, 0x448, (0x1 << 14), (1) << 14);
mod_phy_reg(pi, 0x4da, (0x1 << 13), (1) << 13);
udelay(100);
mod_phy_reg(pi, 0x448, (0x1 << 14), (0) << 14);
mod_phy_reg(pi, 0x4a6, (0x1 << 15), (1) << 15);
if (!suspend)
wlapi_enable_mac(pi->sh->physhim);
}
return avg;
}
u16 wlc_lcnphy_tempsense(struct brcms_phy *pi, bool mode)
{
u16 tempsenseval1, tempsenseval2;
s32 avg = 0;
bool suspend = 0;
u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
write_radio_reg(pi, RADIO_2064_REG025, 0xC);
if (mode == 1) {
suspend =
(0 ==
(R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim);
wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE);
}
tempsenseval1 = read_phy_reg(pi, 0x476) & 0x1FF;
tempsenseval2 = read_phy_reg(pi, 0x477) & 0x1FF;
mod_radio_reg(pi, RADIO_2064_REG005, 0x8, 0x1 << 3);
if (tempsenseval1 > 255)
avg = (int)(tempsenseval1 - 512);
else
avg = (int)tempsenseval1;
mod_phy_reg(pi, 0x938, (0x1 << 2), (1) << 2);
if (pi_lcn->lcnphy_tempsense_option == 1 || pi->hwpwrctrl_capable) {
if (tempsenseval2 > 255)
avg = (int)(avg - tempsenseval2 + 512);
else
avg = (int)(avg - tempsenseval2);
} else {
if (tempsenseval2 > 255)
avg = (int)(avg + tempsenseval2 - 512);
else
avg = (int)(avg + tempsenseval2);
avg = avg / 2;
}
if (avg < 0)
avg = avg + 512;
mod_phy_reg(pi, 0x939, (0x1 << 2), (1) << 2);
if (pi_lcn->lcnphy_tempsense_option == 2)
avg = tempsenseval1;
mod_phy_reg(pi, 0x4a4, (0x1 << 12), (1) << 12);
if (mode)
wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_txpwrctrl);
val = wlc_lcnphy_rfseq_tbl_adc_pwrup(pi);
tab.tbl_id = LCNPHY_TBL_ID_RFSEQ;
tab.tbl_width = 16;
tab.tbl_len = 1;
tab.tbl_ptr = &val;
tab.tbl_offset = 6;
wlc_lcnphy_write_table(pi, &tab);
if (mode == TEMPSENSE) {
mod_phy_reg(pi, 0x4d7, (0x1 << 3), (1) << 3);
if (mode == 1) {
mod_phy_reg(pi, 0x4d7, (0x7 << 12), (1) << 12);
mod_phy_reg(pi, 0x448, (0x1 << 14), (1) << 14);
auxpga_vmidcourse = 8;
auxpga_vmidfine = 0x4;
auxpga_gain = 2;
mod_radio_reg(pi, RADIO_2064_REG082, 0x20, 1 << 5);
} else {
mod_phy_reg(pi, 0x4d7, (0x1 << 3), (1) << 3);
udelay(100);
mod_phy_reg(pi, 0x448, (0x1 << 14), (0) << 14);
mod_phy_reg(pi, 0x4d7, (0x7 << 12), (3) << 12);
if (!suspend)
wlapi_enable_mac(pi->sh->physhim);
auxpga_vmidcourse = 7;
auxpga_vmidfine = 0xa;
auxpga_gain = 2;
}
return (u16) avg;
}
auxpga_vmid =
(u16) ((2 << 8) | (auxpga_vmidcourse << 4) | auxpga_vmidfine);
mod_phy_reg(pi, 0x4d8, (0x1 << 0), (1) << 0);
s8 wlc_lcnphy_tempsense_degree(struct brcms_phy *pi, bool mode)
{
s32 degree = wlc_lcnphy_tempsense_new(pi, mode);
degree =
((degree <<
10) + LCN_TEMPSENSE_OFFSET + (LCN_TEMPSENSE_DEN >> 1))
/ LCN_TEMPSENSE_DEN;
return (s8) degree;
}
mod_phy_reg(pi, 0x4d8, (0x3ff << 2), (auxpga_vmid) << 2);
s8 wlc_lcnphy_vbatsense(struct brcms_phy *pi, bool mode)
{
u16 vbatsenseval;
s32 avg = 0;
bool suspend = 0;
mod_phy_reg(pi, 0x4d8, (0x1 << 1), (1) << 1);
if (mode == 1) {
suspend =
(0 ==
(R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim);
wlc_lcnphy_vbat_temp_sense_setup(pi, VBATSENSE);
}
mod_phy_reg(pi, 0x4d8, (0x7 << 12), (auxpga_gain) << 12);
vbatsenseval = read_phy_reg(pi, 0x475) & 0x1FF;
mod_phy_reg(pi, 0x4d0, (0x1 << 5), (1) << 5);
if (vbatsenseval > 255)
avg = (s32) (vbatsenseval - 512);
else
avg = (s32) vbatsenseval;
write_radio_reg(pi, RADIO_2064_REG112, 0x6);
avg = (avg * LCN_VBAT_SCALE_NOM +
(LCN_VBAT_SCALE_DEN >> 1)) / LCN_VBAT_SCALE_DEN;
wlc_phy_do_dummy_tx(pi, true, OFF);
if (!tempsense_done(pi))
udelay(10);
if (mode == 1) {
if (!suspend)
wlapi_enable_mac(pi->sh->physhim);
}
return (s8) avg;
write_radio_reg(pi, RADIO_2064_REG007, (u16) save_reg007);
write_radio_reg(pi, RADIO_2064_REG0FF, (u16) save_reg0FF);
write_radio_reg(pi, RADIO_2064_REG11F, (u16) save_reg11F);
write_radio_reg(pi, RADIO_2064_REG005, (u16) save_reg005);
write_radio_reg(pi, RADIO_2064_REG025, (u16) save_reg025);
write_radio_reg(pi, RADIO_2064_REG112, (u16) save_reg112);
for (i = 0; i < 14; i++)
write_phy_reg(pi, tempsense_phy_regs[i], values_to_save[i]);
wlc_lcnphy_set_tx_pwr_by_index(pi, (int)index);
write_radio_reg(pi, 0x4a4, save_txpwrCtrlEn);
if (!suspend)
wlapi_enable_mac(pi->sh->physhim);
udelay(999);
}
static void wlc_lcnphy_afe_clk_init(struct brcms_phy *pi, u8 mode)
static void wlc_lcnphy_tx_pwr_ctrl_init(struct brcms_phy_pub *ppi)
{
u8 phybw40;
phybw40 = CHSPEC_IS40(pi->radio_chanspec);
struct lcnphy_txgains tx_gains;
u8 bbmult;
struct phytbl_info tab;
s32 a1, b0, b1;
s32 tssi, pwr, maxtargetpwr, mintargetpwr;
bool suspend;
struct brcms_phy *pi = (struct brcms_phy *) ppi;
mod_phy_reg(pi, 0x6d1, (0x1 << 7), (1) << 7);
suspend =
(0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim);
if (((mode == AFE_CLK_INIT_MODE_PAPD) && (phybw40 == 0)) ||
(mode == AFE_CLK_INIT_MODE_TXRX2X))
write_phy_reg(pi, 0x6d0, 0x7);
if (!pi->hwpwrctrl_capable) {
if (CHSPEC_IS2G(pi->radio_chanspec)) {
tx_gains.gm_gain = 4;
tx_gains.pga_gain = 12;
tx_gains.pad_gain = 12;
tx_gains.dac_gain = 0;
wlc_lcnphy_toggle_afe_pwdn(pi);
}
bbmult = 150;
} else {
tx_gains.gm_gain = 7;
tx_gains.pga_gain = 15;
tx_gains.pad_gain = 14;
tx_gains.dac_gain = 0;
static bool
wlc_lcnphy_rx_iq_est(struct brcms_phy *pi,
u16 num_samps,
u8 wait_time, struct lcnphy_iq_est *iq_est)
{
int wait_count = 0;
bool result = true;
u8 phybw40;
phybw40 = CHSPEC_IS40(pi->radio_chanspec);
bbmult = 150;
}
wlc_lcnphy_set_tx_gain(pi, &tx_gains);
wlc_lcnphy_set_bbmult(pi, bbmult);
wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE);
} else {
mod_phy_reg(pi, 0x6da, (0x1 << 5), (1) << 5);
wlc_lcnphy_idle_tssi_est(ppi);
mod_phy_reg(pi, 0x410, (0x1 << 3), (0) << 3);
wlc_lcnphy_clear_tx_power_offsets(pi);
mod_phy_reg(pi, 0x482, (0xffff << 0), (num_samps) << 0);
b0 = pi->txpa_2g[0];
b1 = pi->txpa_2g[1];
a1 = pi->txpa_2g[2];
maxtargetpwr = wlc_lcnphy_tssi2dbm(10, a1, b0, b1);
mintargetpwr = wlc_lcnphy_tssi2dbm(125, a1, b0, b1);
mod_phy_reg(pi, 0x481, (0xff << 0), ((u16) wait_time) << 0);
tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
tab.tbl_width = 32;
tab.tbl_ptr = &pwr;
tab.tbl_len = 1;
tab.tbl_offset = 0;
for (tssi = 0; tssi < 128; tssi++) {
pwr = wlc_lcnphy_tssi2dbm(tssi, a1, b0, b1);
mod_phy_reg(pi, 0x481, (0x1 << 8), (0) << 8);
pwr = (pwr < mintargetpwr) ? mintargetpwr : pwr;
wlc_lcnphy_write_table(pi, &tab);
tab.tbl_offset++;
}
mod_phy_reg(pi, 0x481, (0x1 << 9), (1) << 9);
mod_phy_reg(pi, 0x410, (0x1 << 7), (0) << 7);
while (read_phy_reg(pi, 0x481) & (0x1 << 9)) {
write_phy_reg(pi, 0x4a8, 10);
if (wait_count > (10 * 500)) {
result = false;
goto cleanup;
}
udelay(100);
wait_count++;
wlc_lcnphy_set_target_tx_pwr(pi, LCN_TARGET_PWR);
wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_HW);
}
if (!suspend)
wlapi_enable_mac(pi->sh->physhim);
}
iq_est->iq_prod = ((u32) read_phy_reg(pi, 0x483) << 16) |
(u32) read_phy_reg(pi, 0x484);
iq_est->i_pwr = ((u32) read_phy_reg(pi, 0x485) << 16) |
(u32) read_phy_reg(pi, 0x486);
iq_est->q_pwr = ((u32) read_phy_reg(pi, 0x487) << 16) |
(u32) read_phy_reg(pi, 0x488);
static u8 wlc_lcnphy_get_bbmult(struct brcms_phy *pi)
{
u16 m0m1;
struct phytbl_info tab;
cleanup:
mod_phy_reg(pi, 0x410, (0x1 << 3), (1) << 3);
tab.tbl_ptr = &m0m1;
tab.tbl_len = 1;
tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL;
tab.tbl_offset = 87;
tab.tbl_width = 16;
wlc_lcnphy_read_table(pi, &tab);
mod_phy_reg(pi, 0x6da, (0x1 << 5), (0) << 5);
return (u8) ((m0m1 & 0xff00) >> 8);
}
return result;
static void wlc_lcnphy_set_pa_gain(struct brcms_phy *pi, u16 gain)
{
mod_phy_reg(pi, 0x4fb,
LCNPHY_txgainctrlovrval1_pagain_ovr_val1_MASK,
gain << LCNPHY_txgainctrlovrval1_pagain_ovr_val1_SHIFT);
mod_phy_reg(pi, 0x4fd,
LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_MASK,
gain << LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_SHIFT);
}
static bool wlc_lcnphy_calc_rx_iq_comp(struct brcms_phy *pi, u16 num_samps)
void
wlc_lcnphy_get_radio_loft(struct brcms_phy *pi,
u8 *ei0, u8 *eq0, u8 *fi0, u8 *fq0)
{
#define LCNPHY_MIN_RXIQ_PWR 2
bool result;
u16 a0_new, b0_new;
struct lcnphy_iq_est iq_est = { 0, 0, 0 };
s32 a, b, temp;
s16 iq_nbits, qq_nbits, arsh, brsh;
s32 iq;
u32 ii, qq;
*ei0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG089));
*eq0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08A));
*fi0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08B));
*fq0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08C));
}
void wlc_lcnphy_set_tx_iqcc(struct brcms_phy *pi, u16 a, u16 b)
{
struct phytbl_info tab;
u16 iqcc[2];
iqcc[0] = a;
iqcc[1] = b;
tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL;
tab.tbl_width = 16;
tab.tbl_ptr = iqcc;
tab.tbl_len = 2;
tab.tbl_offset = 80;
wlc_lcnphy_write_table(pi, &tab);
}
void wlc_lcnphy_set_tx_locc(struct brcms_phy *pi, u16 didq)
{
struct phytbl_info tab;
tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL;
tab.tbl_width = 16;
tab.tbl_ptr = &didq;
tab.tbl_len = 1;
tab.tbl_offset = 85;
wlc_lcnphy_write_table(pi, &tab);
}
void wlc_lcnphy_set_tx_pwr_by_index(struct brcms_phy *pi, int index)
{
struct phytbl_info tab;
u16 a, b;
u8 bb_mult;
u32 bbmultiqcomp, txgain, locoeffs, rfpower;
struct lcnphy_txgains gains;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
a0_new = ((read_phy_reg(pi, 0x645) & (0x3ff << 0)) >> 0);
b0_new = ((read_phy_reg(pi, 0x646) & (0x3ff << 0)) >> 0);
mod_phy_reg(pi, 0x6d1, (0x1 << 2), (0) << 2);
pi_lcn->lcnphy_tx_power_idx_override = (s8) index;
pi_lcn->lcnphy_current_index = (u8) index;
mod_phy_reg(pi, 0x64b, (0x1 << 6), (1) << 6);
tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
tab.tbl_width = 32;
tab.tbl_len = 1;
wlc_lcnphy_set_rx_iq_comp(pi, 0, 0);
wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
result = wlc_lcnphy_rx_iq_est(pi, num_samps, 32, &iq_est);
if (!result)
goto cleanup;
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_IQ_OFFSET + index;
tab.tbl_ptr = &bbmultiqcomp;
wlc_lcnphy_read_table(pi, &tab);
iq = (s32) iq_est.iq_prod;
ii = iq_est.i_pwr;
qq = iq_est.q_pwr;
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_GAIN_OFFSET + index;
tab.tbl_width = 32;
tab.tbl_ptr = &txgain;
wlc_lcnphy_read_table(pi, &tab);
if ((ii + qq) < LCNPHY_MIN_RXIQ_PWR) {
result = false;
goto cleanup;
}
gains.gm_gain = (u16) (txgain & 0xff);
gains.pga_gain = (u16) (txgain >> 8) & 0xff;
gains.pad_gain = (u16) (txgain >> 16) & 0xff;
gains.dac_gain = (u16) (bbmultiqcomp >> 28) & 0x07;
wlc_lcnphy_set_tx_gain(pi, &gains);
wlc_lcnphy_set_pa_gain(pi, (u16) (txgain >> 24) & 0x7f);
iq_nbits = wlc_phy_nbits(iq);
qq_nbits = wlc_phy_nbits(qq);
bb_mult = (u8) ((bbmultiqcomp >> 20) & 0xff);
wlc_lcnphy_set_bbmult(pi, bb_mult);
arsh = 10 - (30 - iq_nbits);
if (arsh >= 0) {
a = (-(iq << (30 - iq_nbits)) + (ii >> (1 + arsh)));
temp = (s32) (ii >> arsh);
if (temp == 0)
return false;
} else {
a = (-(iq << (30 - iq_nbits)) + (ii << (-1 - arsh)));
temp = (s32) (ii << -arsh);
if (temp == 0)
return false;
}
a /= temp;
brsh = qq_nbits - 31 + 20;
if (brsh >= 0) {
b = (qq << (31 - qq_nbits));
temp = (s32) (ii >> brsh);
if (temp == 0)
return false;
} else {
b = (qq << (31 - qq_nbits));
temp = (s32) (ii << -brsh);
if (temp == 0)
return false;
}
b /= temp;
b -= a * a;
b = (s32) int_sqrt((unsigned long) b);
b -= (1 << 10);
a0_new = (u16) (a & 0x3ff);
b0_new = (u16) (b & 0x3ff);
cleanup:
wlc_lcnphy_enable_tx_gain_override(pi);
wlc_lcnphy_set_rx_iq_comp(pi, a0_new, b0_new);
if (!wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) {
mod_phy_reg(pi, 0x64b, (0x1 << 0), (1) << 0);
a = (u16) ((bbmultiqcomp >> 10) & 0x3ff);
b = (u16) (bbmultiqcomp & 0x3ff);
wlc_lcnphy_set_tx_iqcc(pi, a, b);
mod_phy_reg(pi, 0x64b, (0x1 << 3), (1) << 3);
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_LO_OFFSET + index;
tab.tbl_ptr = &locoeffs;
wlc_lcnphy_read_table(pi, &tab);
pi_lcn->lcnphy_cal_results.rxiqcal_coeff_a0 = a0_new;
pi_lcn->lcnphy_cal_results.rxiqcal_coeff_b0 = b0_new;
wlc_lcnphy_set_tx_locc(pi, (u16) locoeffs);
return result;
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_PWR_OFFSET + index;
tab.tbl_ptr = &rfpower;
wlc_lcnphy_read_table(pi, &tab);
mod_phy_reg(pi, 0x6a6, (0x1fff << 0), (rfpower * 8) << 0);
}
}
static bool
wlc_lcnphy_rx_iq_cal(struct brcms_phy *pi,
const struct lcnphy_rx_iqcomp *iqcomp,
int iqcomp_sz, bool tx_switch, bool rx_switch, int module,
int tx_gain_idx)
static void wlc_lcnphy_clear_papd_comptable(struct brcms_phy *pi)
{
struct lcnphy_txgains old_gains;
u16 tx_pwr_ctrl;
u8 tx_gain_index_old = 0;
bool result = false, tx_gain_override_old = false;
u16 i, Core1TxControl_old, RFOverride0_old,
RFOverrideVal0_old, rfoverride2_old, rfoverride2val_old,
rfoverride3_old, rfoverride3val_old, rfoverride4_old,
rfoverride4val_old, afectrlovr_old, afectrlovrval_old;
int tia_gain;
u32 received_power, rx_pwr_threshold;
u16 old_sslpnCalibClkEnCtrl, old_sslpnRxFeClkEnCtrl;
u16 values_to_save[11];
s16 *ptr;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
u32 j;
struct phytbl_info tab;
u32 temp_offset[128];
tab.tbl_ptr = temp_offset;
tab.tbl_len = 128;
tab.tbl_id = LCNPHY_TBL_ID_PAPDCOMPDELTATBL;
tab.tbl_width = 32;
tab.tbl_offset = 0;
ptr = kmalloc(sizeof(s16) * 131, GFP_ATOMIC);
if (NULL == ptr)
return false;
if (module == 2) {
while (iqcomp_sz--) {
if (iqcomp[iqcomp_sz].chan ==
CHSPEC_CHANNEL(pi->radio_chanspec)) {
wlc_lcnphy_set_rx_iq_comp(pi,
(u16)
iqcomp[iqcomp_sz].a,
(u16)
iqcomp[iqcomp_sz].b);
result = true;
break;
}
}
goto cal_done;
}
memset(temp_offset, 0, sizeof(temp_offset));
for (j = 1; j < 128; j += 2)
temp_offset[j] = 0x80000;
if (module == 1) {
wlc_lcnphy_write_table(pi, &tab);
return;
}
tx_pwr_ctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
void wlc_lcnphy_tx_pu(struct brcms_phy *pi, bool bEnable)
{
if (!bEnable) {
for (i = 0; i < 11; i++)
values_to_save[i] =
read_radio_reg(pi, rxiq_cal_rf_reg[i]);
Core1TxControl_old = read_phy_reg(pi, 0x631);
and_phy_reg(pi, 0x43b, ~(u16) ((0x1 << 1) | (0x1 << 4)));
or_phy_reg(pi, 0x631, 0x0015);
mod_phy_reg(pi, 0x43c, (0x1 << 1), 1 << 1);
RFOverride0_old = read_phy_reg(pi, 0x44c);
RFOverrideVal0_old = read_phy_reg(pi, 0x44d);
rfoverride2_old = read_phy_reg(pi, 0x4b0);
rfoverride2val_old = read_phy_reg(pi, 0x4b1);
rfoverride3_old = read_phy_reg(pi, 0x4f9);
rfoverride3val_old = read_phy_reg(pi, 0x4fa);
rfoverride4_old = read_phy_reg(pi, 0x938);
rfoverride4val_old = read_phy_reg(pi, 0x939);
afectrlovr_old = read_phy_reg(pi, 0x43b);
afectrlovrval_old = read_phy_reg(pi, 0x43c);
old_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da);
old_sslpnRxFeClkEnCtrl = read_phy_reg(pi, 0x6db);
and_phy_reg(pi, 0x44c,
~(u16) ((0x1 << 3) |
(0x1 << 5) |
(0x1 << 12) |
(0x1 << 0) | (0x1 << 1) | (0x1 << 2)));
tx_gain_override_old = wlc_lcnphy_tx_gain_override_enabled(pi);
if (tx_gain_override_old) {
wlc_lcnphy_get_tx_gain(pi, &old_gains);
tx_gain_index_old = pi_lcn->lcnphy_current_index;
}
and_phy_reg(pi, 0x44d,
~(u16) ((0x1 << 3) | (0x1 << 5) | (0x1 << 14)));
mod_phy_reg(pi, 0x44d, (0x1 << 2), 1 << 2);
wlc_lcnphy_set_tx_pwr_by_index(pi, tx_gain_idx);
mod_phy_reg(pi, 0x44d, (0x1 << 1) | (0x1 << 0), (0x1 << 0));
mod_phy_reg(pi, 0x4f9, (0x1 << 0), 1 << 0);
mod_phy_reg(pi, 0x4fa, (0x1 << 0), 0 << 0);
and_phy_reg(pi, 0x4f9,
~(u16) ((0x1 << 0) | (0x1 << 1) | (0x1 << 2)));
and_phy_reg(pi, 0x4fa,
~(u16) ((0x1 << 0) | (0x1 << 1) | (0x1 << 2)));
} else {
mod_phy_reg(pi, 0x43b, (0x1 << 1), 1 << 1);
mod_phy_reg(pi, 0x43c, (0x1 << 1), 0 << 1);
write_radio_reg(pi, RADIO_2064_REG116, 0x06);
write_radio_reg(pi, RADIO_2064_REG12C, 0x07);
write_radio_reg(pi, RADIO_2064_REG06A, 0xd3);
write_radio_reg(pi, RADIO_2064_REG098, 0x03);
write_radio_reg(pi, RADIO_2064_REG00B, 0x7);
mod_radio_reg(pi, RADIO_2064_REG113, 1 << 4, 1 << 4);
write_radio_reg(pi, RADIO_2064_REG01D, 0x01);
write_radio_reg(pi, RADIO_2064_REG114, 0x01);
write_radio_reg(pi, RADIO_2064_REG02E, 0x10);
write_radio_reg(pi, RADIO_2064_REG12A, 0x08);
mod_phy_reg(pi, 0x43b, (0x1 << 4), 1 << 4);
mod_phy_reg(pi, 0x43c, (0x1 << 6), 0 << 6);
mod_phy_reg(pi, 0x938, (0x1 << 0), 1 << 0);
mod_phy_reg(pi, 0x939, (0x1 << 0), 0 << 0);
mod_phy_reg(pi, 0x938, (0x1 << 1), 1 << 1);
mod_phy_reg(pi, 0x939, (0x1 << 1), 1 << 1);
mod_phy_reg(pi, 0x938, (0x1 << 2), 1 << 2);
mod_phy_reg(pi, 0x939, (0x1 << 2), 1 << 2);
mod_phy_reg(pi, 0x938, (0x1 << 3), 1 << 3);
mod_phy_reg(pi, 0x939, (0x1 << 3), 1 << 3);
mod_phy_reg(pi, 0x938, (0x1 << 5), 1 << 5);
mod_phy_reg(pi, 0x939, (0x1 << 5), 0 << 5);
mod_phy_reg(pi, 0x44c, (0x1 << 12), 1 << 12);
mod_phy_reg(pi, 0x44d, (0x1 << 14), 1 << 14);
mod_phy_reg(pi, 0x43b, (0x1 << 0), 1 << 0);
mod_phy_reg(pi, 0x43c, (0x1 << 0), 0 << 0);
wlc_lcnphy_set_trsw_override(pi, true, false);
wlc_lcnphy_start_tx_tone(pi, 2000, 120, 0);
write_phy_reg(pi, 0x6da, 0xffff);
or_phy_reg(pi, 0x6db, 0x3);
wlc_lcnphy_set_trsw_override(pi, tx_switch, rx_switch);
wlc_lcnphy_rx_gain_override_enable(pi, true);
mod_phy_reg(pi, 0x44d, (0x1 << 2), 0 << 2);
mod_phy_reg(pi, 0x44c, (0x1 << 2), 1 << 2);
tia_gain = 8;
rx_pwr_threshold = 950;
while (tia_gain > 0) {
tia_gain -= 1;
wlc_lcnphy_set_rx_gain_by_distribution(pi,
0, 0, 2, 2,
(u16)
tia_gain, 1, 0);
udelay(500);
if (CHSPEC_IS2G(pi->radio_chanspec)) {
received_power =
wlc_lcnphy_measure_digital_power(pi, 2000);
if (received_power < rx_pwr_threshold)
break;
}
result = wlc_lcnphy_calc_rx_iq_comp(pi, 0xffff);
mod_phy_reg(pi, 0x44c, (0x1 << 3), 1 << 3);
mod_phy_reg(pi, 0x44d, (0x1 << 3), 1 << 3);
wlc_lcnphy_stop_tx_tone(pi);
mod_phy_reg(pi, 0x44c, (0x1 << 5), 1 << 5);
mod_phy_reg(pi, 0x44d, (0x1 << 5), 0 << 5);
write_phy_reg(pi, 0x631, Core1TxControl_old);
mod_phy_reg(pi, 0x4f9, (0x1 << 1), 1 << 1);
mod_phy_reg(pi, 0x4fa, (0x1 << 1), 1 << 1);
write_phy_reg(pi, 0x44c, RFOverrideVal0_old);
write_phy_reg(pi, 0x44d, RFOverrideVal0_old);
write_phy_reg(pi, 0x4b0, rfoverride2_old);
write_phy_reg(pi, 0x4b1, rfoverride2val_old);
write_phy_reg(pi, 0x4f9, rfoverride3_old);
write_phy_reg(pi, 0x4fa, rfoverride3val_old);
write_phy_reg(pi, 0x938, rfoverride4_old);
write_phy_reg(pi, 0x939, rfoverride4val_old);
write_phy_reg(pi, 0x43b, afectrlovr_old);
write_phy_reg(pi, 0x43c, afectrlovrval_old);
write_phy_reg(pi, 0x6da, old_sslpnCalibClkEnCtrl);
write_phy_reg(pi, 0x6db, old_sslpnRxFeClkEnCtrl);
mod_phy_reg(pi, 0x4f9, (0x1 << 2), 1 << 2);
mod_phy_reg(pi, 0x4fa, (0x1 << 2), 1 << 2);
wlc_lcnphy_clear_trsw_override(pi);
mod_phy_reg(pi, 0x4f9, (0x1 << 0), 1 << 0);
mod_phy_reg(pi, 0x4fa, (0x1 << 0), 1 << 0);
} else {
mod_phy_reg(pi, 0x44c, (0x1 << 2), 0 << 2);
mod_phy_reg(pi, 0x44c, (0x1 << 3), 1 << 3);
mod_phy_reg(pi, 0x44d, (0x1 << 3), 0 << 3);
for (i = 0; i < 11; i++)
write_radio_reg(pi, rxiq_cal_rf_reg[i],
values_to_save[i]);
mod_phy_reg(pi, 0x44c, (0x1 << 5), 1 << 5);
mod_phy_reg(pi, 0x44d, (0x1 << 5), 1 << 5);
if (tx_gain_override_old)
wlc_lcnphy_set_tx_pwr_by_index(pi, tx_gain_index_old);
else
wlc_lcnphy_disable_tx_gain_override(pi);
mod_phy_reg(pi, 0x4f9, (0x1 << 1), 1 << 1);
mod_phy_reg(pi, 0x4fa, (0x1 << 1), 0 << 1);
wlc_lcnphy_set_tx_pwr_ctrl(pi, tx_pwr_ctrl);
wlc_lcnphy_rx_gain_override_enable(pi, false);
}
mod_phy_reg(pi, 0x4f9, (0x1 << 2), 1 << 2);
mod_phy_reg(pi, 0x4fa, (0x1 << 2), 0 << 2);
cal_done:
kfree(ptr);
return result;
mod_phy_reg(pi, 0x4f9, (0x1 << 0), 1 << 0);
mod_phy_reg(pi, 0x4fa, (0x1 << 0), 0 << 0);
}
}
}
static void wlc_lcnphy_temp_adj(struct brcms_phy *pi)
static void
wlc_lcnphy_run_samples(struct brcms_phy *pi,
u16 num_samps,
u16 num_loops, u16 wait, bool iqcalmode)
{
or_phy_reg(pi, 0x6da, 0x8080);
mod_phy_reg(pi, 0x642, (0x7f << 0), (num_samps - 1) << 0);
if (num_loops != 0xffff)
num_loops--;
mod_phy_reg(pi, 0x640, (0xffff << 0), num_loops << 0);
mod_phy_reg(pi, 0x641, (0xffff << 0), wait << 0);
if (iqcalmode) {
and_phy_reg(pi, 0x453, (u16) ~(0x1 << 15));
or_phy_reg(pi, 0x453, (0x1 << 15));
} else {
write_phy_reg(pi, 0x63f, 1);
wlc_lcnphy_tx_pu(pi, 1);
}
or_radio_reg(pi, RADIO_2064_REG112, 0x6);
}
static void wlc_lcnphy_glacial_timer_based_cal(struct brcms_phy *pi)
void wlc_lcnphy_deaf_mode(struct brcms_phy *pi, bool mode)
{
bool suspend;
s8 index;
u16 SAVE_pwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
suspend =
(0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim);
wlc_lcnphy_deaf_mode(pi, true);
pi->phy_lastcal = pi->sh->now;
pi->phy_forcecal = false;
index = pi_lcn->lcnphy_current_index;
wlc_lcnphy_txpwrtbl_iqlo_cal(pi);
u8 phybw40;
phybw40 = CHSPEC_IS40(pi->radio_chanspec);
wlc_lcnphy_set_tx_pwr_by_index(pi, index);
wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_pwrctrl);
wlc_lcnphy_deaf_mode(pi, false);
if (!suspend)
wlapi_enable_mac(pi->sh->physhim);
if (LCNREV_LT(pi->pubpi.phy_rev, 2)) {
mod_phy_reg(pi, 0x4b0, (0x1 << 5), (mode) << 5);
mod_phy_reg(pi, 0x4b1, (0x1 << 9), 0 << 9);
} else {
mod_phy_reg(pi, 0x4b0, (0x1 << 5), (mode) << 5);
mod_phy_reg(pi, 0x4b1, (0x1 << 9), 0 << 9);
}
if (phybw40 == 0) {
mod_phy_reg((pi), 0x410,
(0x1 << 6) |
(0x1 << 5),
((CHSPEC_IS2G(
pi->radio_chanspec)) ? (!mode) : 0) <<
6 | (!mode) << 5);
mod_phy_reg(pi, 0x410, (0x1 << 7), (mode) << 7);
}
}
static void wlc_lcnphy_periodic_cal(struct brcms_phy *pi)
void
wlc_lcnphy_start_tx_tone(struct brcms_phy *pi, s32 f_kHz, u16 max_val,
bool iqcalmode)
{
bool suspend, full_cal;
const struct lcnphy_rx_iqcomp *rx_iqcomp;
int rx_iqcomp_sz;
u16 SAVE_pwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
s8 index;
u8 phy_bw;
u16 num_samps, t, k;
u32 bw;
s32 theta = 0, rot = 0;
struct cordic_iq tone_samp;
u32 data_buf[64];
u16 i_samp, q_samp;
struct phytbl_info tab;
s32 a1, b0, b1;
s32 tssi, pwr, maxtargetpwr, mintargetpwr;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
pi->phy_lastcal = pi->sh->now;
pi->phy_forcecal = false;
full_cal =
(pi_lcn->lcnphy_full_cal_channel !=
CHSPEC_CHANNEL(pi->radio_chanspec));
pi_lcn->lcnphy_full_cal_channel = CHSPEC_CHANNEL(pi->radio_chanspec);
index = pi_lcn->lcnphy_current_index;
suspend =
(0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
if (!suspend) {
wlapi_bmac_write_shm(pi->sh->physhim, M_CTS_DURATION, 10000);
wlapi_suspend_mac_and_wait(pi->sh->physhim);
}
pi->phy_tx_tone_freq = f_kHz;
wlc_lcnphy_deaf_mode(pi, true);
wlc_lcnphy_txpwrtbl_iqlo_cal(pi);
phy_bw = 40;
if (pi_lcn->lcnphy_spurmod) {
write_phy_reg(pi, 0x942, 0x2);
write_phy_reg(pi, 0x93b, 0x0);
write_phy_reg(pi, 0x93c, 0x0);
wlc_lcnphy_txrx_spur_avoidance_mode(pi, false);
}
rx_iqcomp = lcnphy_rx_iqcomp_table_rev0;
rx_iqcomp_sz = ARRAY_SIZE(lcnphy_rx_iqcomp_table_rev0);
if (f_kHz) {
k = 1;
do {
bw = phy_bw * 1000 * k;
num_samps = bw / ABS(f_kHz);
k++;
} while ((num_samps * (u32) (ABS(f_kHz))) != bw);
} else
num_samps = 2;
if (LCNREV_IS(pi->pubpi.phy_rev, 1))
wlc_lcnphy_rx_iq_cal(pi, NULL, 0, true, false, 1, 40);
else
wlc_lcnphy_rx_iq_cal(pi, NULL, 0, true, false, 1, 127);
rot = ((f_kHz * 36) / phy_bw) / 100;
theta = 0;
if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) {
for (t = 0; t < num_samps; t++) {
wlc_lcnphy_idle_tssi_est((struct brcms_phy_pub *) pi);
tone_samp = cordic_calc_iq(theta);
b0 = pi->txpa_2g[0];
b1 = pi->txpa_2g[1];
a1 = pi->txpa_2g[2];
maxtargetpwr = wlc_lcnphy_tssi2dbm(10, a1, b0, b1);
mintargetpwr = wlc_lcnphy_tssi2dbm(125, a1, b0, b1);
theta += rot;
tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
tab.tbl_width = 32;
tab.tbl_ptr = &pwr;
tab.tbl_len = 1;
tab.tbl_offset = 0;
for (tssi = 0; tssi < 128; tssi++) {
pwr = wlc_lcnphy_tssi2dbm(tssi, a1, b0, b1);
pwr = (pwr < mintargetpwr) ? mintargetpwr : pwr;
wlc_lcnphy_write_table(pi, &tab);
tab.tbl_offset++;
}
i_samp = (u16) (FLOAT(tone_samp.i * max_val) & 0x3ff);
q_samp = (u16) (FLOAT(tone_samp.q * max_val) & 0x3ff);
data_buf[t] = (i_samp << 10) | q_samp;
}
wlc_lcnphy_set_tx_pwr_by_index(pi, index);
wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_pwrctrl);
wlc_lcnphy_deaf_mode(pi, false);
if (!suspend)
wlapi_enable_mac(pi->sh->physhim);
mod_phy_reg(pi, 0x6d6, (0x3 << 0), 0 << 0);
mod_phy_reg(pi, 0x6da, (0x1 << 3), 1 << 3);
tab.tbl_ptr = data_buf;
tab.tbl_len = num_samps;
tab.tbl_id = LCNPHY_TBL_ID_SAMPLEPLAY;
tab.tbl_offset = 0;
tab.tbl_width = 32;
wlc_lcnphy_write_table(pi, &tab);
wlc_lcnphy_run_samples(pi, num_samps, 0xffff, 0, iqcalmode);
}
void wlc_lcnphy_calib_modes(struct brcms_phy *pi, uint mode)
void wlc_lcnphy_stop_tx_tone(struct brcms_phy *pi)
{
u16 temp_new;
int temp1, temp2, temp_diff;
s16 playback_status;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
switch (mode) {
case PHY_PERICAL_CHAN:
break;
case PHY_FULLCAL:
wlc_lcnphy_periodic_cal(pi);
pi->phy_tx_tone_freq = 0;
if (pi_lcn->lcnphy_spurmod) {
write_phy_reg(pi, 0x942, 0x7);
write_phy_reg(pi, 0x93b, 0x2017);
write_phy_reg(pi, 0x93c, 0x27c5);
wlc_lcnphy_txrx_spur_avoidance_mode(pi, true);
}
playback_status = read_phy_reg(pi, 0x644);
if (playback_status & (0x1 << 0)) {
wlc_lcnphy_tx_pu(pi, 0);
mod_phy_reg(pi, 0x63f, (0x1 << 1), 1 << 1);
} else if (playback_status & (0x1 << 1))
mod_phy_reg(pi, 0x453, (0x1 << 15), 0 << 15);
mod_phy_reg(pi, 0x6d6, (0x3 << 0), 1 << 0);
mod_phy_reg(pi, 0x6da, (0x1 << 3), 0 << 3);
mod_phy_reg(pi, 0x6da, (0x1 << 7), 0 << 7);
and_radio_reg(pi, RADIO_2064_REG112, 0xFFF9);
wlc_lcnphy_deaf_mode(pi, false);
}
static void
wlc_lcnphy_set_cc(struct brcms_phy *pi, int cal_type, s16 coeff_x, s16 coeff_y)
{
u16 di0dq0;
u16 x, y, data_rf;
int k;
switch (cal_type) {
case 0:
wlc_lcnphy_set_tx_iqcc(pi, coeff_x, coeff_y);
break;
case PHY_PERICAL_PHYINIT:
wlc_lcnphy_periodic_cal(pi);
case 2:
di0dq0 = (coeff_x & 0xff) << 8 | (coeff_y & 0xff);
wlc_lcnphy_set_tx_locc(pi, di0dq0);
break;
case PHY_PERICAL_WATCHDOG:
if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) {
temp_new = wlc_lcnphy_tempsense(pi, 0);
temp1 = LCNPHY_TEMPSENSE(temp_new);
temp2 = LCNPHY_TEMPSENSE(pi_lcn->lcnphy_cal_temper);
temp_diff = temp1 - temp2;
if ((pi_lcn->lcnphy_cal_counter > 90) ||
(temp_diff > 60) || (temp_diff < -60)) {
wlc_lcnphy_glacial_timer_based_cal(pi);
wlc_2064_vco_cal(pi);
pi_lcn->lcnphy_cal_temper = temp_new;
pi_lcn->lcnphy_cal_counter = 0;
} else
pi_lcn->lcnphy_cal_counter++;
}
case 3:
k = wlc_lcnphy_calc_floor(coeff_x, 0);
y = 8 + k;
k = wlc_lcnphy_calc_floor(coeff_x, 1);
x = 8 - k;
data_rf = (x * 16 + y);
write_radio_reg(pi, RADIO_2064_REG089, data_rf);
k = wlc_lcnphy_calc_floor(coeff_y, 0);
y = 8 + k;
k = wlc_lcnphy_calc_floor(coeff_y, 1);
x = 8 - k;
data_rf = (x * 16 + y);
write_radio_reg(pi, RADIO_2064_REG08A, data_rf);
break;
case LCNPHY_PERICAL_TEMPBASED_TXPWRCTRL:
if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))
wlc_lcnphy_tx_power_adjustment(
(struct brcms_phy_pub *) pi);
case 4:
k = wlc_lcnphy_calc_floor(coeff_x, 0);
y = 8 + k;
k = wlc_lcnphy_calc_floor(coeff_x, 1);
x = 8 - k;
data_rf = (x * 16 + y);
write_radio_reg(pi, RADIO_2064_REG08B, data_rf);
k = wlc_lcnphy_calc_floor(coeff_y, 0);
y = 8 + k;
k = wlc_lcnphy_calc_floor(coeff_y, 1);
x = 8 - k;
data_rf = (x * 16 + y);
write_radio_reg(pi, RADIO_2064_REG08C, data_rf);
break;
}
}
void wlc_lcnphy_get_tssi(struct brcms_phy *pi, s8 *ofdm_pwr, s8 *cck_pwr)
static struct lcnphy_unsign16_struct
wlc_lcnphy_get_cc(struct brcms_phy *pi, int cal_type)
{
s8 cck_offset;
u16 status;
status = (read_phy_reg(pi, 0x4ab));
if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi) &&
(status & (0x1 << 15))) {
*ofdm_pwr = (s8) (((read_phy_reg(pi, 0x4ab) & (0x1ff << 0))
>> 0) >> 1);
if (wlc_phy_tpc_isenabled_lcnphy(pi))
cck_offset = pi->tx_power_offset[TXP_FIRST_CCK];
else
cck_offset = 0;
*cck_pwr = *ofdm_pwr + cck_offset;
} else {
*cck_pwr = 0;
*ofdm_pwr = 0;
u16 a, b, didq;
u8 di0, dq0, ei, eq, fi, fq;
struct lcnphy_unsign16_struct cc;
cc.re = 0;
cc.im = 0;
switch (cal_type) {
case 0:
wlc_lcnphy_get_tx_iqcc(pi, &a, &b);
cc.re = a;
cc.im = b;
break;
case 2:
didq = wlc_lcnphy_get_tx_locc(pi);
di0 = (((didq & 0xff00) << 16) >> 24);
dq0 = (((didq & 0x00ff) << 24) >> 24);
cc.re = (u16) di0;
cc.im = (u16) dq0;
break;
case 3:
wlc_lcnphy_get_radio_loft(pi, &ei, &eq, &fi, &fq);
cc.re = (u16) ei;
cc.im = (u16) eq;
break;
case 4:
wlc_lcnphy_get_radio_loft(pi, &ei, &eq, &fi, &fq);
cc.re = (u16) fi;
cc.im = (u16) fq;
break;
}
}
void wlc_phy_cal_init_lcnphy(struct brcms_phy *pi)
{
return;
return cc;
}
static void
wlc_lcnphy_set_chanspec_tweaks(struct brcms_phy *pi, u16 chanspec)
wlc_lcnphy_samp_cap(struct brcms_phy *pi, int clip_detect_algo, u16 thresh,
s16 *ptr, int mode)
{
u8 channel = CHSPEC_CHANNEL(chanspec);
u32 curval1, curval2, stpptr, curptr, strptr, val;
u16 sslpnCalibClkEnCtrl, timer;
u16 old_sslpnCalibClkEnCtrl;
s16 imag, real;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
if (channel == 14)
mod_phy_reg(pi, 0x448, (0x3 << 8), (2) << 8);
else
mod_phy_reg(pi, 0x448, (0x3 << 8), (1) << 8);
timer = 0;
old_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da);
pi_lcn->lcnphy_bandedge_corr = 2;
if (channel == 1)
pi_lcn->lcnphy_bandedge_corr = 4;
curval1 = R_REG(&pi->regs->psm_corectlsts);
ptr[130] = 0;
W_REG(&pi->regs->psm_corectlsts, ((1 << 6) | curval1));
if (channel == 1 || channel == 2 || channel == 3 ||
channel == 4 || channel == 9 ||
channel == 10 || channel == 11 || channel == 12) {
si_pmu_pllcontrol(pi->sh->sih, 0x2, 0xffffffff, 0x03000c04);
si_pmu_pllcontrol(pi->sh->sih, 0x3, 0xffffff, 0x0);
si_pmu_pllcontrol(pi->sh->sih, 0x4, 0xffffffff, 0x200005c0);
W_REG(&pi->regs->smpl_clct_strptr, 0x7E00);
W_REG(&pi->regs->smpl_clct_stpptr, 0x8000);
udelay(20);
curval2 = R_REG(&pi->regs->psm_phy_hdr_param);
W_REG(&pi->regs->psm_phy_hdr_param, curval2 | 0x30);
si_pmu_pllupd(pi->sh->sih);
write_phy_reg(pi, 0x942, 0);
wlc_lcnphy_txrx_spur_avoidance_mode(pi, false);
pi_lcn->lcnphy_spurmod = 0;
mod_phy_reg(pi, 0x424, (0xff << 8), (0x1b) << 8);
write_phy_reg(pi, 0x555, 0x0);
write_phy_reg(pi, 0x5a6, 0x5);
write_phy_reg(pi, 0x425, 0x5907);
} else {
si_pmu_pllcontrol(pi->sh->sih, 0x2, 0xffffffff, 0x03140c04);
si_pmu_pllcontrol(pi->sh->sih, 0x3, 0xffffff, 0x333333);
si_pmu_pllcontrol(pi->sh->sih, 0x4, 0xffffffff, 0x202c2820);
write_phy_reg(pi, 0x5a2, (u16) (mode | mode << 6));
write_phy_reg(pi, 0x5cf, 3);
write_phy_reg(pi, 0x5a5, 0x3);
write_phy_reg(pi, 0x583, 0x0);
write_phy_reg(pi, 0x584, 0x0);
write_phy_reg(pi, 0x585, 0x0fff);
write_phy_reg(pi, 0x586, 0x0000);
si_pmu_pllupd(pi->sh->sih);
write_phy_reg(pi, 0x942, 0);
wlc_lcnphy_txrx_spur_avoidance_mode(pi, true);
write_phy_reg(pi, 0x580, 0x4501);
pi_lcn->lcnphy_spurmod = 0;
mod_phy_reg(pi, 0x424, (0xff << 8), (0x1f) << 8);
sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da);
write_phy_reg(pi, 0x6da, (u32) (sslpnCalibClkEnCtrl | 0x2008));
stpptr = R_REG(&pi->regs->smpl_clct_stpptr);
curptr = R_REG(&pi->regs->smpl_clct_curptr);
do {
udelay(10);
curptr = R_REG(&pi->regs->smpl_clct_curptr);
timer++;
} while ((curptr != stpptr) && (timer < 500));
write_phy_reg(pi, 0x425, 0x590a);
}
W_REG(&pi->regs->psm_phy_hdr_param, 0x2);
strptr = 0x7E00;
W_REG(&pi->regs->tplatewrptr, strptr);
while (strptr < 0x8000) {
val = R_REG(&pi->regs->tplatewrdata);
imag = ((val >> 16) & 0x3ff);
real = ((val) & 0x3ff);
if (imag > 511)
imag -= 1024;
or_phy_reg(pi, 0x44a, 0x44);
write_phy_reg(pi, 0x44a, 0x80);
}
if (real > 511)
real -= 1024;
void wlc_lcnphy_tx_power_adjustment(struct brcms_phy_pub *ppi)
{
s8 index;
u16 index2;
struct brcms_phy *pi = (struct brcms_phy *) ppi;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) &&
SAVE_txpwrctrl) {
index = wlc_lcnphy_tempcompensated_txpwrctrl(pi);
index2 = (u16) (index * 2);
mod_phy_reg(pi, 0x4a9, (0x1ff << 0), (index2) << 0);
if (pi_lcn->lcnphy_iqcal_swp_dis)
ptr[(strptr - 0x7E00) / 4] = real;
else
ptr[(strptr - 0x7E00) / 4] = imag;
pi_lcn->lcnphy_current_index =
(s8)((read_phy_reg(pi, 0x4a9) & 0xFF) / 2);
if (clip_detect_algo) {
if (imag > thresh || imag < -thresh) {
strptr = 0x8000;
ptr[130] = 1;
}
}
strptr += 4;
}
write_phy_reg(pi, 0x6da, old_sslpnCalibClkEnCtrl);
W_REG(&pi->regs->psm_phy_hdr_param, curval2);
W_REG(&pi->regs->psm_corectlsts, curval1);
}
static void wlc_lcnphy_set_rx_iq_comp(struct brcms_phy *pi, u16 a, u16 b)
static void
wlc_lcnphy_a1(struct brcms_phy *pi, int cal_type, int num_levels,
int step_size_lg2)
{
mod_phy_reg(pi, 0x645, (0x3ff << 0), (a) << 0);
const struct lcnphy_spb_tone *phy_c1;
struct lcnphy_spb_tone phy_c2;
struct lcnphy_unsign16_struct phy_c3;
int phy_c4, phy_c5, k, l, j, phy_c6;
u16 phy_c7, phy_c8, phy_c9;
s16 phy_c10, phy_c11, phy_c12, phy_c13, phy_c14, phy_c15, phy_c16;
s16 *ptr, phy_c17;
s32 phy_c18, phy_c19;
u32 phy_c20, phy_c21;
bool phy_c22, phy_c23, phy_c24, phy_c25;
u16 phy_c26, phy_c27;
u16 phy_c28, phy_c29, phy_c30;
u16 phy_c31;
u16 *phy_c32;
phy_c21 = 0;
phy_c10 = phy_c13 = phy_c14 = phy_c8 = 0;
ptr = kmalloc(sizeof(s16) * 131, GFP_ATOMIC);
if (NULL == ptr)
return;
mod_phy_reg(pi, 0x646, (0x3ff << 0), (b) << 0);
phy_c32 = kmalloc(sizeof(u16) * 20, GFP_ATOMIC);
if (NULL == phy_c32) {
kfree(ptr);
return;
}
phy_c26 = read_phy_reg(pi, 0x6da);
phy_c27 = read_phy_reg(pi, 0x6db);
phy_c31 = read_radio_reg(pi, RADIO_2064_REG026);
write_phy_reg(pi, 0x93d, 0xC0);
mod_phy_reg(pi, 0x647, (0x3ff << 0), (a) << 0);
wlc_lcnphy_start_tx_tone(pi, 3750, 88, 0);
write_phy_reg(pi, 0x6da, 0xffff);
or_phy_reg(pi, 0x6db, 0x3);
mod_phy_reg(pi, 0x648, (0x3ff << 0), (b) << 0);
wlc_lcnphy_tx_iqlo_loopback(pi, phy_c32);
udelay(500);
phy_c28 = read_phy_reg(pi, 0x938);
phy_c29 = read_phy_reg(pi, 0x4d7);
phy_c30 = read_phy_reg(pi, 0x4d8);
or_phy_reg(pi, 0x938, 0x1 << 2);
or_phy_reg(pi, 0x4d7, 0x1 << 2);
or_phy_reg(pi, 0x4d7, 0x1 << 3);
mod_phy_reg(pi, 0x4d7, (0x7 << 12), 0x2 << 12);
or_phy_reg(pi, 0x4d8, 1 << 0);
or_phy_reg(pi, 0x4d8, 1 << 1);
mod_phy_reg(pi, 0x4d8, (0x3ff << 2), 0x23A << 2);
mod_phy_reg(pi, 0x4d8, (0x7 << 12), 0x7 << 12);
phy_c1 = &lcnphy_spb_tone_3750[0];
phy_c4 = 32;
mod_phy_reg(pi, 0x649, (0x3ff << 0), (a) << 0);
if (num_levels == 0) {
if (cal_type != 0)
num_levels = 4;
else
num_levels = 9;
}
if (step_size_lg2 == 0) {
if (cal_type != 0)
step_size_lg2 = 3;
else
step_size_lg2 = 8;
}
mod_phy_reg(pi, 0x64a, (0x3ff << 0), (b) << 0);
phy_c7 = (1 << step_size_lg2);
phy_c3 = wlc_lcnphy_get_cc(pi, cal_type);
phy_c15 = (s16) phy_c3.re;
phy_c16 = (s16) phy_c3.im;
if (cal_type == 2) {
if (phy_c3.re > 127)
phy_c15 = phy_c3.re - 256;
if (phy_c3.im > 127)
phy_c16 = phy_c3.im - 256;
}
wlc_lcnphy_set_cc(pi, cal_type, phy_c15, phy_c16);
udelay(20);
for (phy_c8 = 0; phy_c7 != 0 && phy_c8 < num_levels; phy_c8++) {
phy_c23 = 1;
phy_c22 = 0;
switch (cal_type) {
case 0:
phy_c10 = 511;
break;
case 2:
phy_c10 = 127;
break;
case 3:
phy_c10 = 15;
break;
case 4:
phy_c10 = 15;
break;
}
}
phy_c9 = read_phy_reg(pi, 0x93d);
phy_c9 = 2 * phy_c9;
phy_c24 = 0;
phy_c5 = 7;
phy_c25 = 1;
while (1) {
write_radio_reg(pi, RADIO_2064_REG026,
(phy_c5 & 0x7) | ((phy_c5 & 0x7) << 4));
udelay(50);
phy_c22 = 0;
ptr[130] = 0;
wlc_lcnphy_samp_cap(pi, 1, phy_c9, &ptr[0], 2);
if (ptr[130] == 1)
phy_c22 = 1;
if (phy_c22)
phy_c5 -= 1;
if ((phy_c22 != phy_c24) && (!phy_c25))
break;
if (!phy_c22)
phy_c5 += 1;
if (phy_c5 <= 0 || phy_c5 >= 7)
break;
phy_c24 = phy_c22;
phy_c25 = 0;
}
void wlc_phy_init_lcnphy(struct brcms_phy *pi)
{
u8 phybw40;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
phybw40 = CHSPEC_IS40(pi->radio_chanspec);
if (phy_c5 < 0)
phy_c5 = 0;
else if (phy_c5 > 7)
phy_c5 = 7;
pi_lcn->lcnphy_cal_counter = 0;
pi_lcn->lcnphy_cal_temper = pi_lcn->lcnphy_rawtempsense;
for (k = -phy_c7; k <= phy_c7; k += phy_c7) {
for (l = -phy_c7; l <= phy_c7; l += phy_c7) {
phy_c11 = phy_c15 + k;
phy_c12 = phy_c16 + l;
or_phy_reg(pi, 0x44a, 0x80);
and_phy_reg(pi, 0x44a, 0x7f);
if (phy_c11 < -phy_c10)
phy_c11 = -phy_c10;
else if (phy_c11 > phy_c10)
phy_c11 = phy_c10;
if (phy_c12 < -phy_c10)
phy_c12 = -phy_c10;
else if (phy_c12 > phy_c10)
phy_c12 = phy_c10;
wlc_lcnphy_set_cc(pi, cal_type, phy_c11,
phy_c12);
udelay(20);
wlc_lcnphy_samp_cap(pi, 0, 0, ptr, 2);
wlc_lcnphy_afe_clk_init(pi, AFE_CLK_INIT_MODE_TXRX2X);
phy_c18 = 0;
phy_c19 = 0;
for (j = 0; j < 128; j++) {
if (cal_type != 0)
phy_c6 = j % phy_c4;
else
phy_c6 = (2 * j) % phy_c4;
write_phy_reg(pi, 0x60a, 160);
phy_c2.re = phy_c1[phy_c6].re;
phy_c2.im = phy_c1[phy_c6].im;
phy_c17 = ptr[j];
phy_c18 = phy_c18 + phy_c17 * phy_c2.re;
phy_c19 = phy_c19 + phy_c17 * phy_c2.im;
}
write_phy_reg(pi, 0x46a, 25);
phy_c18 = phy_c18 >> 10;
phy_c19 = phy_c19 >> 10;
phy_c20 = ((phy_c18 * phy_c18) +
(phy_c19 * phy_c19));
wlc_lcnphy_baseband_init(pi);
if (phy_c23 || phy_c20 < phy_c21) {
phy_c21 = phy_c20;
phy_c13 = phy_c11;
phy_c14 = phy_c12;
}
phy_c23 = 0;
}
}
phy_c23 = 1;
phy_c15 = phy_c13;
phy_c16 = phy_c14;
phy_c7 = phy_c7 >> 1;
wlc_lcnphy_set_cc(pi, cal_type, phy_c15, phy_c16);
udelay(20);
}
goto cleanup;
cleanup:
wlc_lcnphy_tx_iqlo_loopback_cleanup(pi, phy_c32);
wlc_lcnphy_stop_tx_tone(pi);
write_phy_reg(pi, 0x6da, phy_c26);
write_phy_reg(pi, 0x6db, phy_c27);
write_phy_reg(pi, 0x938, phy_c28);
write_phy_reg(pi, 0x4d7, phy_c29);
write_phy_reg(pi, 0x4d8, phy_c30);
write_radio_reg(pi, RADIO_2064_REG026, phy_c31);
wlc_lcnphy_radio_init(pi);
kfree(phy_c32);
kfree(ptr);
}
if (CHSPEC_IS2G(pi->radio_chanspec))
wlc_lcnphy_tx_pwr_ctrl_init((struct brcms_phy_pub *) pi);
void wlc_lcnphy_get_tx_iqcc(struct brcms_phy *pi, u16 *a, u16 *b)
{
u16 iqcc[2];
struct phytbl_info tab;
wlc_phy_chanspec_set((struct brcms_phy_pub *) pi, pi->radio_chanspec);
tab.tbl_ptr = iqcc;
tab.tbl_len = 2;
tab.tbl_id = 0;
tab.tbl_offset = 80;
tab.tbl_width = 16;
wlc_lcnphy_read_table(pi, &tab);
si_pmu_regcontrol(pi->sh->sih, 0, 0xf, 0x9);
*a = iqcc[0];
*b = iqcc[1];
}
si_pmu_chipcontrol(pi->sh->sih, 0, 0xffffffff, 0x03CDDDDD);
static void wlc_lcnphy_tx_iqlo_soft_cal_full(struct brcms_phy *pi)
{
struct lcnphy_unsign16_struct iqcc0, locc2, locc3, locc4;
if ((pi->sh->boardflags & BFL_FEM)
&& wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))
wlc_lcnphy_set_tx_pwr_by_index(pi, FIXED_TXPWR);
wlc_lcnphy_set_cc(pi, 0, 0, 0);
wlc_lcnphy_set_cc(pi, 2, 0, 0);
wlc_lcnphy_set_cc(pi, 3, 0, 0);
wlc_lcnphy_set_cc(pi, 4, 0, 0);
wlc_lcnphy_agc_temp_init(pi);
wlc_lcnphy_a1(pi, 4, 0, 0);
wlc_lcnphy_a1(pi, 3, 0, 0);
wlc_lcnphy_a1(pi, 2, 3, 2);
wlc_lcnphy_a1(pi, 0, 5, 8);
wlc_lcnphy_a1(pi, 2, 2, 1);
wlc_lcnphy_a1(pi, 0, 4, 3);
wlc_lcnphy_temp_adj(pi);
iqcc0 = wlc_lcnphy_get_cc(pi, 0);
locc2 = wlc_lcnphy_get_cc(pi, 2);
locc3 = wlc_lcnphy_get_cc(pi, 3);
locc4 = wlc_lcnphy_get_cc(pi, 4);
}
mod_phy_reg(pi, 0x448, (0x1 << 14), (1) << 14);
u16 wlc_lcnphy_get_tx_locc(struct brcms_phy *pi)
{
struct phytbl_info tab;
u16 didq;
udelay(100);
mod_phy_reg(pi, 0x448, (0x1 << 14), (0) << 14);
tab.tbl_id = 0;
tab.tbl_width = 16;
tab.tbl_ptr = &didq;
tab.tbl_len = 1;
tab.tbl_offset = 85;
wlc_lcnphy_read_table(pi, &tab);
wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_HW);
pi_lcn->lcnphy_noise_samples = LCNPHY_NOISE_SAMPLES_DEFAULT;
wlc_lcnphy_calib_modes(pi, PHY_PERICAL_PHYINIT);
return didq;
}
static void
wlc_lcnphy_tx_iqlo_loopback(struct brcms_phy *pi, u16 *values_to_save)
static void wlc_lcnphy_txpwrtbl_iqlo_cal(struct brcms_phy *pi)
{
u16 vmid;
int i;
for (i = 0; i < 20; i++)
values_to_save[i] =
read_radio_reg(pi, iqlo_loopback_rf_regs[i]);
mod_phy_reg(pi, 0x44c, (0x1 << 12), 1 << 12);
mod_phy_reg(pi, 0x44d, (0x1 << 14), 1 << 14);
struct lcnphy_txgains target_gains, old_gains;
u8 save_bb_mult;
u16 a, b, didq, save_pa_gain = 0;
uint idx, SAVE_txpwrindex = 0xFF;
u32 val;
u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
struct phytbl_info tab;
u8 ei0, eq0, fi0, fq0;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
mod_phy_reg(pi, 0x44c, (0x1 << 11), 1 << 11);
mod_phy_reg(pi, 0x44d, (0x1 << 13), 0 << 13);
wlc_lcnphy_get_tx_gain(pi, &old_gains);
save_pa_gain = wlc_lcnphy_get_pa_gain(pi);
mod_phy_reg(pi, 0x43b, (0x1 << 1), 1 << 1);
mod_phy_reg(pi, 0x43c, (0x1 << 1), 0 << 1);
save_bb_mult = wlc_lcnphy_get_bbmult(pi);
mod_phy_reg(pi, 0x43b, (0x1 << 0), 1 << 0);
mod_phy_reg(pi, 0x43c, (0x1 << 0), 0 << 0);
if (SAVE_txpwrctrl == LCNPHY_TX_PWR_CTRL_OFF)
SAVE_txpwrindex = wlc_lcnphy_get_current_tx_pwr_idx(pi);
if (LCNREV_IS(pi->pubpi.phy_rev, 2))
and_radio_reg(pi, RADIO_2064_REG03A, 0xFD);
else
and_radio_reg(pi, RADIO_2064_REG03A, 0xF9);
or_radio_reg(pi, RADIO_2064_REG11A, 0x1);
wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
or_radio_reg(pi, RADIO_2064_REG036, 0x01);
or_radio_reg(pi, RADIO_2064_REG11A, 0x18);
udelay(20);
target_gains.gm_gain = 7;
target_gains.pga_gain = 0;
target_gains.pad_gain = 21;
target_gains.dac_gain = 0;
wlc_lcnphy_set_tx_gain(pi, &target_gains);
wlc_lcnphy_set_tx_pwr_by_index(pi, 16);
if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
if (CHSPEC_IS5G(pi->radio_chanspec))
mod_radio_reg(pi, RADIO_2064_REG03A, 1, 0);
else
or_radio_reg(pi, RADIO_2064_REG03A, 1);
} else {
if (CHSPEC_IS5G(pi->radio_chanspec))
mod_radio_reg(pi, RADIO_2064_REG03A, 3, 1);
else
or_radio_reg(pi, RADIO_2064_REG03A, 0x3);
}
if (LCNREV_IS(pi->pubpi.phy_rev, 1) || pi_lcn->lcnphy_hw_iqcal_en) {
udelay(20);
wlc_lcnphy_set_tx_pwr_by_index(pi, 30);
write_radio_reg(pi, RADIO_2064_REG025, 0xF);
if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
if (CHSPEC_IS5G(pi->radio_chanspec))
mod_radio_reg(pi, RADIO_2064_REG028, 0xF, 0x4);
else
mod_radio_reg(pi, RADIO_2064_REG028, 0xF, 0x6);
wlc_lcnphy_tx_iqlo_cal(pi, &target_gains,
(pi_lcn->
lcnphy_recal ? LCNPHY_CAL_RECAL :
LCNPHY_CAL_FULL), false);
} else {
if (CHSPEC_IS5G(pi->radio_chanspec))
mod_radio_reg(pi, RADIO_2064_REG028, 0x1e, 0x4 << 1);
else
mod_radio_reg(pi, RADIO_2064_REG028, 0x1e, 0x6 << 1);
wlc_lcnphy_tx_iqlo_soft_cal_full(pi);
}
udelay(20);
wlc_lcnphy_get_radio_loft(pi, &ei0, &eq0, &fi0, &fq0);
if ((ABS((s8) fi0) == 15) && (ABS((s8) fq0) == 15)) {
if (CHSPEC_IS5G(pi->radio_chanspec)) {
target_gains.gm_gain = 255;
target_gains.pga_gain = 255;
target_gains.pad_gain = 0xf0;
target_gains.dac_gain = 0;
} else {
target_gains.gm_gain = 7;
target_gains.pga_gain = 45;
target_gains.pad_gain = 186;
target_gains.dac_gain = 0;
}
write_radio_reg(pi, RADIO_2064_REG005, 0x8);
or_radio_reg(pi, RADIO_2064_REG112, 0x80);
udelay(20);
if (LCNREV_IS(pi->pubpi.phy_rev, 1)
|| pi_lcn->lcnphy_hw_iqcal_en) {
or_radio_reg(pi, RADIO_2064_REG0FF, 0x10);
or_radio_reg(pi, RADIO_2064_REG11F, 0x44);
udelay(20);
target_gains.pga_gain = 0;
target_gains.pad_gain = 30;
wlc_lcnphy_set_tx_pwr_by_index(pi, 16);
wlc_lcnphy_tx_iqlo_cal(pi, &target_gains,
LCNPHY_CAL_FULL, false);
} else {
wlc_lcnphy_tx_iqlo_soft_cal_full(pi);
}
}
or_radio_reg(pi, RADIO_2064_REG00B, 0x7);
or_radio_reg(pi, RADIO_2064_REG113, 0x10);
udelay(20);
wlc_lcnphy_get_tx_iqcc(pi, &a, &b);
write_radio_reg(pi, RADIO_2064_REG007, 0x1);
udelay(20);
didq = wlc_lcnphy_get_tx_locc(pi);
vmid = 0x2A6;
mod_radio_reg(pi, RADIO_2064_REG0FC, 0x3 << 0, (vmid >> 8) & 0x3);
write_radio_reg(pi, RADIO_2064_REG0FD, (vmid & 0xff));
or_radio_reg(pi, RADIO_2064_REG11F, 0x44);
udelay(20);
tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
tab.tbl_width = 32;
tab.tbl_ptr = &val;
or_radio_reg(pi, RADIO_2064_REG0FF, 0x10);
udelay(20);
write_radio_reg(pi, RADIO_2064_REG012, 0x02);
or_radio_reg(pi, RADIO_2064_REG112, 0x06);
write_radio_reg(pi, RADIO_2064_REG036, 0x11);
write_radio_reg(pi, RADIO_2064_REG059, 0xcc);
write_radio_reg(pi, RADIO_2064_REG05C, 0x2e);
write_radio_reg(pi, RADIO_2064_REG078, 0xd7);
write_radio_reg(pi, RADIO_2064_REG092, 0x15);
}
tab.tbl_len = 1;
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET;
static void
wlc_lcnphy_samp_cap(struct brcms_phy *pi, int clip_detect_algo, u16 thresh,
s16 *ptr, int mode)
{
u32 curval1, curval2, stpptr, curptr, strptr, val;
u16 sslpnCalibClkEnCtrl, timer;
u16 old_sslpnCalibClkEnCtrl;
s16 imag, real;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
for (idx = 0; idx < 128; idx++) {
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_IQ_OFFSET + idx;
timer = 0;
old_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da);
wlc_lcnphy_read_table(pi, &tab);
val = (val & 0xfff00000) |
((u32) (a & 0x3FF) << 10) | (b & 0x3ff);
wlc_lcnphy_write_table(pi, &tab);
curval1 = R_REG(&pi->regs->psm_corectlsts);
ptr[130] = 0;
W_REG(&pi->regs->psm_corectlsts, ((1 << 6) | curval1));
val = didq;
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_LO_OFFSET + idx;
wlc_lcnphy_write_table(pi, &tab);
}
W_REG(&pi->regs->smpl_clct_strptr, 0x7E00);
W_REG(&pi->regs->smpl_clct_stpptr, 0x8000);
udelay(20);
curval2 = R_REG(&pi->regs->psm_phy_hdr_param);
W_REG(&pi->regs->psm_phy_hdr_param, curval2 | 0x30);
pi_lcn->lcnphy_cal_results.txiqlocal_a = a;
pi_lcn->lcnphy_cal_results.txiqlocal_b = b;
pi_lcn->lcnphy_cal_results.txiqlocal_didq = didq;
pi_lcn->lcnphy_cal_results.txiqlocal_ei0 = ei0;
pi_lcn->lcnphy_cal_results.txiqlocal_eq0 = eq0;
pi_lcn->lcnphy_cal_results.txiqlocal_fi0 = fi0;
pi_lcn->lcnphy_cal_results.txiqlocal_fq0 = fq0;
write_phy_reg(pi, 0x555, 0x0);
write_phy_reg(pi, 0x5a6, 0x5);
wlc_lcnphy_set_bbmult(pi, save_bb_mult);
wlc_lcnphy_set_pa_gain(pi, save_pa_gain);
wlc_lcnphy_set_tx_gain(pi, &old_gains);
write_phy_reg(pi, 0x5a2, (u16) (mode | mode << 6));
write_phy_reg(pi, 0x5cf, 3);
write_phy_reg(pi, 0x5a5, 0x3);
write_phy_reg(pi, 0x583, 0x0);
write_phy_reg(pi, 0x584, 0x0);
write_phy_reg(pi, 0x585, 0x0fff);
write_phy_reg(pi, 0x586, 0x0000);
if (SAVE_txpwrctrl != LCNPHY_TX_PWR_CTRL_OFF)
wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_txpwrctrl);
else
wlc_lcnphy_set_tx_pwr_by_index(pi, SAVE_txpwrindex);
}
write_phy_reg(pi, 0x580, 0x4501);
s16 wlc_lcnphy_tempsense_new(struct brcms_phy *pi, bool mode)
{
u16 tempsenseval1, tempsenseval2;
s16 avg = 0;
bool suspend = 0;
sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da);
write_phy_reg(pi, 0x6da, (u32) (sslpnCalibClkEnCtrl | 0x2008));
stpptr = R_REG(&pi->regs->smpl_clct_stpptr);
curptr = R_REG(&pi->regs->smpl_clct_curptr);
do {
udelay(10);
curptr = R_REG(&pi->regs->smpl_clct_curptr);
timer++;
} while ((curptr != stpptr) && (timer < 500));
if (mode == 1) {
suspend =
(0 ==
(R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim);
wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE);
}
tempsenseval1 = read_phy_reg(pi, 0x476) & 0x1FF;
tempsenseval2 = read_phy_reg(pi, 0x477) & 0x1FF;
W_REG(&pi->regs->psm_phy_hdr_param, 0x2);
strptr = 0x7E00;
W_REG(&pi->regs->tplatewrptr, strptr);
while (strptr < 0x8000) {
val = R_REG(&pi->regs->tplatewrdata);
imag = ((val >> 16) & 0x3ff);
real = ((val) & 0x3ff);
if (imag > 511)
imag -= 1024;
if (tempsenseval1 > 255)
avg = (s16) (tempsenseval1 - 512);
else
avg = (s16) tempsenseval1;
if (real > 511)
real -= 1024;
if (tempsenseval2 > 255)
avg += (s16) (tempsenseval2 - 512);
else
avg += (s16) tempsenseval2;
if (pi_lcn->lcnphy_iqcal_swp_dis)
ptr[(strptr - 0x7E00) / 4] = real;
else
ptr[(strptr - 0x7E00) / 4] = imag;
avg /= 2;
if (clip_detect_algo) {
if (imag > thresh || imag < -thresh) {
strptr = 0x8000;
ptr[130] = 1;
}
}
if (mode == 1) {
strptr += 4;
}
mod_phy_reg(pi, 0x448, (0x1 << 14), (1) << 14);
write_phy_reg(pi, 0x6da, old_sslpnCalibClkEnCtrl);
W_REG(&pi->regs->psm_phy_hdr_param, curval2);
W_REG(&pi->regs->psm_corectlsts, curval1);
udelay(100);
mod_phy_reg(pi, 0x448, (0x1 << 14), (0) << 14);
if (!suspend)
wlapi_enable_mac(pi->sh->physhim);
}
return avg;
}
static void wlc_lcnphy_tx_iqlo_soft_cal_full(struct brcms_phy *pi)
u16 wlc_lcnphy_tempsense(struct brcms_phy *pi, bool mode)
{
struct lcnphy_unsign16_struct iqcc0, locc2, locc3, locc4;
u16 tempsenseval1, tempsenseval2;
s32 avg = 0;
bool suspend = 0;
u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
wlc_lcnphy_set_cc(pi, 0, 0, 0);
wlc_lcnphy_set_cc(pi, 2, 0, 0);
wlc_lcnphy_set_cc(pi, 3, 0, 0);
wlc_lcnphy_set_cc(pi, 4, 0, 0);
if (mode == 1) {
suspend =
(0 ==
(R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim);
wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE);
}
tempsenseval1 = read_phy_reg(pi, 0x476) & 0x1FF;
tempsenseval2 = read_phy_reg(pi, 0x477) & 0x1FF;
wlc_lcnphy_a1(pi, 4, 0, 0);
wlc_lcnphy_a1(pi, 3, 0, 0);
wlc_lcnphy_a1(pi, 2, 3, 2);
wlc_lcnphy_a1(pi, 0, 5, 8);
wlc_lcnphy_a1(pi, 2, 2, 1);
wlc_lcnphy_a1(pi, 0, 4, 3);
if (tempsenseval1 > 255)
avg = (int)(tempsenseval1 - 512);
else
avg = (int)tempsenseval1;
iqcc0 = wlc_lcnphy_get_cc(pi, 0);
locc2 = wlc_lcnphy_get_cc(pi, 2);
locc3 = wlc_lcnphy_get_cc(pi, 3);
locc4 = wlc_lcnphy_get_cc(pi, 4);
}
if (pi_lcn->lcnphy_tempsense_option == 1 || pi->hwpwrctrl_capable) {
if (tempsenseval2 > 255)
avg = (int)(avg - tempsenseval2 + 512);
else
avg = (int)(avg - tempsenseval2);
} else {
if (tempsenseval2 > 255)
avg = (int)(avg + tempsenseval2 - 512);
else
avg = (int)(avg + tempsenseval2);
avg = avg / 2;
}
if (avg < 0)
avg = avg + 512;
static void
wlc_lcnphy_set_cc(struct brcms_phy *pi, int cal_type, s16 coeff_x, s16 coeff_y)
{
u16 di0dq0;
u16 x, y, data_rf;
int k;
switch (cal_type) {
case 0:
wlc_lcnphy_set_tx_iqcc(pi, coeff_x, coeff_y);
break;
case 2:
di0dq0 = (coeff_x & 0xff) << 8 | (coeff_y & 0xff);
wlc_lcnphy_set_tx_locc(pi, di0dq0);
break;
case 3:
k = wlc_lcnphy_calc_floor(coeff_x, 0);
y = 8 + k;
k = wlc_lcnphy_calc_floor(coeff_x, 1);
x = 8 - k;
data_rf = (x * 16 + y);
write_radio_reg(pi, RADIO_2064_REG089, data_rf);
k = wlc_lcnphy_calc_floor(coeff_y, 0);
y = 8 + k;
k = wlc_lcnphy_calc_floor(coeff_y, 1);
x = 8 - k;
data_rf = (x * 16 + y);
write_radio_reg(pi, RADIO_2064_REG08A, data_rf);
break;
case 4:
k = wlc_lcnphy_calc_floor(coeff_x, 0);
y = 8 + k;
k = wlc_lcnphy_calc_floor(coeff_x, 1);
x = 8 - k;
data_rf = (x * 16 + y);
write_radio_reg(pi, RADIO_2064_REG08B, data_rf);
k = wlc_lcnphy_calc_floor(coeff_y, 0);
y = 8 + k;
k = wlc_lcnphy_calc_floor(coeff_y, 1);
x = 8 - k;
data_rf = (x * 16 + y);
write_radio_reg(pi, RADIO_2064_REG08C, data_rf);
break;
if (pi_lcn->lcnphy_tempsense_option == 2)
avg = tempsenseval1;
if (mode)
wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_txpwrctrl);
if (mode == 1) {
mod_phy_reg(pi, 0x448, (0x1 << 14), (1) << 14);
udelay(100);
mod_phy_reg(pi, 0x448, (0x1 << 14), (0) << 14);
if (!suspend)
wlapi_enable_mac(pi->sh->physhim);
}
return (u16) avg;
}
static struct lcnphy_unsign16_struct
wlc_lcnphy_get_cc(struct brcms_phy *pi, int cal_type)
s8 wlc_lcnphy_tempsense_degree(struct brcms_phy *pi, bool mode)
{
u16 a, b, didq;
u8 di0, dq0, ei, eq, fi, fq;
struct lcnphy_unsign16_struct cc;
cc.re = 0;
cc.im = 0;
switch (cal_type) {
case 0:
wlc_lcnphy_get_tx_iqcc(pi, &a, &b);
cc.re = a;
cc.im = b;
break;
case 2:
didq = wlc_lcnphy_get_tx_locc(pi);
di0 = (((didq & 0xff00) << 16) >> 24);
dq0 = (((didq & 0x00ff) << 24) >> 24);
cc.re = (u16) di0;
cc.im = (u16) dq0;
break;
case 3:
wlc_lcnphy_get_radio_loft(pi, &ei, &eq, &fi, &fq);
cc.re = (u16) ei;
cc.im = (u16) eq;
break;
case 4:
wlc_lcnphy_get_radio_loft(pi, &ei, &eq, &fi, &fq);
cc.re = (u16) fi;
cc.im = (u16) fq;
break;
}
return cc;
s32 degree = wlc_lcnphy_tempsense_new(pi, mode);
degree =
((degree <<
10) + LCN_TEMPSENSE_OFFSET + (LCN_TEMPSENSE_DEN >> 1))
/ LCN_TEMPSENSE_DEN;
return (s8) degree;
}
static void
wlc_lcnphy_a1(struct brcms_phy *pi, int cal_type, int num_levels,
int step_size_lg2)
s8 wlc_lcnphy_vbatsense(struct brcms_phy *pi, bool mode)
{
const struct lcnphy_spb_tone *phy_c1;
struct lcnphy_spb_tone phy_c2;
struct lcnphy_unsign16_struct phy_c3;
int phy_c4, phy_c5, k, l, j, phy_c6;
u16 phy_c7, phy_c8, phy_c9;
s16 phy_c10, phy_c11, phy_c12, phy_c13, phy_c14, phy_c15, phy_c16;
s16 *ptr, phy_c17;
s32 phy_c18, phy_c19;
u32 phy_c20, phy_c21;
bool phy_c22, phy_c23, phy_c24, phy_c25;
u16 phy_c26, phy_c27;
u16 phy_c28, phy_c29, phy_c30;
u16 phy_c31;
u16 *phy_c32;
phy_c21 = 0;
phy_c10 = phy_c13 = phy_c14 = phy_c8 = 0;
ptr = kmalloc(sizeof(s16) * 131, GFP_ATOMIC);
if (NULL == ptr)
return;
u16 vbatsenseval;
s32 avg = 0;
bool suspend = 0;
phy_c32 = kmalloc(sizeof(u16) * 20, GFP_ATOMIC);
if (NULL == phy_c32) {
kfree(ptr);
return;
if (mode == 1) {
suspend =
(0 ==
(R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim);
wlc_lcnphy_vbat_temp_sense_setup(pi, VBATSENSE);
}
phy_c26 = read_phy_reg(pi, 0x6da);
phy_c27 = read_phy_reg(pi, 0x6db);
phy_c31 = read_radio_reg(pi, RADIO_2064_REG026);
write_phy_reg(pi, 0x93d, 0xC0);
wlc_lcnphy_start_tx_tone(pi, 3750, 88, 0);
write_phy_reg(pi, 0x6da, 0xffff);
or_phy_reg(pi, 0x6db, 0x3);
vbatsenseval = read_phy_reg(pi, 0x475) & 0x1FF;
wlc_lcnphy_tx_iqlo_loopback(pi, phy_c32);
udelay(500);
phy_c28 = read_phy_reg(pi, 0x938);
phy_c29 = read_phy_reg(pi, 0x4d7);
phy_c30 = read_phy_reg(pi, 0x4d8);
or_phy_reg(pi, 0x938, 0x1 << 2);
or_phy_reg(pi, 0x4d7, 0x1 << 2);
or_phy_reg(pi, 0x4d7, 0x1 << 3);
mod_phy_reg(pi, 0x4d7, (0x7 << 12), 0x2 << 12);
or_phy_reg(pi, 0x4d8, 1 << 0);
or_phy_reg(pi, 0x4d8, 1 << 1);
mod_phy_reg(pi, 0x4d8, (0x3ff << 2), 0x23A << 2);
mod_phy_reg(pi, 0x4d8, (0x7 << 12), 0x7 << 12);
phy_c1 = &lcnphy_spb_tone_3750[0];
phy_c4 = 32;
if (vbatsenseval > 255)
avg = (s32) (vbatsenseval - 512);
else
avg = (s32) vbatsenseval;
if (num_levels == 0) {
if (cal_type != 0)
num_levels = 4;
else
num_levels = 9;
}
if (step_size_lg2 == 0) {
if (cal_type != 0)
step_size_lg2 = 3;
else
step_size_lg2 = 8;
avg = (avg * LCN_VBAT_SCALE_NOM +
(LCN_VBAT_SCALE_DEN >> 1)) / LCN_VBAT_SCALE_DEN;
if (mode == 1) {
if (!suspend)
wlapi_enable_mac(pi->sh->physhim);
}
return (s8) avg;
}
phy_c7 = (1 << step_size_lg2);
phy_c3 = wlc_lcnphy_get_cc(pi, cal_type);
phy_c15 = (s16) phy_c3.re;
phy_c16 = (s16) phy_c3.im;
if (cal_type == 2) {
if (phy_c3.re > 127)
phy_c15 = phy_c3.re - 256;
if (phy_c3.im > 127)
phy_c16 = phy_c3.im - 256;
static void wlc_lcnphy_afe_clk_init(struct brcms_phy *pi, u8 mode)
{
u8 phybw40;
phybw40 = CHSPEC_IS40(pi->radio_chanspec);
mod_phy_reg(pi, 0x6d1, (0x1 << 7), (1) << 7);
if (((mode == AFE_CLK_INIT_MODE_PAPD) && (phybw40 == 0)) ||
(mode == AFE_CLK_INIT_MODE_TXRX2X))
write_phy_reg(pi, 0x6d0, 0x7);
wlc_lcnphy_toggle_afe_pwdn(pi);
}
static void wlc_lcnphy_temp_adj(struct brcms_phy *pi)
{
}
static void wlc_lcnphy_glacial_timer_based_cal(struct brcms_phy *pi)
{
bool suspend;
s8 index;
u16 SAVE_pwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
suspend =
(0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim);
wlc_lcnphy_deaf_mode(pi, true);
pi->phy_lastcal = pi->sh->now;
pi->phy_forcecal = false;
index = pi_lcn->lcnphy_current_index;
wlc_lcnphy_txpwrtbl_iqlo_cal(pi);
wlc_lcnphy_set_tx_pwr_by_index(pi, index);
wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_pwrctrl);
wlc_lcnphy_deaf_mode(pi, false);
if (!suspend)
wlapi_enable_mac(pi->sh->physhim);
}
static void wlc_lcnphy_periodic_cal(struct brcms_phy *pi)
{
bool suspend, full_cal;
const struct lcnphy_rx_iqcomp *rx_iqcomp;
int rx_iqcomp_sz;
u16 SAVE_pwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
s8 index;
struct phytbl_info tab;
s32 a1, b0, b1;
s32 tssi, pwr, maxtargetpwr, mintargetpwr;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
pi->phy_lastcal = pi->sh->now;
pi->phy_forcecal = false;
full_cal =
(pi_lcn->lcnphy_full_cal_channel !=
CHSPEC_CHANNEL(pi->radio_chanspec));
pi_lcn->lcnphy_full_cal_channel = CHSPEC_CHANNEL(pi->radio_chanspec);
index = pi_lcn->lcnphy_current_index;
suspend =
(0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
if (!suspend) {
wlapi_bmac_write_shm(pi->sh->physhim, M_CTS_DURATION, 10000);
wlapi_suspend_mac_and_wait(pi->sh->physhim);
}
wlc_lcnphy_set_cc(pi, cal_type, phy_c15, phy_c16);
udelay(20);
for (phy_c8 = 0; phy_c7 != 0 && phy_c8 < num_levels; phy_c8++) {
phy_c23 = 1;
phy_c22 = 0;
switch (cal_type) {
case 0:
phy_c10 = 511;
break;
case 2:
phy_c10 = 127;
break;
case 3:
phy_c10 = 15;
break;
case 4:
phy_c10 = 15;
break;
}
phy_c9 = read_phy_reg(pi, 0x93d);
phy_c9 = 2 * phy_c9;
phy_c24 = 0;
phy_c5 = 7;
phy_c25 = 1;
while (1) {
write_radio_reg(pi, RADIO_2064_REG026,
(phy_c5 & 0x7) | ((phy_c5 & 0x7) << 4));
udelay(50);
phy_c22 = 0;
ptr[130] = 0;
wlc_lcnphy_samp_cap(pi, 1, phy_c9, &ptr[0], 2);
if (ptr[130] == 1)
phy_c22 = 1;
if (phy_c22)
phy_c5 -= 1;
if ((phy_c22 != phy_c24) && (!phy_c25))
break;
if (!phy_c22)
phy_c5 += 1;
if (phy_c5 <= 0 || phy_c5 >= 7)
break;
phy_c24 = phy_c22;
phy_c25 = 0;
}
wlc_lcnphy_deaf_mode(pi, true);
if (phy_c5 < 0)
phy_c5 = 0;
else if (phy_c5 > 7)
phy_c5 = 7;
wlc_lcnphy_txpwrtbl_iqlo_cal(pi);
for (k = -phy_c7; k <= phy_c7; k += phy_c7) {
for (l = -phy_c7; l <= phy_c7; l += phy_c7) {
phy_c11 = phy_c15 + k;
phy_c12 = phy_c16 + l;
rx_iqcomp = lcnphy_rx_iqcomp_table_rev0;
rx_iqcomp_sz = ARRAY_SIZE(lcnphy_rx_iqcomp_table_rev0);
if (phy_c11 < -phy_c10)
phy_c11 = -phy_c10;
else if (phy_c11 > phy_c10)
phy_c11 = phy_c10;
if (phy_c12 < -phy_c10)
phy_c12 = -phy_c10;
else if (phy_c12 > phy_c10)
phy_c12 = phy_c10;
wlc_lcnphy_set_cc(pi, cal_type, phy_c11,
phy_c12);
udelay(20);
wlc_lcnphy_samp_cap(pi, 0, 0, ptr, 2);
if (LCNREV_IS(pi->pubpi.phy_rev, 1))
wlc_lcnphy_rx_iq_cal(pi, NULL, 0, true, false, 1, 40);
else
wlc_lcnphy_rx_iq_cal(pi, NULL, 0, true, false, 1, 127);
phy_c18 = 0;
phy_c19 = 0;
for (j = 0; j < 128; j++) {
if (cal_type != 0)
phy_c6 = j % phy_c4;
else
phy_c6 = (2 * j) % phy_c4;
if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) {
phy_c2.re = phy_c1[phy_c6].re;
phy_c2.im = phy_c1[phy_c6].im;
phy_c17 = ptr[j];
phy_c18 = phy_c18 + phy_c17 * phy_c2.re;
phy_c19 = phy_c19 + phy_c17 * phy_c2.im;
}
wlc_lcnphy_idle_tssi_est((struct brcms_phy_pub *) pi);
b0 = pi->txpa_2g[0];
b1 = pi->txpa_2g[1];
a1 = pi->txpa_2g[2];
maxtargetpwr = wlc_lcnphy_tssi2dbm(10, a1, b0, b1);
mintargetpwr = wlc_lcnphy_tssi2dbm(125, a1, b0, b1);
tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
tab.tbl_width = 32;
tab.tbl_ptr = &pwr;
tab.tbl_len = 1;
tab.tbl_offset = 0;
for (tssi = 0; tssi < 128; tssi++) {
pwr = wlc_lcnphy_tssi2dbm(tssi, a1, b0, b1);
pwr = (pwr < mintargetpwr) ? mintargetpwr : pwr;
wlc_lcnphy_write_table(pi, &tab);
tab.tbl_offset++;
}
}
wlc_lcnphy_set_tx_pwr_by_index(pi, index);
wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_pwrctrl);
wlc_lcnphy_deaf_mode(pi, false);
if (!suspend)
wlapi_enable_mac(pi->sh->physhim);
}
void wlc_lcnphy_calib_modes(struct brcms_phy *pi, uint mode)
{
u16 temp_new;
int temp1, temp2, temp_diff;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
switch (mode) {
case PHY_PERICAL_CHAN:
break;
case PHY_FULLCAL:
wlc_lcnphy_periodic_cal(pi);
break;
case PHY_PERICAL_PHYINIT:
wlc_lcnphy_periodic_cal(pi);
break;
case PHY_PERICAL_WATCHDOG:
if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) {
temp_new = wlc_lcnphy_tempsense(pi, 0);
temp1 = LCNPHY_TEMPSENSE(temp_new);
temp2 = LCNPHY_TEMPSENSE(pi_lcn->lcnphy_cal_temper);
temp_diff = temp1 - temp2;
if ((pi_lcn->lcnphy_cal_counter > 90) ||
(temp_diff > 60) || (temp_diff < -60)) {
wlc_lcnphy_glacial_timer_based_cal(pi);
wlc_2064_vco_cal(pi);
pi_lcn->lcnphy_cal_temper = temp_new;
pi_lcn->lcnphy_cal_counter = 0;
} else
pi_lcn->lcnphy_cal_counter++;
}
break;
case LCNPHY_PERICAL_TEMPBASED_TXPWRCTRL:
if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))
wlc_lcnphy_tx_power_adjustment(
(struct brcms_phy_pub *) pi);
break;
}
}
void wlc_lcnphy_get_tssi(struct brcms_phy *pi, s8 *ofdm_pwr, s8 *cck_pwr)
{
s8 cck_offset;
u16 status;
status = (read_phy_reg(pi, 0x4ab));
if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi) &&
(status & (0x1 << 15))) {
*ofdm_pwr = (s8) (((read_phy_reg(pi, 0x4ab) & (0x1ff << 0))
>> 0) >> 1);
phy_c18 = phy_c18 >> 10;
phy_c19 = phy_c19 >> 10;
phy_c20 = ((phy_c18 * phy_c18) +
(phy_c19 * phy_c19));
if (wlc_phy_tpc_isenabled_lcnphy(pi))
cck_offset = pi->tx_power_offset[TXP_FIRST_CCK];
else
cck_offset = 0;
if (phy_c23 || phy_c20 < phy_c21) {
phy_c21 = phy_c20;
phy_c13 = phy_c11;
phy_c14 = phy_c12;
}
phy_c23 = 0;
}
}
phy_c23 = 1;
phy_c15 = phy_c13;
phy_c16 = phy_c14;
phy_c7 = phy_c7 >> 1;
wlc_lcnphy_set_cc(pi, cal_type, phy_c15, phy_c16);
udelay(20);
*cck_pwr = *ofdm_pwr + cck_offset;
} else {
*cck_pwr = 0;
*ofdm_pwr = 0;
}
goto cleanup;
cleanup:
wlc_lcnphy_tx_iqlo_loopback_cleanup(pi, phy_c32);
wlc_lcnphy_stop_tx_tone(pi);
write_phy_reg(pi, 0x6da, phy_c26);
write_phy_reg(pi, 0x6db, phy_c27);
write_phy_reg(pi, 0x938, phy_c28);
write_phy_reg(pi, 0x4d7, phy_c29);
write_phy_reg(pi, 0x4d8, phy_c30);
write_radio_reg(pi, RADIO_2064_REG026, phy_c31);
kfree(phy_c32);
kfree(ptr);
}
static void
wlc_lcnphy_tx_iqlo_loopback_cleanup(struct brcms_phy *pi, u16 *values_to_save)
void wlc_phy_cal_init_lcnphy(struct brcms_phy *pi)
{
int i;
return;
and_phy_reg(pi, 0x44c, 0x0 >> 11);
}
and_phy_reg(pi, 0x43b, 0xC);
void wlc_lcnphy_tx_power_adjustment(struct brcms_phy_pub *ppi)
{
s8 index;
u16 index2;
struct brcms_phy *pi = (struct brcms_phy *) ppi;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) &&
SAVE_txpwrctrl) {
index = wlc_lcnphy_tempcompensated_txpwrctrl(pi);
index2 = (u16) (index * 2);
mod_phy_reg(pi, 0x4a9, (0x1ff << 0), (index2) << 0);
for (i = 0; i < 20; i++)
write_radio_reg(pi, iqlo_loopback_rf_regs[i],
values_to_save[i]);
pi_lcn->lcnphy_current_index =
(s8)((read_phy_reg(pi, 0x4a9) & 0xFF) / 2);
}
}
static void
......@@ -4188,75 +4316,241 @@ wlc_lcnphy_load_tx_gain_table(struct brcms_phy *pi,
else
pa_gain = 0x70;
if (pi->sh->boardflags & BFL_FEM)
pa_gain = 0x10;
tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
tab.tbl_width = 32;
tab.tbl_len = 1;
tab.tbl_ptr = &val;
if (pi->sh->boardflags & BFL_FEM)
pa_gain = 0x10;
tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
tab.tbl_width = 32;
tab.tbl_len = 1;
tab.tbl_ptr = &val;
for (j = 0; j < 128; j++) {
gm_gain = gain_table[j].gm;
val = (((u32) pa_gain << 24) |
(gain_table[j].pad << 16) |
(gain_table[j].pga << 8) | gm_gain);
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_GAIN_OFFSET + j;
wlc_lcnphy_write_table(pi, &tab);
val = (gain_table[j].dac << 28) | (gain_table[j].bb_mult << 20);
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_IQ_OFFSET + j;
wlc_lcnphy_write_table(pi, &tab);
}
}
static void wlc_lcnphy_load_rfpower(struct brcms_phy *pi)
{
struct phytbl_info tab;
u32 val, bbmult, rfgain;
u8 index;
u8 scale_factor = 1;
s16 temp, temp1, temp2, qQ, qQ1, qQ2, shift;
tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
tab.tbl_width = 32;
tab.tbl_len = 1;
for (index = 0; index < 128; index++) {
tab.tbl_ptr = &bbmult;
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_IQ_OFFSET + index;
wlc_lcnphy_read_table(pi, &tab);
bbmult = bbmult >> 20;
tab.tbl_ptr = &rfgain;
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_GAIN_OFFSET + index;
wlc_lcnphy_read_table(pi, &tab);
qm_log10((s32) (bbmult), 0, &temp1, &qQ1);
qm_log10((s32) (1 << 6), 0, &temp2, &qQ2);
if (qQ1 < qQ2) {
temp2 = qm_shr16(temp2, qQ2 - qQ1);
qQ = qQ1;
} else {
temp1 = qm_shr16(temp1, qQ1 - qQ2);
qQ = qQ2;
}
temp = qm_sub16(temp1, temp2);
if (qQ >= 4)
shift = qQ - 4;
else
shift = 4 - qQ;
val = (((index << shift) + (5 * temp) +
(1 << (scale_factor + shift - 3))) >> (scale_factor +
shift - 2));
tab.tbl_ptr = &val;
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_PWR_OFFSET + index;
wlc_lcnphy_write_table(pi, &tab);
}
}
static void wlc_lcnphy_bu_tweaks(struct brcms_phy *pi)
{
or_phy_reg(pi, 0x805, 0x1);
mod_phy_reg(pi, 0x42f, (0x7 << 0), (0x3) << 0);
mod_phy_reg(pi, 0x030, (0x7 << 0), (0x3) << 0);
write_phy_reg(pi, 0x414, 0x1e10);
write_phy_reg(pi, 0x415, 0x0640);
mod_phy_reg(pi, 0x4df, (0xff << 8), -9 << 8);
or_phy_reg(pi, 0x44a, 0x44);
write_phy_reg(pi, 0x44a, 0x80);
mod_phy_reg(pi, 0x434, (0xff << 0), (0xFD) << 0);
mod_phy_reg(pi, 0x420, (0xff << 0), (16) << 0);
if (!(pi->sh->boardrev < 0x1204))
mod_radio_reg(pi, RADIO_2064_REG09B, 0xF0, 0xF0);
write_phy_reg(pi, 0x7d6, 0x0902);
mod_phy_reg(pi, 0x429, (0xf << 0), (0x9) << 0);
mod_phy_reg(pi, 0x429, (0x3f << 4), (0xe) << 4);
if (LCNREV_IS(pi->pubpi.phy_rev, 1)) {
mod_phy_reg(pi, 0x423, (0xff << 0), (0x46) << 0);
mod_phy_reg(pi, 0x411, (0xff << 0), (1) << 0);
mod_phy_reg(pi, 0x434, (0xff << 0), (0xFF) << 0);
mod_phy_reg(pi, 0x656, (0xf << 0), (2) << 0);
mod_phy_reg(pi, 0x44d, (0x1 << 2), (1) << 2);
mod_radio_reg(pi, RADIO_2064_REG0F7, 0x4, 0x4);
mod_radio_reg(pi, RADIO_2064_REG0F1, 0x3, 0);
mod_radio_reg(pi, RADIO_2064_REG0F2, 0xF8, 0x90);
mod_radio_reg(pi, RADIO_2064_REG0F3, 0x3, 0x2);
mod_radio_reg(pi, RADIO_2064_REG0F3, 0xf0, 0xa0);
mod_radio_reg(pi, RADIO_2064_REG11F, 0x2, 0x2);
wlc_lcnphy_clear_tx_power_offsets(pi);
mod_phy_reg(pi, 0x4d0, (0x1ff << 6), (10) << 6);
}
}
static void wlc_lcnphy_rcal(struct brcms_phy *pi)
{
u8 rcal_value;
and_radio_reg(pi, RADIO_2064_REG05B, 0xfD);
or_radio_reg(pi, RADIO_2064_REG004, 0x40);
or_radio_reg(pi, RADIO_2064_REG120, 0x10);
or_radio_reg(pi, RADIO_2064_REG078, 0x80);
or_radio_reg(pi, RADIO_2064_REG129, 0x02);
or_radio_reg(pi, RADIO_2064_REG057, 0x01);
or_radio_reg(pi, RADIO_2064_REG05B, 0x02);
mdelay(5);
SPINWAIT(!wlc_radio_2064_rcal_done(pi), 10 * 1000 * 1000);
if (wlc_radio_2064_rcal_done(pi)) {
rcal_value = (u8) read_radio_reg(pi, RADIO_2064_REG05C);
rcal_value = rcal_value & 0x1f;
}
and_radio_reg(pi, RADIO_2064_REG05B, 0xfD);
and_radio_reg(pi, RADIO_2064_REG057, 0xFE);
}
static void wlc_lcnphy_rc_cal(struct brcms_phy *pi)
{
u8 dflt_rc_cal_val;
u16 flt_val;
dflt_rc_cal_val = 7;
if (LCNREV_IS(pi->pubpi.phy_rev, 1))
dflt_rc_cal_val = 11;
flt_val =
(dflt_rc_cal_val << 10) | (dflt_rc_cal_val << 5) |
(dflt_rc_cal_val);
write_phy_reg(pi, 0x933, flt_val);
write_phy_reg(pi, 0x934, flt_val);
write_phy_reg(pi, 0x935, flt_val);
write_phy_reg(pi, 0x936, flt_val);
write_phy_reg(pi, 0x937, (flt_val & 0x1FF));
return;
}
static void wlc_radio_2064_init(struct brcms_phy *pi)
{
u32 i;
struct lcnphy_radio_regs *lcnphyregs = NULL;
lcnphyregs = lcnphy_radio_regs_2064;
for (i = 0; lcnphyregs[i].address != 0xffff; i++)
if (CHSPEC_IS5G(pi->radio_chanspec) && lcnphyregs[i].do_init_a)
write_radio_reg(pi,
((lcnphyregs[i].address & 0x3fff) |
RADIO_DEFAULT_CORE),
(u16) lcnphyregs[i].init_a);
else if (lcnphyregs[i].do_init_g)
write_radio_reg(pi,
((lcnphyregs[i].address & 0x3fff) |
RADIO_DEFAULT_CORE),
(u16) lcnphyregs[i].init_g);
write_radio_reg(pi, RADIO_2064_REG032, 0x62);
write_radio_reg(pi, RADIO_2064_REG033, 0x19);
for (j = 0; j < 128; j++) {
gm_gain = gain_table[j].gm;
val = (((u32) pa_gain << 24) |
(gain_table[j].pad << 16) |
(gain_table[j].pga << 8) | gm_gain);
write_radio_reg(pi, RADIO_2064_REG090, 0x10);
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_GAIN_OFFSET + j;
wlc_lcnphy_write_table(pi, &tab);
write_radio_reg(pi, RADIO_2064_REG010, 0x00);
val = (gain_table[j].dac << 28) | (gain_table[j].bb_mult << 20);
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_IQ_OFFSET + j;
wlc_lcnphy_write_table(pi, &tab);
if (LCNREV_IS(pi->pubpi.phy_rev, 1)) {
write_radio_reg(pi, RADIO_2064_REG060, 0x7f);
write_radio_reg(pi, RADIO_2064_REG061, 0x72);
write_radio_reg(pi, RADIO_2064_REG062, 0x7f);
}
}
static void wlc_lcnphy_load_rfpower(struct brcms_phy *pi)
{
struct phytbl_info tab;
u32 val, bbmult, rfgain;
u8 index;
u8 scale_factor = 1;
s16 temp, temp1, temp2, qQ, qQ1, qQ2, shift;
write_radio_reg(pi, RADIO_2064_REG01D, 0x02);
write_radio_reg(pi, RADIO_2064_REG01E, 0x06);
tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
tab.tbl_width = 32;
tab.tbl_len = 1;
mod_phy_reg(pi, 0x4ea, (0x7 << 0), 0 << 0);
for (index = 0; index < 128; index++) {
tab.tbl_ptr = &bbmult;
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_IQ_OFFSET + index;
wlc_lcnphy_read_table(pi, &tab);
bbmult = bbmult >> 20;
mod_phy_reg(pi, 0x4ea, (0x7 << 3), 1 << 3);
tab.tbl_ptr = &rfgain;
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_GAIN_OFFSET + index;
wlc_lcnphy_read_table(pi, &tab);
mod_phy_reg(pi, 0x4ea, (0x7 << 6), 2 << 6);
qm_log10((s32) (bbmult), 0, &temp1, &qQ1);
qm_log10((s32) (1 << 6), 0, &temp2, &qQ2);
mod_phy_reg(pi, 0x4ea, (0x7 << 9), 3 << 9);
if (qQ1 < qQ2) {
temp2 = qm_shr16(temp2, qQ2 - qQ1);
qQ = qQ1;
} else {
temp1 = qm_shr16(temp1, qQ1 - qQ2);
qQ = qQ2;
}
temp = qm_sub16(temp1, temp2);
mod_phy_reg(pi, 0x4ea, (0x7 << 12), 4 << 12);
if (qQ >= 4)
shift = qQ - 4;
else
shift = 4 - qQ;
write_phy_reg(pi, 0x4ea, 0x4688);
val = (((index << shift) + (5 * temp) +
(1 << (scale_factor + shift - 3))) >> (scale_factor +
shift - 2));
mod_phy_reg(pi, 0x4eb, (0x7 << 0), 2 << 0);
tab.tbl_ptr = &val;
tab.tbl_offset = LCNPHY_TX_PWR_CTRL_PWR_OFFSET + index;
wlc_lcnphy_write_table(pi, &tab);
}
mod_phy_reg(pi, 0x4eb, (0x7 << 6), 0 << 6);
mod_phy_reg(pi, 0x46a, (0xffff << 0), 25 << 0);
wlc_lcnphy_set_tx_locc(pi, 0);
wlc_lcnphy_rcal(pi);
wlc_lcnphy_rc_cal(pi);
}
static void wlc_lcnphy_radio_init(struct brcms_phy *pi)
{
wlc_radio_2064_init(pi);
}
static void wlc_lcnphy_tbl_init(struct brcms_phy *pi)
......@@ -4460,58 +4754,6 @@ static void wlc_lcnphy_agc_temp_init(struct brcms_phy *pi)
}
static void wlc_lcnphy_bu_tweaks(struct brcms_phy *pi)
{
or_phy_reg(pi, 0x805, 0x1);
mod_phy_reg(pi, 0x42f, (0x7 << 0), (0x3) << 0);
mod_phy_reg(pi, 0x030, (0x7 << 0), (0x3) << 0);
write_phy_reg(pi, 0x414, 0x1e10);
write_phy_reg(pi, 0x415, 0x0640);
mod_phy_reg(pi, 0x4df, (0xff << 8), -9 << 8);
or_phy_reg(pi, 0x44a, 0x44);
write_phy_reg(pi, 0x44a, 0x80);
mod_phy_reg(pi, 0x434, (0xff << 0), (0xFD) << 0);
mod_phy_reg(pi, 0x420, (0xff << 0), (16) << 0);
if (!(pi->sh->boardrev < 0x1204))
mod_radio_reg(pi, RADIO_2064_REG09B, 0xF0, 0xF0);
write_phy_reg(pi, 0x7d6, 0x0902);
mod_phy_reg(pi, 0x429, (0xf << 0), (0x9) << 0);
mod_phy_reg(pi, 0x429, (0x3f << 4), (0xe) << 4);
if (LCNREV_IS(pi->pubpi.phy_rev, 1)) {
mod_phy_reg(pi, 0x423, (0xff << 0), (0x46) << 0);
mod_phy_reg(pi, 0x411, (0xff << 0), (1) << 0);
mod_phy_reg(pi, 0x434, (0xff << 0), (0xFF) << 0);
mod_phy_reg(pi, 0x656, (0xf << 0), (2) << 0);
mod_phy_reg(pi, 0x44d, (0x1 << 2), (1) << 2);
mod_radio_reg(pi, RADIO_2064_REG0F7, 0x4, 0x4);
mod_radio_reg(pi, RADIO_2064_REG0F1, 0x3, 0);
mod_radio_reg(pi, RADIO_2064_REG0F2, 0xF8, 0x90);
mod_radio_reg(pi, RADIO_2064_REG0F3, 0x3, 0x2);
mod_radio_reg(pi, RADIO_2064_REG0F3, 0xf0, 0xa0);
mod_radio_reg(pi, RADIO_2064_REG11F, 0x2, 0x2);
wlc_lcnphy_clear_tx_power_offsets(pi);
mod_phy_reg(pi, 0x4d0, (0x1ff << 6), (10) << 6);
}
}
static void wlc_lcnphy_baseband_init(struct brcms_phy *pi)
{
......@@ -4522,118 +4764,53 @@ static void wlc_lcnphy_baseband_init(struct brcms_phy *pi)
wlc_lcnphy_bu_tweaks(pi);
}
static void wlc_radio_2064_init(struct brcms_phy *pi)
void wlc_phy_init_lcnphy(struct brcms_phy *pi)
{
u32 i;
struct lcnphy_radio_regs *lcnphyregs = NULL;
lcnphyregs = lcnphy_radio_regs_2064;
for (i = 0; lcnphyregs[i].address != 0xffff; i++)
if (CHSPEC_IS5G(pi->radio_chanspec) && lcnphyregs[i].do_init_a)
write_radio_reg(pi,
((lcnphyregs[i].address & 0x3fff) |
RADIO_DEFAULT_CORE),
(u16) lcnphyregs[i].init_a);
else if (lcnphyregs[i].do_init_g)
write_radio_reg(pi,
((lcnphyregs[i].address & 0x3fff) |
RADIO_DEFAULT_CORE),
(u16) lcnphyregs[i].init_g);
write_radio_reg(pi, RADIO_2064_REG032, 0x62);
write_radio_reg(pi, RADIO_2064_REG033, 0x19);
write_radio_reg(pi, RADIO_2064_REG090, 0x10);
write_radio_reg(pi, RADIO_2064_REG010, 0x00);
if (LCNREV_IS(pi->pubpi.phy_rev, 1)) {
write_radio_reg(pi, RADIO_2064_REG060, 0x7f);
write_radio_reg(pi, RADIO_2064_REG061, 0x72);
write_radio_reg(pi, RADIO_2064_REG062, 0x7f);
}
write_radio_reg(pi, RADIO_2064_REG01D, 0x02);
write_radio_reg(pi, RADIO_2064_REG01E, 0x06);
mod_phy_reg(pi, 0x4ea, (0x7 << 0), 0 << 0);
mod_phy_reg(pi, 0x4ea, (0x7 << 3), 1 << 3);
mod_phy_reg(pi, 0x4ea, (0x7 << 6), 2 << 6);
mod_phy_reg(pi, 0x4ea, (0x7 << 9), 3 << 9);
mod_phy_reg(pi, 0x4ea, (0x7 << 12), 4 << 12);
write_phy_reg(pi, 0x4ea, 0x4688);
mod_phy_reg(pi, 0x4eb, (0x7 << 0), 2 << 0);
mod_phy_reg(pi, 0x4eb, (0x7 << 6), 0 << 6);
mod_phy_reg(pi, 0x46a, (0xffff << 0), 25 << 0);
wlc_lcnphy_set_tx_locc(pi, 0);
wlc_lcnphy_rcal(pi);
wlc_lcnphy_rc_cal(pi);
}
u8 phybw40;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
phybw40 = CHSPEC_IS40(pi->radio_chanspec);
static void wlc_lcnphy_radio_init(struct brcms_phy *pi)
{
wlc_radio_2064_init(pi);
}
pi_lcn->lcnphy_cal_counter = 0;
pi_lcn->lcnphy_cal_temper = pi_lcn->lcnphy_rawtempsense;
static void wlc_lcnphy_rcal(struct brcms_phy *pi)
{
u8 rcal_value;
or_phy_reg(pi, 0x44a, 0x80);
and_phy_reg(pi, 0x44a, 0x7f);
and_radio_reg(pi, RADIO_2064_REG05B, 0xfD);
wlc_lcnphy_afe_clk_init(pi, AFE_CLK_INIT_MODE_TXRX2X);
or_radio_reg(pi, RADIO_2064_REG004, 0x40);
or_radio_reg(pi, RADIO_2064_REG120, 0x10);
write_phy_reg(pi, 0x60a, 160);
or_radio_reg(pi, RADIO_2064_REG078, 0x80);
or_radio_reg(pi, RADIO_2064_REG129, 0x02);
write_phy_reg(pi, 0x46a, 25);
or_radio_reg(pi, RADIO_2064_REG057, 0x01);
wlc_lcnphy_baseband_init(pi);
or_radio_reg(pi, RADIO_2064_REG05B, 0x02);
mdelay(5);
SPINWAIT(!wlc_radio_2064_rcal_done(pi), 10 * 1000 * 1000);
wlc_lcnphy_radio_init(pi);
if (wlc_radio_2064_rcal_done(pi)) {
rcal_value = (u8) read_radio_reg(pi, RADIO_2064_REG05C);
rcal_value = rcal_value & 0x1f;
}
if (CHSPEC_IS2G(pi->radio_chanspec))
wlc_lcnphy_tx_pwr_ctrl_init((struct brcms_phy_pub *) pi);
and_radio_reg(pi, RADIO_2064_REG05B, 0xfD);
wlc_phy_chanspec_set((struct brcms_phy_pub *) pi, pi->radio_chanspec);
and_radio_reg(pi, RADIO_2064_REG057, 0xFE);
}
si_pmu_regcontrol(pi->sh->sih, 0, 0xf, 0x9);
static void wlc_lcnphy_rc_cal(struct brcms_phy *pi)
{
u8 dflt_rc_cal_val;
u16 flt_val;
si_pmu_chipcontrol(pi->sh->sih, 0, 0xffffffff, 0x03CDDDDD);
dflt_rc_cal_val = 7;
if (LCNREV_IS(pi->pubpi.phy_rev, 1))
dflt_rc_cal_val = 11;
flt_val =
(dflt_rc_cal_val << 10) | (dflt_rc_cal_val << 5) |
(dflt_rc_cal_val);
write_phy_reg(pi, 0x933, flt_val);
write_phy_reg(pi, 0x934, flt_val);
write_phy_reg(pi, 0x935, flt_val);
write_phy_reg(pi, 0x936, flt_val);
write_phy_reg(pi, 0x937, (flt_val & 0x1FF));
if ((pi->sh->boardflags & BFL_FEM)
&& wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))
wlc_lcnphy_set_tx_pwr_by_index(pi, FIXED_TXPWR);
return;
wlc_lcnphy_agc_temp_init(pi);
wlc_lcnphy_temp_adj(pi);
mod_phy_reg(pi, 0x448, (0x1 << 14), (1) << 14);
udelay(100);
mod_phy_reg(pi, 0x448, (0x1 << 14), (0) << 14);
wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_HW);
pi_lcn->lcnphy_noise_samples = LCNPHY_NOISE_SAMPLES_DEFAULT;
wlc_lcnphy_calib_modes(pi, PHY_PERICAL_PHYINIT);
}
static bool wlc_phy_txpwr_srom_read_lcnphy(struct brcms_phy *pi)
......@@ -4772,170 +4949,6 @@ void wlc_2064_vco_cal(struct brcms_phy *pi)
mod_radio_reg(pi, RADIO_2064_REG057, 1 << 3, 0);
}
static void
wlc_lcnphy_radio_2064_channel_tune_4313(struct brcms_phy *pi, u8 channel)
{
uint i;
const struct chan_info_2064_lcnphy *ci;
u8 rfpll_doubler = 0;
u8 pll_pwrup, pll_pwrup_ovr;
s32 qFxtal, qFref, qFvco, qFcal;
u8 d15, d16, f16, e44, e45;
u32 div_int, div_frac, fvco3, fpfd, fref3, fcal_div;
u16 loop_bw, d30, setCount;
ci = &chan_info_2064_lcnphy[0];
rfpll_doubler = 1;
mod_radio_reg(pi, RADIO_2064_REG09D, 0x4, 0x1 << 2);
write_radio_reg(pi, RADIO_2064_REG09E, 0xf);
if (!rfpll_doubler) {
loop_bw = PLL_2064_LOOP_BW;
d30 = PLL_2064_D30;
} else {
loop_bw = PLL_2064_LOOP_BW_DOUBLER;
d30 = PLL_2064_D30_DOUBLER;
}
if (CHSPEC_IS2G(pi->radio_chanspec)) {
for (i = 0; i < ARRAY_SIZE(chan_info_2064_lcnphy); i++)
if (chan_info_2064_lcnphy[i].chan == channel)
break;
if (i >= ARRAY_SIZE(chan_info_2064_lcnphy))
return;
ci = &chan_info_2064_lcnphy[i];
}
write_radio_reg(pi, RADIO_2064_REG02A, ci->logen_buftune);
mod_radio_reg(pi, RADIO_2064_REG030, 0x3, ci->logen_rccr_tx);
mod_radio_reg(pi, RADIO_2064_REG091, 0x3, ci->txrf_mix_tune_ctrl);
mod_radio_reg(pi, RADIO_2064_REG038, 0xf, ci->pa_input_tune_g);
mod_radio_reg(pi, RADIO_2064_REG030, 0x3 << 2,
(ci->logen_rccr_rx) << 2);
mod_radio_reg(pi, RADIO_2064_REG05E, 0xf, ci->pa_rxrf_lna1_freq_tune);
mod_radio_reg(pi, RADIO_2064_REG05E, (0xf) << 4,
(ci->pa_rxrf_lna2_freq_tune) << 4);
write_radio_reg(pi, RADIO_2064_REG06C, ci->rxrf_rxrf_spare1);
pll_pwrup = (u8) read_radio_reg(pi, RADIO_2064_REG044);
pll_pwrup_ovr = (u8) read_radio_reg(pi, RADIO_2064_REG12B);
or_radio_reg(pi, RADIO_2064_REG044, 0x07);
or_radio_reg(pi, RADIO_2064_REG12B, (0x07) << 1);
e44 = 0;
e45 = 0;
fpfd = rfpll_doubler ? (pi->xtalfreq << 1) : (pi->xtalfreq);
if (pi->xtalfreq > 26000000)
e44 = 1;
if (pi->xtalfreq > 52000000)
e45 = 1;
if (e44 == 0)
fcal_div = 1;
else if (e45 == 0)
fcal_div = 2;
else
fcal_div = 4;
fvco3 = (ci->freq * 3);
fref3 = 2 * fpfd;
qFxtal = wlc_lcnphy_qdiv_roundup(pi->xtalfreq, PLL_2064_MHZ, 16);
qFref = wlc_lcnphy_qdiv_roundup(fpfd, PLL_2064_MHZ, 16);
qFcal = pi->xtalfreq * fcal_div / PLL_2064_MHZ;
qFvco = wlc_lcnphy_qdiv_roundup(fvco3, 2, 16);
write_radio_reg(pi, RADIO_2064_REG04F, 0x02);
d15 = (pi->xtalfreq * fcal_div * 4 / 5) / PLL_2064_MHZ - 1;
write_radio_reg(pi, RADIO_2064_REG052, (0x07 & (d15 >> 2)));
write_radio_reg(pi, RADIO_2064_REG053, (d15 & 0x3) << 5);
d16 = (qFcal * 8 / (d15 + 1)) - 1;
write_radio_reg(pi, RADIO_2064_REG051, d16);
f16 = ((d16 + 1) * (d15 + 1)) / qFcal;
setCount = f16 * 3 * (ci->freq) / 32 - 1;
mod_radio_reg(pi, RADIO_2064_REG053, (0x0f << 0),
(u8) (setCount >> 8));
or_radio_reg(pi, RADIO_2064_REG053, 0x10);
write_radio_reg(pi, RADIO_2064_REG054, (u8) (setCount & 0xff));
div_int = ((fvco3 * (PLL_2064_MHZ >> 4)) / fref3) << 4;
div_frac = ((fvco3 * (PLL_2064_MHZ >> 4)) % fref3) << 4;
while (div_frac >= fref3) {
div_int++;
div_frac -= fref3;
}
div_frac = wlc_lcnphy_qdiv_roundup(div_frac, fref3, 20);
mod_radio_reg(pi, RADIO_2064_REG045, (0x1f << 0),
(u8) (div_int >> 4));
mod_radio_reg(pi, RADIO_2064_REG046, (0x1f << 4),
(u8) (div_int << 4));
mod_radio_reg(pi, RADIO_2064_REG046, (0x0f << 0),
(u8) (div_frac >> 16));
write_radio_reg(pi, RADIO_2064_REG047, (u8) (div_frac >> 8) & 0xff);
write_radio_reg(pi, RADIO_2064_REG048, (u8) div_frac & 0xff);
write_radio_reg(pi, RADIO_2064_REG040, 0xfb);
write_radio_reg(pi, RADIO_2064_REG041, 0x9A);
write_radio_reg(pi, RADIO_2064_REG042, 0xA3);
write_radio_reg(pi, RADIO_2064_REG043, 0x0C);
{
u8 h29, h23, c28, d29, h28_ten, e30, h30_ten, cp_current;
u16 c29, c38, c30, g30, d28;
c29 = loop_bw;
d29 = 200;
c38 = 1250;
h29 = d29 / c29;
h23 = 1;
c28 = 30;
d28 = (((PLL_2064_HIGH_END_KVCO - PLL_2064_LOW_END_KVCO) *
(fvco3 / 2 - PLL_2064_LOW_END_VCO)) /
(PLL_2064_HIGH_END_VCO - PLL_2064_LOW_END_VCO))
+ PLL_2064_LOW_END_KVCO;
h28_ten = (d28 * 10) / c28;
c30 = 2640;
e30 = (d30 - 680) / 490;
g30 = 680 + (e30 * 490);
h30_ten = (g30 * 10) / c30;
cp_current = ((c38 * h29 * h23 * 100) / h28_ten) / h30_ten;
mod_radio_reg(pi, RADIO_2064_REG03C, 0x3f, cp_current);
}
if (channel >= 1 && channel <= 5)
write_radio_reg(pi, RADIO_2064_REG03C, 0x8);
else
write_radio_reg(pi, RADIO_2064_REG03C, 0x7);
write_radio_reg(pi, RADIO_2064_REG03D, 0x3);
mod_radio_reg(pi, RADIO_2064_REG044, 0x0c, 0x0c);
udelay(1);
wlc_2064_vco_cal(pi);
write_radio_reg(pi, RADIO_2064_REG044, pll_pwrup);
write_radio_reg(pi, RADIO_2064_REG12B, pll_pwrup_ovr);
if (LCNREV_IS(pi->pubpi.phy_rev, 1)) {
write_radio_reg(pi, RADIO_2064_REG038, 3);
write_radio_reg(pi, RADIO_2064_REG091, 7);
}
}
bool wlc_phy_tpc_isenabled_lcnphy(struct brcms_phy *pi)
{
if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))
......@@ -5148,80 +5161,3 @@ s32 wlc_lcnphy_rx_signal_power(struct brcms_phy *pi, s32 gain_index)
return input_power_db;
}
static int
wlc_lcnphy_load_tx_iir_filter(struct brcms_phy *pi, bool is_ofdm, s16 filt_type)
{
s16 filt_index = -1;
int j;
u16 addr[] = {
0x910,
0x91e,
0x91f,
0x924,
0x925,
0x926,
0x920,
0x921,
0x927,
0x928,
0x929,
0x922,
0x923,
0x930,
0x931,
0x932
};
u16 addr_ofdm[] = {
0x90f,
0x900,
0x901,
0x906,
0x907,
0x908,
0x902,
0x903,
0x909,
0x90a,
0x90b,
0x904,
0x905,
0x90c,
0x90d,
0x90e
};
if (!is_ofdm) {
for (j = 0; j < LCNPHY_NUM_TX_DIG_FILTERS_CCK; j++) {
if (filt_type == LCNPHY_txdigfiltcoeffs_cck[j][0]) {
filt_index = (s16) j;
break;
}
}
if (filt_index != -1) {
for (j = 0; j < LCNPHY_NUM_DIG_FILT_COEFFS; j++)
write_phy_reg(pi, addr[j],
LCNPHY_txdigfiltcoeffs_cck
[filt_index][j + 1]);
}
} else {
for (j = 0; j < LCNPHY_NUM_TX_DIG_FILTERS_OFDM; j++) {
if (filt_type == LCNPHY_txdigfiltcoeffs_ofdm[j][0]) {
filt_index = (s16) j;
break;
}
}
if (filt_index != -1) {
for (j = 0; j < LCNPHY_NUM_DIG_FILT_COEFFS; j++)
write_phy_reg(pi, addr_ofdm[j],
LCNPHY_txdigfiltcoeffs_ofdm
[filt_index][j + 1]);
}
}
return (filt_index != -1) ? 0 : -1;
}
drivers/staging/brcm80211/brcmsmac/phy/phy_n.c
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