提交 544393fe 编写于 作者: T Thomas Winischhofer 提交者: Linus Torvalds

[PATCH] sisfb update

This lifts sisfb from version 1.7.17 to version 1.8.9. Changes include:

- Added support for XGI V3XT, V5, V8, Z7 chipsets, including POSTing of
  all of these chipsets.

- Added support for latest SiS chipsets (761).

- Added support for SiS76x memory "hybrid" mode.

- Added support for new LCD resolutions (eg 1280x854, 856x480).

- Fixed support for 320x240 STN panels (for embedded devices).

- Fixed many HDTV modes (525p, 750p, 1080i).

- Fixed PCI config register reading/writing to use proper kernel
  functions for this purpose.

- Fixed PCI ROM handling to use the kernel's proper functions.

- Removed lots of "typedef"s.

- Removed lots of code which was for X.org/XFree86 only.

- Fixed coding style in many places.

- Removed lots of 2.4 cruft.

- Reduced stack size by unifying two previously separate structs into
  one.

- Added new hooks for memory allocation (for DRM).  Now the driver can
  truly handle multiple cards, including memory management.

- Fixed numerous minor bugs.
Signed-off-by: NThomas Winischhofer <thomas@winischhofer.net>
Cc: "Antonino A. Daplas" <adaplas@pol.net>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
上级 5c06e2aa
......@@ -1079,15 +1079,16 @@ config FB_SAVAGE_ACCEL
choose N here.
config FB_SIS
tristate "SiS acceleration"
tristate "SiS/XGI display support"
depends on FB && PCI
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
select FB_SOFT_CURSOR
help
This is the frame buffer device driver for the SiS 300, 315 and
330 series VGA chipsets. Specs available at <http://www.sis.com>
This is the frame buffer device driver for the SiS 300, 315, 330
and 340 series as well as XGI V3XT, V5, V8, Z7 graphics chipsets.
Specs available at <http://www.sis.com> and <http://www.xgitech.com>.
To compile this driver as a module, choose M here; the module
will be called sisfb.
......@@ -1099,11 +1100,12 @@ config FB_SIS_300
Say Y here to support use of the SiS 300/305, 540, 630 and 730.
config FB_SIS_315
bool "SiS 315/330 series support"
bool "SiS 315/330/340 series and XGI support"
depends on FB_SIS
help
Say Y here to support use of the SiS 315 and 330 series
(315/H/PRO, 55x, 650, 651, 740, 330, 661, 741, 760).
Say Y here to support use of the SiS 315, 330 and 340 series
(315/H/PRO, 55x, 650, 651, 740, 330, 661, 741, 760, 761) as well
as XGI V3XT, V5, V8 and Z7.
config FB_NEOMAGIC
tristate "NeoMagic display support"
......
此差异已折叠。
此差异已折叠。
......@@ -4,4 +4,4 @@
obj-$(CONFIG_FB_SIS) += sisfb.o
sisfb-objs := sis_main.o sis_accel.o init.o init301.o
sisfb-objs := sis_main.o sis_accel.o init.o init301.o initextlfb.o
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
......@@ -3,7 +3,7 @@
/*
* Global definitions for init.c and init301.c
*
* Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria
* Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
*
* If distributed as part of the Linux kernel, the following license terms
* apply:
......@@ -53,19 +53,20 @@
#ifndef _INITDEF_
#define _INITDEF_
#define IS_SIS330 (HwInfo->jChipType == SIS_330)
#define IS_SIS550 (HwInfo->jChipType == SIS_550)
#define IS_SIS650 (HwInfo->jChipType == SIS_650) /* All versions, incl 651, M65x */
#define IS_SIS740 (HwInfo->jChipType == SIS_740)
#define IS_SIS330 (SiS_Pr->ChipType == SIS_330)
#define IS_SIS550 (SiS_Pr->ChipType == SIS_550)
#define IS_SIS650 (SiS_Pr->ChipType == SIS_650) /* All versions, incl 651, M65x */
#define IS_SIS740 (SiS_Pr->ChipType == SIS_740)
#define IS_SIS651 (SiS_Pr->SiS_SysFlags & (SF_Is651 | SF_Is652))
#define IS_SISM650 (SiS_Pr->SiS_SysFlags & (SF_IsM650 | SF_IsM652 | SF_IsM653))
#define IS_SIS65x (IS_SIS651 || IS_SISM650) /* Only special versions of 65x */
#define IS_SIS661 (HwInfo->jChipType == SIS_661)
#define IS_SIS741 (HwInfo->jChipType == SIS_741)
#define IS_SIS660 (HwInfo->jChipType == SIS_660)
#define IS_SIS760 (HwInfo->jChipType == SIS_760)
#define IS_SIS661741660760 (IS_SIS661 || IS_SIS741 || IS_SIS660 || IS_SIS760)
#define IS_SIS650740 ((HwInfo->jChipType >= SIS_650) && (HwInfo->jChipType < SIS_330))
#define IS_SIS661 (SiS_Pr->ChipType == SIS_661)
#define IS_SIS741 (SiS_Pr->ChipType == SIS_741)
#define IS_SIS660 (SiS_Pr->ChipType == SIS_660)
#define IS_SIS760 (SiS_Pr->ChipType == SIS_760)
#define IS_SIS761 (SiS_Pr->ChipType == SIS_761)
#define IS_SIS661741660760 (IS_SIS661 || IS_SIS741 || IS_SIS660 || IS_SIS760 || IS_SIS761)
#define IS_SIS650740 ((SiS_Pr->ChipType >= SIS_650) && (SiS_Pr->ChipType < SIS_330))
#define IS_SIS550650740 (IS_SIS550 || IS_SIS650740)
#define IS_SIS650740660 (IS_SIS650 || IS_SIS740 || IS_SIS661741660760)
#define IS_SIS550650740660 (IS_SIS550 || IS_SIS650740660)
......@@ -80,17 +81,30 @@
#define VB_SIS302LV 0x0010
#define VB_SIS302ELV 0x0020
#define VB_SIS301C 0x0040
#define VB_SIS307T 0x0080
#define VB_SIS307LV 0x0100
#define VB_UMC 0x4000
#define VB_NoLCD 0x8000
#define VB_SIS301BLV302BLV (VB_SIS301B|VB_SIS301C|VB_SIS302B|VB_SIS301LV|VB_SIS302LV|VB_SIS302ELV)
#define VB_SIS301B302B (VB_SIS301B|VB_SIS301C|VB_SIS302B)
#define VB_SIS301LV302LV (VB_SIS301LV|VB_SIS302LV|VB_SIS302ELV)
#define VB_SISVB (VB_SIS301 | VB_SIS301BLV302BLV)
#define VB_SISTMDS (VB_SIS301 | VB_SIS301B302B)
#define VB_SISLVDS VB_SIS301LV302LV
#define VB_SISLCDA (VB_SIS302B|VB_SIS301C|VB_SIS301LV|VB_SIS302LV|VB_SIS302ELV)
#define VB_SISYPBPR (VB_SIS301C|VB_SIS301LV|VB_SIS302LV|VB_SIS302ELV)
#define VB_SISHIVISION (VB_SIS301|VB_SIS301B|VB_SIS302B)
#define VB_SIS30xB (VB_SIS301B | VB_SIS301C | VB_SIS302B | VB_SIS307T)
#define VB_SIS30xC (VB_SIS301C | VB_SIS307T)
#define VB_SISTMDS (VB_SIS301 | VB_SIS301B | VB_SIS301C | VB_SIS302B | VB_SIS307T)
#define VB_SISLVDS (VB_SIS301LV | VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
#define VB_SIS30xBLV (VB_SIS30xB | VB_SISLVDS)
#define VB_SIS30xCLV (VB_SIS30xC | VB_SIS302ELV | VB_SIS307LV)
#define VB_SISVB (VB_SIS301 | VB_SIS30xBLV)
#define VB_SISLCDA (VB_SIS302B | VB_SIS301C | VB_SIS307T | VB_SISLVDS)
#define VB_SISTMDSLCDA (VB_SIS301C | VB_SIS307T)
#define VB_SISPART4SCALER (VB_SIS301C | VB_SIS307T | VB_SIS302ELV | VB_SIS307LV)
#define VB_SISHIVISION (VB_SIS301 | VB_SIS301B | VB_SIS302B)
#define VB_SISYPBPR (VB_SIS301C | VB_SIS307T | VB_SIS301LV | VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
#define VB_SISTAP4SCALER (VB_SIS301C | VB_SIS307T | VB_SIS302ELV | VB_SIS307LV)
#define VB_SISPART4OVERFLOW (VB_SIS301C | VB_SIS307T | VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
#define VB_SISPWD (VB_SIS301C | VB_SIS307T | VB_SISLVDS)
#define VB_SISEMI (VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
#define VB_SISPOWER (VB_SIS301C | VB_SIS307T | VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
#define VB_SISDUALLINK (VB_SIS302LV | VB_SIS302ELV | VB_SIS307T | VB_SIS307LV)
#define VB_SISVGA2 VB_SISTMDS
#define VB_SISRAMDAC202 (VB_SIS301C | VB_SIS307T)
/* VBInfo */
#define SetSimuScanMode 0x0001 /* CR 30 */
......@@ -160,6 +174,7 @@
#define SupportRAMDAC2_202 0x0400 /* C (<= 202Mhz) */
#define InterlaceMode 0x0080
#define SyncPP 0x0000
#define HaveWideTiming 0x2000 /* Have specific wide- and non-wide timing */
#define SyncPN 0x4000
#define SyncNP 0x8000
#define SyncNN 0xc000
......@@ -188,6 +203,7 @@
#define TVSetTVSimuMode 0x0200 /* new 0x200, prev. 0x800 */
#define TVRPLLDIV2XO 0x0400 /* prev 0x1000 */
#define TVSetNTSC1024 0x0800 /* new 0x100, prev. 0x2000 */
#define TVSet525p1024 0x1000 /* TW */
#define TVAspect43 0x2000
#define TVAspect169 0x4000
#define TVAspect43LB 0x8000
......@@ -208,7 +224,8 @@
#define SF_IsM661 0x0020
#define SF_IsM741 0x0040
#define SF_IsM760 0x0080
#define SF_760LFB 0x8000 /* 760: We have LFB */
#define SF_760UMA 0x4000 /* 76x: We have UMA */
#define SF_760LFB 0x8000 /* 76x: We have LFB */
/* CR32 (Newer 630, and 315 series)
......@@ -228,7 +245,6 @@
#define TVOverScanShift 4
/* CR35 (661 series only)
[0] 1 = PAL, 0 = NTSC
[1] 1 = NTSC-J (if D0 = 0)
[2] 1 = PALM (if D0 = 1)
......@@ -239,14 +255,9 @@
001 525p
010 750p
011 1080i (or HiVision on 301, 301B)
These bits are being translated to TVMode flag.
*/
/*
CR37
/* CR37
[0] Set 24/18 bit (0/1) RGB to LVDS/TMDS transmitter (set by BIOS)
[3:1] External chip
300 series:
......@@ -260,7 +271,7 @@
010 LVDS
011 LVDS + Chrontel 7019
660 series [2:1] only:
reserved (now in CR38)
reserved (chip type now in CR38)
All other combinations reserved
[3] 661 only: Pass 1:1 data
[4] LVDS: 0: Panel Link expands / 1: Panel Link does not expand
......@@ -320,6 +331,7 @@
#define Enable302LV_DualLink 0x04 /* 302LV only; enable dual link */
/* CR39 (661 and later)
D[7] LVDS (SiS or third party)
D[1:0] YPbPr Aspect Ratio
00 4:3 letterbox
01 4:3
......@@ -350,6 +362,26 @@
[7] TV UnderScan/OverScan (set by BIOS)
*/
/* CR7C - 661 and later
[7] DualEdge enabled (or: to be enabled)
[6] CRT2 = TV/LCD/VGA enabled (or: to be enabled)
[5] Init done (set at end of SiS_Init)
{4] LVDS LCD capabilities
[3] LVDS LCD capabilities
[2] LVDS LCD capabilities (PWD)
[1] LVDS LCD capabilities (PWD)
[0] LVDS=1, TMDS=0 (SiS or third party)
*/
/* CR7E - 661 and later
VBType:
[7] LVDS (third party)
[3] 301C
[2] 302LV
[1] 301LV
[0] 301B
*/
/* LCDResInfo */
#define Panel300_800x600 0x01 /* CR36 */
#define Panel300_1024x768 0x02
......@@ -359,7 +391,6 @@
#define Panel300_1024x600 0x06
#define Panel300_1152x768 0x07
#define Panel300_1280x768 0x0a
#define Panel300_320x480 0x0e /* fstn - This is fake, can be any */
#define Panel300_Custom 0x0f
#define Panel300_Barco1366 0x10
......@@ -374,9 +405,9 @@
#define Panel310_1400x1050 0x09
#define Panel310_1280x768 0x0a
#define Panel310_1600x1200 0x0b
#define Panel310_640x480_2 0x0c
#define Panel310_640x480_3 0x0d
#define Panel310_320x480 0x0e /* fstn - TW: This is fake, can be any */
#define Panel310_320x240_2 0x0c /* xSTN */
#define Panel310_320x240_3 0x0d /* xSTN */
#define Panel310_320x240_1 0x0e /* xSTN - This is fake, can be any */
#define Panel310_Custom 0x0f
#define Panel661_800x600 0x01
......@@ -386,7 +417,7 @@
#define Panel661_1024x600 0x05
#define Panel661_1152x864 0x06
#define Panel661_1280x960 0x07
#define Panel661_1152x768 0x08
#define Panel661_1280x854 0x08
#define Panel661_1400x1050 0x09
#define Panel661_1280x768 0x0a
#define Panel661_1600x1200 0x0b
......@@ -410,14 +441,16 @@
#define Panel_1680x1050 0x0d /* 661etc */
#define Panel_1280x720 0x0e /* 661etc */
#define Panel_Custom 0x0f /* MUST BE 0x0f (for DVI DDC detection) */
#define Panel_320x480 0x10 /* SiS 550 fstn - TW: This is fake, can be any */
#define Panel_320x240_1 0x10 /* SiS 550 xSTN */
#define Panel_Barco1366 0x11
#define Panel_848x480 0x12
#define Panel_640x480_2 0x13 /* SiS 550 */
#define Panel_640x480_3 0x14 /* SiS 550 */
#define Panel_320x240_2 0x13 /* SiS 550 xSTN */
#define Panel_320x240_3 0x14 /* SiS 550 xSTN */
#define Panel_1280x768_2 0x15 /* 30xLV */
#define Panel_1280x768_3 0x16 /* (unused) */
#define Panel_1280x800_2 0x17 /* 30xLV */
#define Panel_856x480 0x18
#define Panel_1280x854 0x19 /* 661etc */
/* Index in ModeResInfo table */
#define SIS_RI_320x200 0
......@@ -454,6 +487,7 @@
#define SIS_RI_1920x1080 31
#define SIS_RI_960x540 32
#define SIS_RI_960x600 33
#define SIS_RI_1280x854 34
/* CR5F */
#define IsM650 0x80
......@@ -482,16 +516,18 @@
#define VCLK100_300 0x43 /* Index in VCLKData table (300) */
#define VCLK34_300 0x3d /* Index in VCLKData table (300) */
#define VCLK_CUSTOM_300 0x47
#define VCLK65_315 0x0b /* Index in (VB)VCLKData table (315) */
#define VCLK108_2_315 0x19 /* Index in (VB)VCLKData table (315) */
#define VCLK81_315 0x5b /* Index in (VB)VCLKData table (315) */
#define VCLK162_315 0x5e /* Index in (VB)VCLKData table (315) */
#define VCLK108_3_315 0x45 /* Index in VBVCLKData table (315) */
#define VCLK100_315 0x46 /* Index in VBVCLKData table (315) */
#define VCLK65_315 0x0b /* Indices in (VB)VCLKData table (315) */
#define VCLK108_2_315 0x19
#define VCLK81_315 0x5b
#define VCLK162_315 0x5e
#define VCLK108_3_315 0x45
#define VCLK100_315 0x46
#define VCLK34_315 0x55
#define VCLK68_315 0x0d
#define VCLK_1280x800_315_2 0x5c /* Index in VBVCLKData table (315) */
#define VCLK121_315 0x5d /* Index in VBVCLKData table (315) */
#define VCLK_1280x800_315_2 0x5c
#define VCLK121_315 0x5d
#define VCLK130_315 0x72
#define VCLK_1280x720 0x5f
#define VCLK_1280x768_2 0x60
#define VCLK_1280x768_3 0x61 /* (unused?) */
......@@ -507,6 +543,7 @@
#define VCLK_1152x864 0x64
#define VCLK_1360x768 0x58
#define VCLK_1280x800_315 0x6c
#define VCLK_1280x854 0x76
#define TVCLKBASE_300 0x21 /* Indices on TV clocks in VCLKData table (300) */
#define TVCLKBASE_315 0x3a /* Indices on TV clocks in (VB)VCLKData table (315) */
......
/*
* SiS 300/540/630[S]/730[S]
* SiS 315[E|PRO]/550/[M]65x/[M]66x[F|M|G]X/[M]74x[GX]/330/[M]76x[GX]
* XGI V3XT/V5/V8, Z7
* frame buffer driver for Linux kernels >= 2.4.14 and >=2.6.3
*
* Linux kernel specific extensions to init.c/init301.c
*
* Copyright (C) 2001-2005 Thomas Winischhofer, Vienna, Austria.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the named License,
* or any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
*
* Author: Thomas Winischhofer <thomas@winischhofer.net>
*/
#include "osdef.h"
#include "initdef.h"
#include "vgatypes.h"
#include "vstruct.h"
#include <linux/config.h>
#include <linux/version.h>
#include <linux/types.h>
#include <linux/fb.h>
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
int sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr,
unsigned char modeno, unsigned char rateindex);
int sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno,
unsigned char rateindex, struct fb_var_screeninfo *var);
#endif
BOOLEAN sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno,
int *htotal, int *vtotal, unsigned char rateindex);
extern BOOLEAN SiSInitPtr(struct SiS_Private *SiS_Pr);
extern BOOLEAN SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo,
unsigned short *ModeIdIndex);
extern void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata,
int xres, int yres, struct fb_var_screeninfo *var, BOOLEAN writeres);
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
int
sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr, unsigned char modeno,
unsigned char rateindex)
{
unsigned short ModeNo = modeno;
unsigned short ModeIdIndex = 0, ClockIndex = 0;
unsigned short RRTI = 0;
int Clock;
if(!SiSInitPtr(SiS_Pr)) return 65000;
if(rateindex > 0) rateindex--;
#ifdef SIS315H
switch(ModeNo) {
case 0x5a: ModeNo = 0x50; break;
case 0x5b: ModeNo = 0x56;
}
#endif
if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) {;
printk(KERN_ERR "Could not find mode %x\n", ModeNo);
return 65000;
}
RRTI = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & HaveWideTiming) {
if(SiS_Pr->SiS_UseWide == 1) {
/* Wide screen: Ignore rateindex */
ClockIndex = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRTVCLK_WIDE;
} else {
RRTI += rateindex;
ClockIndex = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRTVCLK_NORM;
}
} else {
RRTI += rateindex;
ClockIndex = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRTVCLK;
}
Clock = SiS_Pr->SiS_VCLKData[ClockIndex].CLOCK * 1000;
return Clock;
}
int
sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno,
unsigned char rateindex, struct fb_var_screeninfo *var)
{
unsigned short ModeNo = modeno;
unsigned short ModeIdIndex = 0, index = 0, RRTI = 0;
int j;
if(!SiSInitPtr(SiS_Pr)) return 0;
if(rateindex > 0) rateindex--;
#ifdef SIS315H
switch(ModeNo) {
case 0x5a: ModeNo = 0x50; break;
case 0x5b: ModeNo = 0x56;
}
#endif
if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return 0;
RRTI = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & HaveWideTiming) {
if(SiS_Pr->SiS_UseWide == 1) {
/* Wide screen: Ignore rateindex */
index = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRT1CRTC_WIDE;
} else {
RRTI += rateindex;
index = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRT1CRTC_NORM;
}
} else {
RRTI += rateindex;
index = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRT1CRTC;
}
SiS_Generic_ConvertCRData(SiS_Pr,
(unsigned char *)&SiS_Pr->SiS_CRT1Table[index].CR[0],
SiS_Pr->SiS_RefIndex[RRTI].XRes,
SiS_Pr->SiS_RefIndex[RRTI].YRes,
var, FALSE);
if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & 0x8000)
var->sync &= ~FB_SYNC_VERT_HIGH_ACT;
else
var->sync |= FB_SYNC_VERT_HIGH_ACT;
if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & 0x4000)
var->sync &= ~FB_SYNC_HOR_HIGH_ACT;
else
var->sync |= FB_SYNC_HOR_HIGH_ACT;
var->vmode = FB_VMODE_NONINTERLACED;
if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & 0x0080)
var->vmode = FB_VMODE_INTERLACED;
else {
j = 0;
while(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID != 0xff) {
if(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID ==
SiS_Pr->SiS_RefIndex[RRTI].ModeID) {
if(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeFlag & DoubleScanMode) {
var->vmode = FB_VMODE_DOUBLE;
}
break;
}
j++;
}
}
if((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
#if 0 /* Do this? */
var->upper_margin <<= 1;
var->lower_margin <<= 1;
var->vsync_len <<= 1;
#endif
} else if((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
var->upper_margin >>= 1;
var->lower_margin >>= 1;
var->vsync_len >>= 1;
}
return 1;
}
#endif /* Linux >= 2.5 */
BOOLEAN
sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno, int *htotal,
int *vtotal, unsigned char rateindex)
{
unsigned short ModeNo = modeno;
unsigned short ModeIdIndex = 0, CRT1Index = 0;
unsigned short RRTI = 0;
unsigned char sr_data, cr_data, cr_data2;
if(!SiSInitPtr(SiS_Pr)) return FALSE;
if(rateindex > 0) rateindex--;
#ifdef SIS315H
switch(ModeNo) {
case 0x5a: ModeNo = 0x50; break;
case 0x5b: ModeNo = 0x56;
}
#endif
if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE;
RRTI = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & HaveWideTiming) {
if(SiS_Pr->SiS_UseWide == 1) {
/* Wide screen: Ignore rateindex */
CRT1Index = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRT1CRTC_WIDE;
} else {
RRTI += rateindex;
CRT1Index = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRT1CRTC_NORM;
}
} else {
RRTI += rateindex;
CRT1Index = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRT1CRTC;
}
sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[14];
cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[0];
*htotal = (((cr_data & 0xff) | ((unsigned short) (sr_data & 0x03) << 8)) + 5) * 8;
sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[13];
cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[6];
cr_data2 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[7];
*vtotal = ((cr_data & 0xFF) |
((unsigned short)(cr_data2 & 0x01) << 8) |
((unsigned short)(cr_data2 & 0x20) << 4) |
((unsigned short)(sr_data & 0x01) << 10)) + 2;
if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & InterlaceMode)
*vtotal *= 2;
return TRUE;
}
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......@@ -3,7 +3,7 @@
/*
* OS depending defines
*
* Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria
* Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
*
* If distributed as part of the Linux kernel, the following license terms
* apply:
......@@ -55,8 +55,11 @@
#define _SIS_OSDEF_H_
/* The choices are: */
#define LINUX_KERNEL /* Linux kernel framebuffer */
/* #define LINUX_XF86 */ /* XFree86/X.org */
#define SIS_LINUX_KERNEL /* Linux kernel framebuffer */
#undef SIS_XORG_XF86 /* XFree86/X.org */
#undef SIS_LINUX_KERNEL_24
#undef SIS_LINUX_KERNEL_26
#ifdef OutPortByte
#undef OutPortByte
......@@ -86,8 +89,9 @@
/* LINUX KERNEL */
/**********************************************************************/
#ifdef LINUX_KERNEL
#ifdef SIS_LINUX_KERNEL
#include <linux/config.h>
#include <linux/version.h>
#ifdef CONFIG_FB_SIS_300
#define SIS300
......@@ -97,6 +101,12 @@
#define SIS315H
#endif
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
#define SIS_LINUX_KERNEL_26
#else
#define SIS_LINUX_KERNEL_24
#endif
#if !defined(SIS300) && !defined(SIS315H)
#warning Neither CONFIG_FB_SIS_300 nor CONFIG_FB_SIS_315 is set
#warning sisfb will not work!
......@@ -109,13 +119,15 @@
#define InPortWord(p) inw((SISIOADDRESS)(p))
#define InPortLong(p) inl((SISIOADDRESS)(p))
#define SiS_SetMemory(MemoryAddress,MemorySize,value) memset_io(MemoryAddress, value, MemorySize)
#endif
#endif /* LINUX_KERNEL */
/**********************************************************************/
/* XFree86/X.org */
/**********************************************************************/
#ifdef LINUX_XF86
#ifdef SIS_XORG_XF86
#define SIS300
#define SIS315H
......@@ -126,6 +138,7 @@
#define InPortWord(p) inSISREGW((IOADDRESS)(p))
#define InPortLong(p) inSISREGL((IOADDRESS)(p))
#define SiS_SetMemory(MemoryAddress,MemorySize,value) memset(MemoryAddress, value, MemorySize)
#endif
#endif /* XF86 */
#endif /* _OSDEF_H_ */
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/*
* SiS 300/630/730/540/315/550/650/740 frame buffer driver
* for Linux kernels 2.4.x and 2.5.x
* SiS 300/540/630[S]/730[S],
* SiS 315[E|PRO]/550/[M]650/651/[M]661[F|M]X/740/[M]741[GX]/330/[M]760[GX],
* XGI V3XT/V5/V8, Z7
* frame buffer driver for Linux kernels >= 2.4.14 and >=2.6.3
*
* 2D acceleration part
*
......@@ -281,6 +283,8 @@
#define SiS310Idle \
{ \
while( (MMIO_IN16(ivideo->mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
while( (MMIO_IN16(ivideo->mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
while( (MMIO_IN16(ivideo->mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
while( (MMIO_IN16(ivideo->mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
CmdQueLen = 0; \
......@@ -402,6 +406,7 @@ void fbcon_sis_clear32(struct vc_data *conp, struct display *p, int srcy,
int srcx, int height, int width);
#endif
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,34)
int fbcon_sis_sync(struct fb_info *info);
void fbcon_sis_fillrect(struct fb_info *info, const struct fb_fillrect *rect);
void fbcon_sis_copyarea(struct fb_info *info, const struct fb_copyarea *area);
#endif
......
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此差异已折叠。
......@@ -107,6 +107,8 @@
#define FB_ACCEL_NV_20 44 /* nVidia Arch 20 */
#define FB_ACCEL_NV_30 45 /* nVidia Arch 30 */
#define FB_ACCEL_NV_40 46 /* nVidia Arch 40 */
#define FB_ACCEL_XGI_VOLARI_V 47 /* XGI Volari V3XT, V5, V8 */
#define FB_ACCEL_XGI_VOLARI_Z 48 /* XGI Volari Z7 */
#define FB_ACCEL_NEOMAGIC_NM2070 90 /* NeoMagic NM2070 */
#define FB_ACCEL_NEOMAGIC_NM2090 91 /* NeoMagic NM2090 */
#define FB_ACCEL_NEOMAGIC_NM2093 92 /* NeoMagic NM2093 */
......
此差异已折叠。
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