mmc: core: Fix sequence for I/O voltage in DDR mode for eMMC
Even (e)MMC card can support 3.3v to 1.2v vccq in DDR, but not all host controller can support this, like some of the SDHCI host which connect to an eMMC device. Some of these host controller still needs to use 1.8v vccq for supporting DDR mode. So the sequence will be: if (host and device can both support 1.2v IO) use 1.2v IO; else if (host and device can both support 1.8v IO) use 1.8v IO; so if host and device can only support 3.3v IO, this is the last choice. Signed-off-by: NChuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: NYunpeng Gao <yunpeng.gao@intel.com> Tested-by: NJean-Michel Hautbois <jhautbois@gmail.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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