提交 11d64be6 编写于 作者: L Linus Torvalds

Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6

* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (46 commits)
  sh: Fix multiple UTLB hit on UP SH-4.
  sh: fix pci io access for r2d boards
  sh: fix ioreadN_rep and iowriteN_rep
  sh: use ctrl_in/out for on chip pci access
  sh: Kill off more dead symbols.
  sh: __uncached_start only on sh32.
  sh: asm/irq.h needs asm/cpu/irq.h.
  serial: sh-sci: Fix up SH-5 build.
  sh: Get SH-5 caches working again post-unification.
  maple: Fix up maple build failure.
  sh: Kill off bogus SH_SDK7780_STANDALONE symbol.
  sh: asm/tlb.h needs linux/pagemap.h for CONFIG_SWAP=n.
  sh: Tidy include/asm-sh/hp6xx.h
  maple: improve detection of attached peripherals
  sh: Shut up some trivial build warnings.
  sh: Update SH-5 flush_cache_sigtramp() for API changes.
  sh: Fix up set_fixmap_nocache() for SH-5.
  sh: Fix up pte_mkhuge() build breakage for SH-5.
  sh: Disable big endian for SH-5.
  sh: Handle SH7366 CPU in check_bugs().
  ...
...@@ -93,6 +93,9 @@ config ARCH_NO_VIRT_TO_BUS ...@@ -93,6 +93,9 @@ config ARCH_NO_VIRT_TO_BUS
config ARCH_SUPPORTS_AOUT config ARCH_SUPPORTS_AOUT
def_bool y def_bool y
config IO_TRAPPED
bool
source "init/Kconfig" source "init/Kconfig"
menu "System type" menu "System type"
...@@ -312,6 +315,13 @@ config CPU_SUBTYPE_SH7722 ...@@ -312,6 +315,13 @@ config CPU_SUBTYPE_SH7722
select ARCH_SPARSEMEM_ENABLE select ARCH_SPARSEMEM_ENABLE
select SYS_SUPPORTS_NUMA select SYS_SUPPORTS_NUMA
config CPU_SUBTYPE_SH7366
bool "Support SH7366 processor"
select CPU_SH4AL_DSP
select CPU_SHX2
select ARCH_SPARSEMEM_ENABLE
select SYS_SUPPORTS_NUMA
# SH-5 Processor Support # SH-5 Processor Support
config CPU_SUBTYPE_SH5_101 config CPU_SUBTYPE_SH5_101
...@@ -456,6 +466,7 @@ config SH_RTS7751R2D ...@@ -456,6 +466,7 @@ config SH_RTS7751R2D
bool "RTS7751R2D" bool "RTS7751R2D"
depends on CPU_SUBTYPE_SH7751R depends on CPU_SUBTYPE_SH7751R
select SYS_SUPPORTS_PCI select SYS_SUPPORTS_PCI
select IO_TRAPPED
help help
Select RTS7751R2D if configuring for a Renesas Technology Select RTS7751R2D if configuring for a Renesas Technology
Sales SH-Graphics board. Sales SH-Graphics board.
...@@ -472,6 +483,14 @@ config SH_HIGHLANDER ...@@ -472,6 +483,14 @@ config SH_HIGHLANDER
bool "Highlander" bool "Highlander"
depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
select SYS_SUPPORTS_PCI select SYS_SUPPORTS_PCI
select IO_TRAPPED
config SH_MIGOR
bool "Migo-R"
depends on CPU_SUBTYPE_SH7722
help
Select Migo-R if configuring for the SH7722 Migo-R platform
by Renesas System Solutions Asia Pte. Ltd.
config SH_EDOSK7705 config SH_EDOSK7705
bool "EDOSK7705" bool "EDOSK7705"
......
...@@ -12,6 +12,7 @@ config CPU_LITTLE_ENDIAN ...@@ -12,6 +12,7 @@ config CPU_LITTLE_ENDIAN
config CPU_BIG_ENDIAN config CPU_BIG_ENDIAN
bool "Big Endian" bool "Big Endian"
depends on !CPU_SH5
endchoice endchoice
...@@ -87,9 +88,6 @@ config SH64_ID2815_WORKAROUND ...@@ -87,9 +88,6 @@ config SH64_ID2815_WORKAROUND
config CPU_HAS_INTEVT config CPU_HAS_INTEVT
bool bool
config CPU_HAS_MASKREG_IRQ
bool
config CPU_HAS_IPR_IRQ config CPU_HAS_IPR_IRQ
bool bool
......
...@@ -30,6 +30,7 @@ config EARLY_SCIF_CONSOLE_PORT ...@@ -30,6 +30,7 @@ config EARLY_SCIF_CONSOLE_PORT
hex hex
depends on EARLY_SCIF_CONSOLE depends on EARLY_SCIF_CONSOLE
default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763 default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763
default "0xffe00000" if CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366
default "0xffea0000" if CPU_SUBTYPE_SH7785 default "0xffea0000" if CPU_SUBTYPE_SH7785
default "0xfffe8000" if CPU_SUBTYPE_SH7203 default "0xfffe8000" if CPU_SUBTYPE_SH7203
default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263 default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263
......
...@@ -116,6 +116,7 @@ machdir-$(CONFIG_SH_RTS7751R2D) += renesas/rts7751r2d ...@@ -116,6 +116,7 @@ machdir-$(CONFIG_SH_RTS7751R2D) += renesas/rts7751r2d
machdir-$(CONFIG_SH_7751_SYSTEMH) += renesas/systemh machdir-$(CONFIG_SH_7751_SYSTEMH) += renesas/systemh
machdir-$(CONFIG_SH_EDOSK7705) += renesas/edosk7705 machdir-$(CONFIG_SH_EDOSK7705) += renesas/edosk7705
machdir-$(CONFIG_SH_HIGHLANDER) += renesas/r7780rp machdir-$(CONFIG_SH_HIGHLANDER) += renesas/r7780rp
machdir-$(CONFIG_SH_MIGOR) += renesas/migor
machdir-$(CONFIG_SH_SDK7780) += renesas/sdk7780 machdir-$(CONFIG_SH_SDK7780) += renesas/sdk7780
machdir-$(CONFIG_SH_7710VOIPGW) += renesas/sh7710voipgw machdir-$(CONFIG_SH_7710VOIPGW) += renesas/sh7710voipgw
machdir-$(CONFIG_SH_X3PROTO) += renesas/x3proto machdir-$(CONFIG_SH_X3PROTO) += renesas/x3proto
......
/*
* Renesas System Solutions Asia Pte. Ltd - Migo-R
*
* Copyright (C) 2008 Magnus Damm
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <asm/machvec.h>
#include <asm/io.h>
/* Address IRQ Size Bus Description
* 0x00000000 64MB 16 NOR Flash (SP29PL256N)
* 0x0c000000 64MB 64 SDRAM (2xK4M563233G)
* 0x10000000 IRQ0 16 Ethernet (SMC91C111)
* 0x14000000 IRQ4 16 USB 2.0 Host Controller (M66596)
* 0x18000000 8GB 8 NAND Flash (K9K8G08U0A)
*/
static struct resource smc91x_eth_resources[] = {
[0] = {
.name = "smc91x-regs" ,
.start = P2SEGADDR(0x10000300),
.end = P2SEGADDR(0x1000030f),
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 32, /* IRQ0 */
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH,
},
};
static struct platform_device smc91x_eth_device = {
.name = "smc91x",
.num_resources = ARRAY_SIZE(smc91x_eth_resources),
.resource = smc91x_eth_resources,
};
static struct platform_device *migor_devices[] __initdata = {
&smc91x_eth_device,
};
static int __init migor_devices_setup(void)
{
return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
}
__initcall(migor_devices_setup);
static void __init migor_setup(char **cmdline_p)
{
ctrl_outw(0x1000, 0xa4050110); /* Enable IRQ0 in PJCR */
}
static struct sh_machine_vector mv_migor __initmv = {
.mv_name = "Migo-R",
.mv_setup = migor_setup,
};
...@@ -23,6 +23,7 @@ ...@@ -23,6 +23,7 @@
#include <asm/clock.h> #include <asm/clock.h>
#include <asm/heartbeat.h> #include <asm/heartbeat.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/io_trapped.h>
static struct resource r8a66597_usb_host_resources[] = { static struct resource r8a66597_usb_host_resources[] = {
[0] = { [0] = {
...@@ -181,13 +182,27 @@ static struct platform_device *r7780rp_devices[] __initdata = { ...@@ -181,13 +182,27 @@ static struct platform_device *r7780rp_devices[] __initdata = {
&m66592_usb_peripheral_device, &m66592_usb_peripheral_device,
&heartbeat_device, &heartbeat_device,
#ifndef CONFIG_SH_R7780RP #ifndef CONFIG_SH_R7780RP
&cf_ide_device,
&ax88796_device, &ax88796_device,
#endif #endif
}; };
/*
* The CF is connected using a 16-bit bus where 8-bit operations are
* unsupported. The linux ata driver is however using 8-bit operations, so
* insert a trapped io filter to convert 8-bit operations into 16-bit.
*/
static struct trapped_io cf_trapped_io = {
.resource = cf_ide_resources,
.num_resources = 2,
.minimum_bus_width = 16,
};
static int __init r7780rp_devices_setup(void) static int __init r7780rp_devices_setup(void)
{ {
#ifndef CONFIG_SH_R7780RP
if (register_trapped_io(&cf_trapped_io) == 0)
platform_device_register(&cf_ide_device);
#endif
return platform_add_devices(r7780rp_devices, return platform_add_devices(r7780rp_devices,
ARRAY_SIZE(r7780rp_devices)); ARRAY_SIZE(r7780rp_devices));
} }
...@@ -226,34 +241,6 @@ static void r7780rp_power_off(void) ...@@ -226,34 +241,6 @@ static void r7780rp_power_off(void)
ctrl_outw(0x0001, PA_POFF); ctrl_outw(0x0001, PA_POFF);
} }
static inline unsigned char is_ide_ioaddr(unsigned long addr)
{
return ((cf_ide_resources[0].start <= addr &&
addr <= cf_ide_resources[0].end) ||
(cf_ide_resources[1].start <= addr &&
addr <= cf_ide_resources[1].end));
}
void highlander_writeb(u8 b, void __iomem *addr)
{
unsigned long tmp = (unsigned long __force)addr;
if (is_ide_ioaddr(tmp))
ctrl_outw((u16)b, tmp);
else
ctrl_outb(b, tmp);
}
u8 highlander_readb(void __iomem *addr)
{
unsigned long tmp = (unsigned long __force)addr;
if (is_ide_ioaddr(tmp))
return ctrl_inw(tmp) & 0xff;
else
return ctrl_inb(tmp);
}
/* /*
* Initialize the board * Initialize the board
*/ */
...@@ -338,6 +325,4 @@ static struct sh_machine_vector mv_highlander __initmv = { ...@@ -338,6 +325,4 @@ static struct sh_machine_vector mv_highlander __initmv = {
.mv_setup = highlander_setup, .mv_setup = highlander_setup,
.mv_init_irq = highlander_init_irq, .mv_init_irq = highlander_init_irq,
.mv_irq_demux = highlander_irq_demux, .mv_irq_demux = highlander_irq_demux,
.mv_readb = highlander_readb,
.mv_writeb = highlander_writeb,
}; };
...@@ -21,6 +21,7 @@ ...@@ -21,6 +21,7 @@
#include <asm/machvec.h> #include <asm/machvec.h>
#include <asm/rts7751r2d.h> #include <asm/rts7751r2d.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/io_trapped.h>
#include <asm/spi.h> #include <asm/spi.h>
static struct resource cf_ide_resources[] = { static struct resource cf_ide_resources[] = {
...@@ -214,13 +215,25 @@ static struct platform_device *rts7751r2d_devices[] __initdata = { ...@@ -214,13 +215,25 @@ static struct platform_device *rts7751r2d_devices[] __initdata = {
&uart_device, &uart_device,
&sm501_device, &sm501_device,
#endif #endif
&cf_ide_device,
&heartbeat_device, &heartbeat_device,
&spi_sh_sci_device, &spi_sh_sci_device,
}; };
/*
* The CF is connected with a 16-bit bus where 8-bit operations are
* unsupported. The linux ata driver is however using 8-bit operations, so
* insert a trapped io filter to convert 8-bit operations into 16-bit.
*/
static struct trapped_io cf_trapped_io = {
.resource = cf_ide_resources,
.num_resources = 2,
.minimum_bus_width = 16,
};
static int __init rts7751r2d_devices_setup(void) static int __init rts7751r2d_devices_setup(void)
{ {
if (register_trapped_io(&cf_trapped_io) == 0)
platform_device_register(&cf_ide_device);
spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus)); spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
return platform_add_devices(rts7751r2d_devices, return platform_add_devices(rts7751r2d_devices,
ARRAY_SIZE(rts7751r2d_devices)); ARRAY_SIZE(rts7751r2d_devices));
...@@ -232,34 +245,6 @@ static void rts7751r2d_power_off(void) ...@@ -232,34 +245,6 @@ static void rts7751r2d_power_off(void)
ctrl_outw(0x0001, PA_POWOFF); ctrl_outw(0x0001, PA_POWOFF);
} }
static inline unsigned char is_ide_ioaddr(unsigned long addr)
{
return ((cf_ide_resources[0].start <= addr &&
addr <= cf_ide_resources[0].end) ||
(cf_ide_resources[1].start <= addr &&
addr <= cf_ide_resources[1].end));
}
void rts7751r2d_writeb(u8 b, void __iomem *addr)
{
unsigned long tmp = (unsigned long __force)addr;
if (is_ide_ioaddr(tmp))
ctrl_outw((u16)b, tmp);
else
ctrl_outb(b, tmp);
}
u8 rts7751r2d_readb(void __iomem *addr)
{
unsigned long tmp = (unsigned long __force)addr;
if (is_ide_ioaddr(tmp))
return ctrl_inw(tmp) & 0xff;
else
return ctrl_inb(tmp);
}
/* /*
* Initialize the board * Initialize the board
*/ */
...@@ -310,6 +295,4 @@ static struct sh_machine_vector mv_rts7751r2d __initmv = { ...@@ -310,6 +295,4 @@ static struct sh_machine_vector mv_rts7751r2d __initmv = {
.mv_setup = rts7751r2d_setup, .mv_setup = rts7751r2d_setup,
.mv_init_irq = init_rts7751r2d_IRQ, .mv_init_irq = init_rts7751r2d_IRQ,
.mv_irq_demux = rts7751r2d_irq_demux, .mv_irq_demux = rts7751r2d_irq_demux,
.mv_writeb = rts7751r2d_writeb,
.mv_readb = rts7751r2d_readb,
}; };
...@@ -4,13 +4,6 @@ choice ...@@ -4,13 +4,6 @@ choice
prompt "SDK7780 options" prompt "SDK7780 options"
default SH_SDK7780_BASE default SH_SDK7780_BASE
config SH_SDK7780_STANDALONE
bool "SDK7780 board support"
depends on CPU_SUBTYPE_SH7780
help
Selecting this option will enable support for the
standalone version of the SDK7780. If in doubt, say Y.
config SH_SDK7780_BASE config SH_SDK7780_BASE
bool "SDK7780 with base-board support" bool "SDK7780 with base-board support"
depends on CPU_SUBTYPE_SH7780 depends on CPU_SUBTYPE_SH7780
......
...@@ -17,10 +17,8 @@ ...@@ -17,10 +17,8 @@
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/irq.h> #include <linux/irq.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/hd64465/hd64465.h> #include <asm/hd64465/hd64465.h>
static void disable_hd64465_irq(unsigned int irq) static void disable_hd64465_irq(unsigned int irq)
...@@ -34,7 +32,6 @@ static void disable_hd64465_irq(unsigned int irq) ...@@ -34,7 +32,6 @@ static void disable_hd64465_irq(unsigned int irq)
outw(nimr, HD64465_REG_NIMR); outw(nimr, HD64465_REG_NIMR);
} }
static void enable_hd64465_irq(unsigned int irq) static void enable_hd64465_irq(unsigned int irq)
{ {
unsigned short nimr; unsigned short nimr;
...@@ -46,33 +43,28 @@ static void enable_hd64465_irq(unsigned int irq) ...@@ -46,33 +43,28 @@ static void enable_hd64465_irq(unsigned int irq)
outw(nimr, HD64465_REG_NIMR); outw(nimr, HD64465_REG_NIMR);
} }
static void mask_and_ack_hd64465(unsigned int irq) static void mask_and_ack_hd64465(unsigned int irq)
{ {
disable_hd64465_irq(irq); disable_hd64465_irq(irq);
} }
static void end_hd64465_irq(unsigned int irq) static void end_hd64465_irq(unsigned int irq)
{ {
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
enable_hd64465_irq(irq); enable_hd64465_irq(irq);
} }
static unsigned int startup_hd64465_irq(unsigned int irq) static unsigned int startup_hd64465_irq(unsigned int irq)
{ {
enable_hd64465_irq(irq); enable_hd64465_irq(irq);
return 0; return 0;
} }
static void shutdown_hd64465_irq(unsigned int irq) static void shutdown_hd64465_irq(unsigned int irq)
{ {
disable_hd64465_irq(irq); disable_hd64465_irq(irq);
} }
static struct hw_interrupt_type hd64465_irq_type = { static struct hw_interrupt_type hd64465_irq_type = {
.typename = "HD64465-IRQ", .typename = "HD64465-IRQ",
.startup = startup_hd64465_irq, .startup = startup_hd64465_irq,
...@@ -83,7 +75,6 @@ static struct hw_interrupt_type hd64465_irq_type = { ...@@ -83,7 +75,6 @@ static struct hw_interrupt_type hd64465_irq_type = {
.end = end_hd64465_irq, .end = end_hd64465_irq,
}; };
static irqreturn_t hd64465_interrupt(int irq, void *dev_id) static irqreturn_t hd64465_interrupt(int irq, void *dev_id)
{ {
printk(KERN_INFO printk(KERN_INFO
...@@ -93,9 +84,6 @@ static irqreturn_t hd64465_interrupt(int irq, void *dev_id) ...@@ -93,9 +84,6 @@ static irqreturn_t hd64465_interrupt(int irq, void *dev_id)
return IRQ_NONE; return IRQ_NONE;
} }
/*====================================================*/
/* /*
* Support for a secondary IRQ demux step. This is necessary * Support for a secondary IRQ demux step. This is necessary
* because the HD64465 presents a very thin interface to the * because the HD64465 presents a very thin interface to the
...@@ -103,8 +91,7 @@ static irqreturn_t hd64465_interrupt(int irq, void *dev_id) ...@@ -103,8 +91,7 @@ static irqreturn_t hd64465_interrupt(int irq, void *dev_id)
* normally done in hardware by other PCMCIA host bridges is * normally done in hardware by other PCMCIA host bridges is
* instead done in software. * instead done in software.
*/ */
static struct static struct {
{
int (*func)(int, void *); int (*func)(int, void *);
void *dev; void *dev;
} hd64465_demux[HD64465_IRQ_NUM]; } hd64465_demux[HD64465_IRQ_NUM];
...@@ -123,8 +110,6 @@ void hd64465_unregister_irq_demux(int irq) ...@@ -123,8 +110,6 @@ void hd64465_unregister_irq_demux(int irq)
} }
EXPORT_SYMBOL(hd64465_unregister_irq_demux); EXPORT_SYMBOL(hd64465_unregister_irq_demux);
int hd64465_irq_demux(int irq) int hd64465_irq_demux(int irq)
{ {
if (irq == CONFIG_HD64465_IRQ) { if (irq == CONFIG_HD64465_IRQ) {
...@@ -154,7 +139,6 @@ static struct irqaction irq0 = { ...@@ -154,7 +139,6 @@ static struct irqaction irq0 = {
.name = "HD64465", .name = "HD64465",
}; };
static int __init setup_hd64465(void) static int __init setup_hd64465(void)
{ {
int i; int i;
...@@ -185,16 +169,13 @@ static int __init setup_hd64465(void) ...@@ -185,16 +169,13 @@ static int __init setup_hd64465(void)
setup_irq(CONFIG_HD64465_IRQ, &irq0); setup_irq(CONFIG_HD64465_IRQ, &irq0);
#ifdef CONFIG_SERIAL
/* wake up the UART from STANDBY at this point */ /* wake up the UART from STANDBY at this point */
smscr = inw(HD64465_REG_SMSCR); smscr = inw(HD64465_REG_SMSCR);
outw(smscr & (~HD64465_SMSCR_UARTST), HD64465_REG_SMSCR); outw(smscr & (~HD64465_SMSCR_UARTST), HD64465_REG_SMSCR);
/* remap IO ports for first ISA serial port to HD64465 UART */ /* remap IO ports for first ISA serial port to HD64465 UART */
hd64465_port_map(0x3f8, 8, CONFIG_HD64465_IOBASE + 0x8000, 1); hd64465_port_map(0x3f8, 8, CONFIG_HD64465_IOBASE + 0x8000, 1);
#endif
return 0; return 0;
} }
module_init(setup_hd64465); module_init(setup_hd64465);
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.24
# Wed Feb 6 21:52:20 2008
#
CONFIG_SUPERH=y
CONFIG_SUPERH32=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_GENERIC_TIME=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_SYS_SUPPORTS_NUMA=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_NO_VIRT_TO_BUS=y
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
#
# General setup
#
CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_USER_NS is not set
# CONFIG_PID_NS is not set
# CONFIG_AUDIT is not set
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CGROUPS is not set
CONFIG_FAIR_GROUP_SCHED=y
CONFIG_FAIR_USER_SCHED=y
# CONFIG_FAIR_CGROUP_SCHED is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_RELAY is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_EMBEDDED=y
CONFIG_UID16=y
# CONFIG_SYSCTL_SYSCALL is not set
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
CONFIG_PROFILING=y
# CONFIG_MARKERS is not set
CONFIG_OPROFILE=y
CONFIG_HAVE_OPROFILE=y
# CONFIG_HAVE_KPROBES is not set
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
# CONFIG_MODULE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
# CONFIG_KMOD is not set
CONFIG_BLOCK=y
# CONFIG_LBD is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_LSF is not set
# CONFIG_BLK_DEV_BSG is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
CONFIG_DEFAULT_AS=y
# CONFIG_DEFAULT_DEADLINE is not set
# CONFIG_DEFAULT_CFQ is not set
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory"
CONFIG_CLASSIC_RCU=y
# CONFIG_PREEMPT_RCU is not set
#
# System type
#
CONFIG_CPU_SH4=y
CONFIG_CPU_SH4A=y
CONFIG_CPU_SH4AL_DSP=y
CONFIG_CPU_SHX2=y
# CONFIG_CPU_SUBTYPE_SH7619 is not set
# CONFIG_CPU_SUBTYPE_SH7203 is not set
# CONFIG_CPU_SUBTYPE_SH7206 is not set
# CONFIG_CPU_SUBTYPE_SH7263 is not set
# CONFIG_CPU_SUBTYPE_SH7705 is not set
# CONFIG_CPU_SUBTYPE_SH7706 is not set
# CONFIG_CPU_SUBTYPE_SH7707 is not set
# CONFIG_CPU_SUBTYPE_SH7708 is not set
# CONFIG_CPU_SUBTYPE_SH7709 is not set
# CONFIG_CPU_SUBTYPE_SH7710 is not set
# CONFIG_CPU_SUBTYPE_SH7712 is not set
# CONFIG_CPU_SUBTYPE_SH7720 is not set
# CONFIG_CPU_SUBTYPE_SH7721 is not set
# CONFIG_CPU_SUBTYPE_SH7750 is not set
# CONFIG_CPU_SUBTYPE_SH7091 is not set
# CONFIG_CPU_SUBTYPE_SH7750R is not set
# CONFIG_CPU_SUBTYPE_SH7750S is not set
# CONFIG_CPU_SUBTYPE_SH7751 is not set
# CONFIG_CPU_SUBTYPE_SH7751R is not set
# CONFIG_CPU_SUBTYPE_SH7760 is not set
# CONFIG_CPU_SUBTYPE_SH4_202 is not set
# CONFIG_CPU_SUBTYPE_SH7763 is not set
# CONFIG_CPU_SUBTYPE_SH7770 is not set
# CONFIG_CPU_SUBTYPE_SH7780 is not set
# CONFIG_CPU_SUBTYPE_SH7785 is not set
# CONFIG_CPU_SUBTYPE_SHX3 is not set
# CONFIG_CPU_SUBTYPE_SH7343 is not set
CONFIG_CPU_SUBTYPE_SH7722=y
# CONFIG_CPU_SUBTYPE_SH5_101 is not set
# CONFIG_CPU_SUBTYPE_SH5_103 is not set
#
# Memory management options
#
CONFIG_QUICKLIST=y
CONFIG_MMU=y
CONFIG_PAGE_OFFSET=0x80000000
CONFIG_MEMORY_START=0x0c000000
CONFIG_MEMORY_SIZE=0x04000000
CONFIG_29BIT=y
# CONFIG_X2TLB is not set
CONFIG_VSYSCALL=y
CONFIG_NUMA=y
CONFIG_NODES_SHIFT=1
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_SPARSEMEM_DEFAULT=y
CONFIG_MAX_ACTIVE_REGIONS=2
CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_64KB is not set
CONFIG_SELECT_MEMORY_MODEL=y
# CONFIG_FLATMEM_MANUAL is not set
# CONFIG_DISCONTIGMEM_MANUAL is not set
CONFIG_SPARSEMEM_MANUAL=y
CONFIG_SPARSEMEM=y
CONFIG_NEED_MULTIPLE_NODES=y
CONFIG_HAVE_MEMORY_PRESENT=y
CONFIG_SPARSEMEM_STATIC=y
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
# CONFIG_MEMORY_HOTPLUG is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_MIGRATION is not set
# CONFIG_RESOURCES_64BIT is not set
CONFIG_ZONE_DMA_FLAG=0
CONFIG_NR_QUICK=2
#
# Cache configuration
#
# CONFIG_SH_DIRECT_MAPPED is not set
CONFIG_CACHE_WRITEBACK=y
# CONFIG_CACHE_WRITETHROUGH is not set
# CONFIG_CACHE_OFF is not set
#
# Processor features
#
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_BIG_ENDIAN is not set
# CONFIG_SH_FPU_EMU is not set
CONFIG_SH_DSP=y
# CONFIG_SH_STORE_QUEUES is not set
CONFIG_CPU_HAS_INTEVT=y
CONFIG_CPU_HAS_SR_RB=y
CONFIG_CPU_HAS_PTEA=y
CONFIG_CPU_HAS_DSP=y
#
# Board support
#
# CONFIG_SH_7722_SOLUTION_ENGINE is not set
CONFIG_SH_MIGOR=y
#
# Timer and clock configuration
#
CONFIG_SH_TMU=y
CONFIG_SH_TIMER_IRQ=16
CONFIG_SH_PCLK_FREQ=33333333
# CONFIG_TICK_ONESHOT is not set
# CONFIG_NO_HZ is not set
# CONFIG_HIGH_RES_TIMERS is not set
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
#
# CPU Frequency scaling
#
# CONFIG_CPU_FREQ is not set
#
# DMA support
#
# CONFIG_SH_DMA is not set
#
# Companion Chips
#
#
# Additional SuperH Device Drivers
#
# CONFIG_HEARTBEAT is not set
# CONFIG_PUSH_SWITCH is not set
#
# Kernel features
#
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
# CONFIG_SCHED_HRTICK is not set
# CONFIG_KEXEC is not set
# CONFIG_CRASH_DUMP is not set
CONFIG_PREEMPT_NONE=y
# CONFIG_PREEMPT_VOLUNTARY is not set
# CONFIG_PREEMPT is not set
CONFIG_RCU_TRACE=y
CONFIG_GUSA=y
#
# Boot options
#
CONFIG_ZERO_PAGE_OFFSET=0x00001000
CONFIG_BOOT_LINK_OFFSET=0x00800000
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE="console=ttySC0,115200 earlyprintk=serial ip=on"
#
# Bus options
#
# CONFIG_ARCH_SUPPORTS_MSI is not set
# CONFIG_PCCARD is not set
#
# Executable file formats
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
#
# Networking
#
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_UNIX=y
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
# CONFIG_XFRM_STATISTICS is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
# CONFIG_INET_TUNNEL is not set
CONFIG_INET_XFRM_MODE_TRANSPORT=y
CONFIG_INET_XFRM_MODE_TUNNEL=y
CONFIG_INET_XFRM_MODE_BEET=y
# CONFIG_INET_LRO is not set
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
# CONFIG_IP_DCCP is not set
# CONFIG_IP_SCTP is not set
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_CAN is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
#
# Wireless
#
# CONFIG_CFG80211 is not set
CONFIG_WIRELESS_EXT=y
# CONFIG_MAC80211 is not set
# CONFIG_IEEE80211 is not set
# CONFIG_RFKILL is not set
# CONFIG_NET_9P is not set
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_FW_LOADER=m
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_CONNECTOR is not set
# CONFIG_MTD is not set
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_COW_COMMON is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
CONFIG_MISC_DEVICES=y
# CONFIG_EEPROM_93CX6 is not set
# CONFIG_IDE is not set
#
# SCSI device support
#
# CONFIG_RAID_ATTRS is not set
CONFIG_SCSI=y
CONFIG_SCSI_DMA=y
# CONFIG_SCSI_TGT is not set
# CONFIG_SCSI_NETLINK is not set
CONFIG_SCSI_PROC_FS=y
#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
# CONFIG_BLK_DEV_SR is not set
# CONFIG_CHR_DEV_SG is not set
# CONFIG_CHR_DEV_SCH is not set
#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
# CONFIG_SCSI_MULTI_LUN is not set
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
# CONFIG_SCSI_SCAN_ASYNC is not set
CONFIG_SCSI_WAIT_SCAN=m
#
# SCSI Transports
#
# CONFIG_SCSI_SPI_ATTRS is not set
# CONFIG_SCSI_FC_ATTRS is not set
# CONFIG_SCSI_ISCSI_ATTRS is not set
# CONFIG_SCSI_SAS_LIBSAS is not set
# CONFIG_SCSI_SRP_ATTRS is not set
CONFIG_SCSI_LOWLEVEL=y
# CONFIG_ISCSI_TCP is not set
# CONFIG_SCSI_DEBUG is not set
# CONFIG_ATA is not set
# CONFIG_MD is not set
CONFIG_NETDEVICES=y
# CONFIG_NETDEVICES_MULTIQUEUE is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_MACVLAN is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_VETH is not set
# CONFIG_PHYLIB is not set
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
# CONFIG_AX88796 is not set
# CONFIG_STNIC is not set
CONFIG_SMC91X=y
# CONFIG_IBM_NEW_EMAC_ZMII is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
# CONFIG_B44 is not set
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
#
# Wireless LAN
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
# CONFIG_WAN is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_ISDN is not set
# CONFIG_PHONE is not set
#
# Input device support
#
CONFIG_INPUT=y
# CONFIG_INPUT_FF_MEMLESS is not set
# CONFIG_INPUT_POLLDEV is not set
#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Hardware I/O ports
#
# CONFIG_SERIO is not set
# CONFIG_GAMEPORT is not set
#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
CONFIG_VT_HW_CONSOLE_BINDING=y
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=3
CONFIG_SERIAL_SH_SCI_CONSOLE=y
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_IPMI_HANDLER is not set
CONFIG_HW_RANDOM=y
# CONFIG_R3964 is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
# CONFIG_I2C is not set
#
# SPI support
#
# CONFIG_SPI is not set
# CONFIG_SPI_MASTER is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
# CONFIG_WATCHDOG is not set
#
# Sonics Silicon Backplane
#
CONFIG_SSB_POSSIBLE=y
# CONFIG_SSB is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
# CONFIG_DAB is not set
#
# Graphics support
#
# CONFIG_VGASTATE is not set
# CONFIG_VIDEO_OUTPUT_CONTROL is not set
# CONFIG_FB is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Display device support
#
# CONFIG_DISPLAY_SUPPORT is not set
#
# Console display driver support
#
CONFIG_DUMMY_CONSOLE=y
#
# Sound
#
# CONFIG_SOUND is not set
CONFIG_HID_SUPPORT=y
CONFIG_HID=y
# CONFIG_HID_DEBUG is not set
# CONFIG_HIDRAW is not set
CONFIG_USB_SUPPORT=y
CONFIG_USB_ARCH_HAS_HCD=y
# CONFIG_USB_ARCH_HAS_OHCI is not set
# CONFIG_USB_ARCH_HAS_EHCI is not set
# CONFIG_USB is not set
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
#
CONFIG_USB_GADGET=y
# CONFIG_USB_GADGET_DEBUG_FILES is not set
# CONFIG_USB_GADGET_DEBUG_FS is not set
CONFIG_USB_GADGET_SELECTED=y
# CONFIG_USB_GADGET_AMD5536UDC is not set
# CONFIG_USB_GADGET_ATMEL_USBA is not set
# CONFIG_USB_GADGET_FSL_USB2 is not set
# CONFIG_USB_GADGET_NET2280 is not set
# CONFIG_USB_GADGET_PXA2XX is not set
CONFIG_USB_GADGET_M66592=y
CONFIG_USB_M66592=y
CONFIG_SUPERH_BUILT_IN_M66592=y
# CONFIG_USB_GADGET_GOKU is not set
# CONFIG_USB_GADGET_LH7A40X is not set
# CONFIG_USB_GADGET_OMAP is not set
# CONFIG_USB_GADGET_S3C2410 is not set
# CONFIG_USB_GADGET_AT91 is not set
# CONFIG_USB_GADGET_DUMMY_HCD is not set
CONFIG_USB_GADGET_DUALSPEED=y
# CONFIG_USB_ZERO is not set
# CONFIG_USB_ETH is not set
# CONFIG_USB_GADGETFS is not set
# CONFIG_USB_FILE_STORAGE is not set
CONFIG_USB_G_SERIAL=y
# CONFIG_USB_MIDI_GADGET is not set
# CONFIG_USB_G_PRINTER is not set
# CONFIG_MMC is not set
# CONFIG_NEW_LEDS is not set
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
# CONFIG_RTC_DEBUG is not set
#
# RTC interfaces
#
CONFIG_RTC_INTF_SYSFS=y
CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
# CONFIG_RTC_DRV_TEST is not set
#
# SPI RTC drivers
#
#
# Platform RTC drivers
#
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_V3020 is not set
#
# on-CPU RTC drivers
#
CONFIG_RTC_DRV_SH=y
#
# Userspace I/O
#
# CONFIG_UIO is not set
#
# File systems
#
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_EXT4DEV_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_INOTIFY is not set
# CONFIG_QUOTA is not set
# CONFIG_DNOTIFY is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_PROC_SYSCTL=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
# CONFIG_HUGETLBFS is not set
# CONFIG_HUGETLB_PAGE is not set
# CONFIG_CONFIGFS_FS is not set
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
# CONFIG_NETWORK_FILESYSTEMS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
# CONFIG_NLS is not set
# CONFIG_DLM is not set
#
# Kernel hacking
#
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
CONFIG_DEBUG_FS=y
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_SAMPLES is not set
# CONFIG_SH_STANDARD_BIOS is not set
CONFIG_EARLY_SCIF_CONSOLE=y
CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffe00000
CONFIG_EARLY_PRINTK=y
# CONFIG_SH_KGDB is not set
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
CONFIG_CRYPTO=y
# CONFIG_CRYPTO_SEQIV is not set
# CONFIG_CRYPTO_MANAGER is not set
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_XCBC is not set
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_MD4 is not set
# CONFIG_CRYPTO_MD5 is not set
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_WP512 is not set
# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_GF128MUL is not set
# CONFIG_CRYPTO_ECB is not set
# CONFIG_CRYPTO_CBC is not set
# CONFIG_CRYPTO_PCBC is not set
# CONFIG_CRYPTO_LRW is not set
# CONFIG_CRYPTO_XTS is not set
# CONFIG_CRYPTO_CTR is not set
# CONFIG_CRYPTO_GCM is not set
# CONFIG_CRYPTO_CCM is not set
# CONFIG_CRYPTO_CRYPTD is not set
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_TWOFISH is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_AES is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_ARC4 is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_SALSA20 is not set
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_TEST is not set
# CONFIG_CRYPTO_AUTHENC is not set
# CONFIG_CRYPTO_LZO is not set
CONFIG_CRYPTO_HW=y
#
# Library routines
#
CONFIG_BITREVERSE=y
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
# CONFIG_LIBCRC32C is not set
CONFIG_PLIST=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y
...@@ -231,7 +231,6 @@ CONFIG_CPU_LITTLE_ENDIAN=y ...@@ -231,7 +231,6 @@ CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_SH_DSP is not set # CONFIG_SH_DSP is not set
# CONFIG_SH_ADC is not set # CONFIG_SH_ADC is not set
CONFIG_CPU_HAS_INTEVT=y CONFIG_CPU_HAS_INTEVT=y
CONFIG_CPU_HAS_PINT_IRQ=y
CONFIG_CPU_HAS_IPR_IRQ=y CONFIG_CPU_HAS_IPR_IRQ=y
CONFIG_CPU_HAS_SR_RB=y CONFIG_CPU_HAS_SR_RB=y
......
...@@ -350,7 +350,7 @@ int register_dmac(struct dma_info *info) ...@@ -350,7 +350,7 @@ int register_dmac(struct dma_info *info)
BUG_ON((info->flags & DMAC_CHANNELS_CONFIGURED) && !info->channels); BUG_ON((info->flags & DMAC_CHANNELS_CONFIGURED) && !info->channels);
info->pdev = platform_device_register_simple((char *)info->name, -1, info->pdev = platform_device_register_simple(info->name, -1,
NULL, 0); NULL, 0);
if (IS_ERR(info->pdev)) if (IS_ERR(info->pdev))
return PTR_ERR(info->pdev); return PTR_ERR(info->pdev);
......
...@@ -18,7 +18,7 @@ int pci_fixup_pcic(void) ...@@ -18,7 +18,7 @@ int pci_fixup_pcic(void)
{ {
unsigned long bcr1, mcr; unsigned long bcr1, mcr;
bcr1 = inl(SH7751_BCR1); bcr1 = ctrl_inl(SH7751_BCR1);
bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */ bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
pci_write_reg(bcr1, SH4_PCIBCR1); pci_write_reg(bcr1, SH4_PCIBCR1);
...@@ -28,7 +28,7 @@ int pci_fixup_pcic(void) ...@@ -28,7 +28,7 @@ int pci_fixup_pcic(void)
pci_write_reg(0xfb900047, SH7751_PCICONF1); pci_write_reg(0xfb900047, SH7751_PCICONF1);
pci_write_reg(0xab000001, SH7751_PCICONF4); pci_write_reg(0xab000001, SH7751_PCICONF4);
mcr = inl(SH7751_MCR); mcr = ctrl_inl(SH7751_MCR);
mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF; mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
pci_write_reg(mcr, SH4_PCIMCR); pci_write_reg(mcr, SH4_PCIMCR);
......
...@@ -19,7 +19,7 @@ int pci_fixup_pcic(void) ...@@ -19,7 +19,7 @@ int pci_fixup_pcic(void)
{ {
unsigned long bcr1, mcr; unsigned long bcr1, mcr;
bcr1 = inl(SH7751_BCR1); bcr1 = ctrl_inl(SH7751_BCR1);
bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */ bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
pci_write_reg(bcr1, SH4_PCIBCR1); pci_write_reg(bcr1, SH4_PCIBCR1);
...@@ -30,7 +30,7 @@ int pci_fixup_pcic(void) ...@@ -30,7 +30,7 @@ int pci_fixup_pcic(void)
pci_write_reg(0xfb900047, SH7751_PCICONF1); pci_write_reg(0xfb900047, SH7751_PCICONF1);
pci_write_reg(0xab000001, SH7751_PCICONF4); pci_write_reg(0xab000001, SH7751_PCICONF4);
mcr = inl(SH7751_MCR); mcr = ctrl_inl(SH7751_MCR);
mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF; mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
pci_write_reg(mcr, SH4_PCIMCR); pci_write_reg(mcr, SH4_PCIMCR);
......
...@@ -83,9 +83,9 @@ static int gapspci_read(struct pci_bus *bus, unsigned int devfn, int where, int ...@@ -83,9 +83,9 @@ static int gapspci_read(struct pci_bus *bus, unsigned int devfn, int where, int
return PCIBIOS_DEVICE_NOT_FOUND; return PCIBIOS_DEVICE_NOT_FOUND;
switch (size) { switch (size) {
case 1: *val = inb(GAPSPCI_BBA_CONFIG+where); break; case 1: *val = ctrl_inb(GAPSPCI_BBA_CONFIG+where); break;
case 2: *val = inw(GAPSPCI_BBA_CONFIG+where); break; case 2: *val = ctrl_inw(GAPSPCI_BBA_CONFIG+where); break;
case 4: *val = inl(GAPSPCI_BBA_CONFIG+where); break; case 4: *val = ctrl_inl(GAPSPCI_BBA_CONFIG+where); break;
} }
return PCIBIOS_SUCCESSFUL; return PCIBIOS_SUCCESSFUL;
...@@ -97,9 +97,9 @@ static int gapspci_write(struct pci_bus *bus, unsigned int devfn, int where, int ...@@ -97,9 +97,9 @@ static int gapspci_write(struct pci_bus *bus, unsigned int devfn, int where, int
return PCIBIOS_DEVICE_NOT_FOUND; return PCIBIOS_DEVICE_NOT_FOUND;
switch (size) { switch (size) {
case 1: outb(( u8)val, GAPSPCI_BBA_CONFIG+where); break; case 1: ctrl_outb(( u8)val, GAPSPCI_BBA_CONFIG+where); break;
case 2: outw((u16)val, GAPSPCI_BBA_CONFIG+where); break; case 2: ctrl_outw((u16)val, GAPSPCI_BBA_CONFIG+where); break;
case 4: outl((u32)val, GAPSPCI_BBA_CONFIG+where); break; case 4: ctrl_outl((u32)val, GAPSPCI_BBA_CONFIG+where); break;
} }
return PCIBIOS_SUCCESSFUL; return PCIBIOS_SUCCESSFUL;
...@@ -127,36 +127,36 @@ int __init gapspci_init(void) ...@@ -127,36 +127,36 @@ int __init gapspci_init(void)
*/ */
for (i=0; i<16; i++) for (i=0; i<16; i++)
idbuf[i] = inb(GAPSPCI_REGS+i); idbuf[i] = ctrl_inb(GAPSPCI_REGS+i);
if (strncmp(idbuf, "GAPSPCI_BRIDGE_2", 16)) if (strncmp(idbuf, "GAPSPCI_BRIDGE_2", 16))
return -ENODEV; return -ENODEV;
outl(0x5a14a501, GAPSPCI_REGS+0x18); ctrl_outl(0x5a14a501, GAPSPCI_REGS+0x18);
for (i=0; i<1000000; i++) for (i=0; i<1000000; i++)
; ;
if (inl(GAPSPCI_REGS+0x18) != 1) if (ctrl_inl(GAPSPCI_REGS+0x18) != 1)
return -EINVAL; return -EINVAL;
outl(0x01000000, GAPSPCI_REGS+0x20); ctrl_outl(0x01000000, GAPSPCI_REGS+0x20);
outl(0x01000000, GAPSPCI_REGS+0x24); ctrl_outl(0x01000000, GAPSPCI_REGS+0x24);
outl(GAPSPCI_DMA_BASE, GAPSPCI_REGS+0x28); ctrl_outl(GAPSPCI_DMA_BASE, GAPSPCI_REGS+0x28);
outl(GAPSPCI_DMA_BASE+GAPSPCI_DMA_SIZE, GAPSPCI_REGS+0x2c); ctrl_outl(GAPSPCI_DMA_BASE+GAPSPCI_DMA_SIZE, GAPSPCI_REGS+0x2c);
outl(1, GAPSPCI_REGS+0x14); ctrl_outl(1, GAPSPCI_REGS+0x14);
outl(1, GAPSPCI_REGS+0x34); ctrl_outl(1, GAPSPCI_REGS+0x34);
/* Setting Broadband Adapter */ /* Setting Broadband Adapter */
outw(0xf900, GAPSPCI_BBA_CONFIG+0x06); ctrl_outw(0xf900, GAPSPCI_BBA_CONFIG+0x06);
outl(0x00000000, GAPSPCI_BBA_CONFIG+0x30); ctrl_outl(0x00000000, GAPSPCI_BBA_CONFIG+0x30);
outb(0x00, GAPSPCI_BBA_CONFIG+0x3c); ctrl_outb(0x00, GAPSPCI_BBA_CONFIG+0x3c);
outb(0xf0, GAPSPCI_BBA_CONFIG+0x0d); ctrl_outb(0xf0, GAPSPCI_BBA_CONFIG+0x0d);
outw(0x0006, GAPSPCI_BBA_CONFIG+0x04); ctrl_outw(0x0006, GAPSPCI_BBA_CONFIG+0x04);
outl(0x00002001, GAPSPCI_BBA_CONFIG+0x10); ctrl_outl(0x00002001, GAPSPCI_BBA_CONFIG+0x10);
outl(0x01000000, GAPSPCI_BBA_CONFIG+0x14); ctrl_outl(0x01000000, GAPSPCI_BBA_CONFIG+0x14);
return 0; return 0;
} }
......
...@@ -33,7 +33,7 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) ...@@ -33,7 +33,7 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
static struct resource sh7751_io_resource = { static struct resource sh7751_io_resource = {
.name = "SH7751_IO", .name = "SH7751_IO",
.start = 0x4000, .start = 0x4000,
.end = 0x4000 + SH7751_PCI_IO_SIZE - 1, .end = SH7751_PCI_IO_SIZE - 1,
.flags = IORESOURCE_IO .flags = IORESOURCE_IO
}; };
...@@ -68,6 +68,7 @@ static struct sh4_pci_address_map sh7751_pci_map = { ...@@ -68,6 +68,7 @@ static struct sh4_pci_address_map sh7751_pci_map = {
int __init pcibios_init_platform(void) int __init pcibios_init_platform(void)
{ {
__set_io_port_base(SH7751_PCI_IO_BASE);
return sh7751_pcic_init(&sh7751_pci_map); return sh7751_pcic_init(&sh7751_pci_map);
} }
...@@ -172,11 +172,11 @@ struct sh4_pci_address_map { ...@@ -172,11 +172,11 @@ struct sh4_pci_address_map {
static inline void pci_write_reg(unsigned long val, unsigned long reg) static inline void pci_write_reg(unsigned long val, unsigned long reg)
{ {
outl(val, PCI_REG(reg)); ctrl_outl(val, PCI_REG(reg));
} }
static inline unsigned long pci_read_reg(unsigned long reg) static inline unsigned long pci_read_reg(unsigned long reg)
{ {
return inl(PCI_REG(reg)); return ctrl_inl(PCI_REG(reg));
} }
#endif /* __PCI_SH4_H */ #endif /* __PCI_SH4_H */
...@@ -58,7 +58,7 @@ static int __init __area_sdram_check(unsigned int area) ...@@ -58,7 +58,7 @@ static int __init __area_sdram_check(unsigned int area)
{ {
u32 word; u32 word;
word = inl(SH7751_BCR1); word = ctrl_inl(SH7751_BCR1);
/* check BCR for SDRAM in area */ /* check BCR for SDRAM in area */
if (((word >> area) & 1) == 0) { if (((word >> area) & 1) == 0) {
printk("PCI: Area %d is not configured for SDRAM. BCR1=0x%x\n", printk("PCI: Area %d is not configured for SDRAM. BCR1=0x%x\n",
...@@ -67,7 +67,7 @@ static int __init __area_sdram_check(unsigned int area) ...@@ -67,7 +67,7 @@ static int __init __area_sdram_check(unsigned int area)
} }
pci_write_reg(word, SH4_PCIBCR1); pci_write_reg(word, SH4_PCIBCR1);
word = (u16)inw(SH7751_BCR2); word = (u16)ctrl_inw(SH7751_BCR2);
/* check BCR2 for 32bit SDRAM interface*/ /* check BCR2 for 32bit SDRAM interface*/
if (((word >> (area << 1)) & 0x3) != 0x3) { if (((word >> (area << 1)) & 0x3) != 0x3) {
printk("PCI: Area %d is not 32 bit SDRAM. BCR2=0x%x\n", printk("PCI: Area %d is not 32 bit SDRAM. BCR2=0x%x\n",
...@@ -85,9 +85,9 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map) ...@@ -85,9 +85,9 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map)
u32 word; u32 word;
/* Set the BCR's to enable PCI access */ /* Set the BCR's to enable PCI access */
reg = inl(SH7751_BCR1); reg = ctrl_inl(SH7751_BCR1);
reg |= 0x80000; reg |= 0x80000;
outl(reg, SH7751_BCR1); ctrl_outl(reg, SH7751_BCR1);
/* Turn the clocks back on (not done in reset)*/ /* Turn the clocks back on (not done in reset)*/
pci_write_reg(0, SH4_PCICLKR); pci_write_reg(0, SH4_PCICLKR);
...@@ -179,13 +179,13 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map) ...@@ -179,13 +179,13 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map)
return 0; return 0;
/* configure the wait control registers */ /* configure the wait control registers */
word = inl(SH7751_WCR1); word = ctrl_inl(SH7751_WCR1);
pci_write_reg(word, SH4_PCIWCR1); pci_write_reg(word, SH4_PCIWCR1);
word = inl(SH7751_WCR2); word = ctrl_inl(SH7751_WCR2);
pci_write_reg(word, SH4_PCIWCR2); pci_write_reg(word, SH4_PCIWCR2);
word = inl(SH7751_WCR3); word = ctrl_inl(SH7751_WCR3);
pci_write_reg(word, SH4_PCIWCR3); pci_write_reg(word, SH4_PCIWCR3);
word = inl(SH7751_MCR); word = ctrl_inl(SH7751_MCR);
pci_write_reg(word, SH4_PCIMCR); pci_write_reg(word, SH4_PCIMCR);
/* NOTE: I'm ignoring the PCI error IRQs for now.. /* NOTE: I'm ignoring the PCI error IRQs for now..
......
...@@ -52,7 +52,7 @@ static int __init sh7780_pci_init(void) ...@@ -52,7 +52,7 @@ static int __init sh7780_pci_init(void)
pr_debug("PCI: Starting intialization.\n"); pr_debug("PCI: Starting intialization.\n");
outl(0x00000001, SH7780_PCI_VCR2); /* Enable PCIC */ ctrl_outl(0x00000001, SH7780_PCI_VCR2); /* Enable PCIC */
/* check for SH7780/SH7780R hardware */ /* check for SH7780/SH7780R hardware */
id = pci_read_reg(SH7780_PCIVID); id = pci_read_reg(SH7780_PCIVID);
......
...@@ -22,5 +22,6 @@ obj-$(CONFIG_CRASH_DUMP) += crash_dump.o ...@@ -22,5 +22,6 @@ obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
obj-$(CONFIG_PM) += pm.o obj-$(CONFIG_PM) += pm.o
obj-$(CONFIG_STACKTRACE) += stacktrace.o obj-$(CONFIG_STACKTRACE) += stacktrace.o
obj-$(CONFIG_BINFMT_ELF) += dump_task.o obj-$(CONFIG_BINFMT_ELF) += dump_task.o
obj-$(CONFIG_IO_TRAPPED) += io_trapped.o
EXTRA_CFLAGS += -Werror EXTRA_CFLAGS += -Werror
...@@ -18,5 +18,6 @@ obj-$(CONFIG_CRASH_DUMP) += crash_dump.o ...@@ -18,5 +18,6 @@ obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
obj-$(CONFIG_PM) += pm.o obj-$(CONFIG_PM) += pm.o
obj-$(CONFIG_STACKTRACE) += stacktrace.o obj-$(CONFIG_STACKTRACE) += stacktrace.o
obj-$(CONFIG_BINFMT_ELF) += dump_task.o obj-$(CONFIG_BINFMT_ELF) += dump_task.o
obj-$(CONFIG_IO_TRAPPED) += io_trapped.o
EXTRA_CFLAGS += -Werror EXTRA_CFLAGS += -Werror
...@@ -6,4 +6,3 @@ obj-y += intc.o ...@@ -6,4 +6,3 @@ obj-y += intc.o
obj-$(CONFIG_SUPERH32) += imask.o obj-$(CONFIG_SUPERH32) += imask.o
obj-$(CONFIG_CPU_SH5) += intc-sh5.o obj-$(CONFIG_CPU_SH5) += intc-sh5.o
obj-$(CONFIG_CPU_HAS_IPR_IRQ) += ipr.o obj-$(CONFIG_CPU_HAS_IPR_IRQ) += ipr.o
obj-$(CONFIG_CPU_HAS_MASKREG_IRQ) += maskreg.o
...@@ -75,21 +75,6 @@ int intc_evt_to_irq[(0xE20/0x20)+1] = { ...@@ -75,21 +75,6 @@ int intc_evt_to_irq[(0xE20/0x20)+1] = {
-1, -1 /* 0xE00 - 0xE20 */ -1, -1 /* 0xE00 - 0xE20 */
}; };
/*
* Opposite mapper.
*/
static int IRQ_to_vectorN[NR_INTC_IRQS] = {
0x12, 0x15, 0x18, 0x1B, 0x40, 0x41, 0x42, 0x43, /* 0- 7 */
-1, -1, -1, -1, 0x50, 0x51, 0x52, 0x53, /* 8-15 */
0x54, 0x55, 0x32, 0x33, 0x34, 0x35, 0x36, -1, /* 16-23 */
-1, -1, -1, -1, -1, -1, -1, -1, /* 24-31 */
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x38, /* 32-39 */
0x39, 0x3A, 0x3B, -1, -1, -1, -1, -1, /* 40-47 */
-1, -1, -1, -1, -1, -1, -1, -1, /* 48-55 */
-1, -1, -1, -1, -1, -1, -1, 0x2B, /* 56-63 */
};
static unsigned long intc_virt; static unsigned long intc_virt;
static unsigned int startup_intc_irq(unsigned int irq); static unsigned int startup_intc_irq(unsigned int irq);
...@@ -176,6 +161,18 @@ void make_intc_irq(unsigned int irq) ...@@ -176,6 +161,18 @@ void make_intc_irq(unsigned int irq)
} }
#if defined(CONFIG_PROC_FS) && defined(CONFIG_SYSCTL) #if defined(CONFIG_PROC_FS) && defined(CONFIG_SYSCTL)
static int IRQ_to_vectorN[NR_INTC_IRQS] = {
0x12, 0x15, 0x18, 0x1B, 0x40, 0x41, 0x42, 0x43, /* 0- 7 */
-1, -1, -1, -1, 0x50, 0x51, 0x52, 0x53, /* 8-15 */
0x54, 0x55, 0x32, 0x33, 0x34, 0x35, 0x36, -1, /* 16-23 */
-1, -1, -1, -1, -1, -1, -1, -1, /* 24-31 */
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x38, /* 32-39 */
0x39, 0x3A, 0x3B, -1, -1, -1, -1, -1, /* 40-47 */
-1, -1, -1, -1, -1, -1, -1, -1, /* 48-55 */
-1, -1, -1, -1, -1, -1, -1, 0x2B, /* 56-63 */
};
int intc_irq_describe(char* p, int irq) int intc_irq_describe(char* p, int irq)
{ {
if (irq < NR_INTC_IRQS) if (irq < NR_INTC_IRQS)
......
/*
* Interrupt handling for Simple external interrupt mask register
*
* Copyright (C) 2001 A&D Co., Ltd. <http://www.aandd.co.jp>
*
* This is for the machine which have single 16 bit register
* for masking external IRQ individually.
* Each bit of the register is for masking each interrupt.
*
* This file may be copied or modified under the terms of the GNU
* General Public License. See linux/COPYING for more information.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/system.h>
#include <asm/io.h>
/* address of external interrupt mask register */
unsigned long irq_mask_register;
/* forward declaration */
static unsigned int startup_maskreg_irq(unsigned int irq);
static void shutdown_maskreg_irq(unsigned int irq);
static void enable_maskreg_irq(unsigned int irq);
static void disable_maskreg_irq(unsigned int irq);
static void mask_and_ack_maskreg(unsigned int);
static void end_maskreg_irq(unsigned int irq);
/* hw_interrupt_type */
static struct hw_interrupt_type maskreg_irq_type = {
.typename = "Mask Register",
.startup = startup_maskreg_irq,
.shutdown = shutdown_maskreg_irq,
.enable = enable_maskreg_irq,
.disable = disable_maskreg_irq,
.ack = mask_and_ack_maskreg,
.end = end_maskreg_irq
};
/* actual implementation */
static unsigned int startup_maskreg_irq(unsigned int irq)
{
enable_maskreg_irq(irq);
return 0; /* never anything pending */
}
static void shutdown_maskreg_irq(unsigned int irq)
{
disable_maskreg_irq(irq);
}
static void disable_maskreg_irq(unsigned int irq)
{
unsigned short val, mask = 0x01 << irq;
BUG_ON(!irq_mask_register);
/* Set "irq"th bit */
val = ctrl_inw(irq_mask_register);
val |= mask;
ctrl_outw(val, irq_mask_register);
}
static void enable_maskreg_irq(unsigned int irq)
{
unsigned short val, mask = ~(0x01 << irq);
BUG_ON(!irq_mask_register);
/* Clear "irq"th bit */
val = ctrl_inw(irq_mask_register);
val &= mask;
ctrl_outw(val, irq_mask_register);
}
static void mask_and_ack_maskreg(unsigned int irq)
{
disable_maskreg_irq(irq);
}
static void end_maskreg_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
enable_maskreg_irq(irq);
}
void make_maskreg_irq(unsigned int irq)
{
disable_irq_nosync(irq);
irq_desc[irq].handler = &maskreg_irq_type;
disable_maskreg_irq(irq);
}
...@@ -126,12 +126,18 @@ int __init detect_cpu_and_cache_system(void) ...@@ -126,12 +126,18 @@ int __init detect_cpu_and_cache_system(void)
CPU_HAS_LLSC; CPU_HAS_LLSC;
break; break;
case 0x3008: case 0x3008:
if (prr == 0xa0) { if (prr == 0xa0 || prr == 0xa1) {
boot_cpu_data.type = CPU_SH7722; boot_cpu_data.type = CPU_SH7722;
boot_cpu_data.icache.ways = 4; boot_cpu_data.icache.ways = 4;
boot_cpu_data.dcache.ways = 4; boot_cpu_data.dcache.ways = 4;
boot_cpu_data.flags |= CPU_HAS_LLSC; boot_cpu_data.flags |= CPU_HAS_LLSC;
} }
else if (prr == 0x70) {
boot_cpu_data.type = CPU_SH7366;
boot_cpu_data.icache.ways = 4;
boot_cpu_data.dcache.ways = 4;
boot_cpu_data.flags |= CPU_HAS_LLSC;
}
break; break;
case 0x4000: /* 1st cut */ case 0x4000: /* 1st cut */
case 0x4001: /* 2nd cut */ case 0x4001: /* 2nd cut */
......
...@@ -9,6 +9,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o ...@@ -9,6 +9,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o
obj-$(CONFIG_CPU_SUBTYPE_SH7785) += setup-sh7785.o obj-$(CONFIG_CPU_SUBTYPE_SH7785) += setup-sh7785.o
obj-$(CONFIG_CPU_SUBTYPE_SH7343) += setup-sh7343.o obj-$(CONFIG_CPU_SUBTYPE_SH7343) += setup-sh7343.o
obj-$(CONFIG_CPU_SUBTYPE_SH7722) += setup-sh7722.o obj-$(CONFIG_CPU_SUBTYPE_SH7722) += setup-sh7722.o
obj-$(CONFIG_CPU_SUBTYPE_SH7366) += setup-sh7366.o
obj-$(CONFIG_CPU_SUBTYPE_SHX3) += setup-shx3.o obj-$(CONFIG_CPU_SUBTYPE_SHX3) += setup-shx3.o
# SMP setup # SMP setup
...@@ -21,6 +22,7 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o ...@@ -21,6 +22,7 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o
clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o
clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o
clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o
clock-$(CONFIG_CPU_SUBTYPE_SH7366) := clock-sh7722.o
clock-$(CONFIG_CPU_SUBTYPE_SHX3) := clock-shx3.o clock-$(CONFIG_CPU_SUBTYPE_SHX3) := clock-shx3.o
obj-y += $(clock-y) obj-y += $(clock-y)
......
/* /*
* arch/sh/kernel/cpu/sh4a/clock-sh7722.c * arch/sh/kernel/cpu/sh4a/clock-sh7722.c
* *
* SH7722 support for the clock framework * SH7722 & SH7366 support for the clock framework
* *
* Copyright (c) 2006-2007 Nomad Global Solutions Inc * Copyright (c) 2006-2007 Nomad Global Solutions Inc
* Based on code for sh7343 by Paul Mundt * Based on code for sh7343 by Paul Mundt
...@@ -417,15 +417,19 @@ static int sh7722_siu_which(struct clk *clk) ...@@ -417,15 +417,19 @@ static int sh7722_siu_which(struct clk *clk)
return 0; return 0;
if (!strcmp(clk->name, "siu_b_clk")) if (!strcmp(clk->name, "siu_b_clk"))
return 1; return 1;
#if defined(CONFIG_CPU_SUBTYPE_SH7722)
if (!strcmp(clk->name, "irda_clk")) if (!strcmp(clk->name, "irda_clk"))
return 2; return 2;
#endif
return -EINVAL; return -EINVAL;
} }
static unsigned long sh7722_siu_regs[] = { static unsigned long sh7722_siu_regs[] = {
[0] = SCLKACR, [0] = SCLKACR,
[1] = SCLKBCR, [1] = SCLKBCR,
#if defined(CONFIG_CPU_SUBTYPE_SH7722)
[2] = IrDACLKCR, [2] = IrDACLKCR,
#endif
}; };
static int sh7722_siu_start_stop(struct clk *clk, int enable) static int sh7722_siu_start_stop(struct clk *clk, int enable)
...@@ -571,10 +575,12 @@ static struct clk sh7722_siu_b_clock = { ...@@ -571,10 +575,12 @@ static struct clk sh7722_siu_b_clock = {
.ops = &sh7722_siu_clk_ops, .ops = &sh7722_siu_clk_ops,
}; };
#if defined(CONFIG_CPU_SUBTYPE_SH7722)
static struct clk sh7722_irda_clock = { static struct clk sh7722_irda_clock = {
.name = "irda_clk", .name = "irda_clk",
.ops = &sh7722_siu_clk_ops, .ops = &sh7722_siu_clk_ops,
}; };
#endif
static struct clk sh7722_video_clock = { static struct clk sh7722_video_clock = {
.name = "video_clk", .name = "video_clk",
...@@ -588,7 +594,9 @@ static struct clk *sh7722_clocks[] = { ...@@ -588,7 +594,9 @@ static struct clk *sh7722_clocks[] = {
&sh7722_sdram_clock, &sh7722_sdram_clock,
&sh7722_siu_a_clock, &sh7722_siu_a_clock,
&sh7722_siu_b_clock, &sh7722_siu_b_clock,
#if defined(CONFIG_CPU_SUBTYPE_SH7722)
&sh7722_irda_clock, &sh7722_irda_clock,
#endif
&sh7722_video_clock, &sh7722_video_clock,
}; };
......
/*
* SH7366 Setup
*
* Copyright (C) 2008 Renesas Solutions
*
* Based on linux/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/platform_device.h>
#include <linux/init.h>
#include <linux/serial.h>
#include <asm/sci.h>
static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xffe00000,
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 80, 80, 80, 80 },
}, {
.flags = 0,
}
};
static struct platform_device sci_device = {
.name = "sh-sci",
.id = -1,
.dev = {
.platform_data = sci_platform_data,
},
};
static struct platform_device *sh7366_devices[] __initdata = {
&sci_device,
};
static int __init sh7366_devices_setup(void)
{
return platform_add_devices(sh7366_devices,
ARRAY_SIZE(sh7366_devices));
}
__initcall(sh7366_devices_setup);
enum {
UNUSED=0,
/* interrupt sources */
IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
ICB,
DMAC0, DMAC1, DMAC2, DMAC3,
VIO_CEUI, VIO_BEUI, VIO_VEUI, VOU,
MFI, VPU, USB,
MMC_MMC1I, MMC_MMC2I, MMC_MMC3I,
DMAC4, DMAC5, DMAC_DADERR,
SCIF, SCIFA1, SCIFA2,
DENC, MSIOF,
FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI,
SDHI0, SDHI1, SDHI2, SDHI3,
CMT, TSIF, SIU,
TMU0, TMU1, TMU2,
VEU2, LCDC,
/* interrupt groups */
DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C, SDHI,
};
static struct intc_vect vectors[] __initdata = {
INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
INTC_VECT(IRQ6, 0x6c0), INTC_VECT(IRQ7, 0x6e0),
INTC_VECT(ICB, 0x700),
INTC_VECT(DMAC0, 0x800), INTC_VECT(DMAC1, 0x820),
INTC_VECT(DMAC2, 0x840), INTC_VECT(DMAC3, 0x860),
INTC_VECT(VIO_CEUI, 0x880), INTC_VECT(VIO_BEUI, 0x8a0),
INTC_VECT(VIO_VEUI, 0x8c0), INTC_VECT(VOU, 0x8e0),
INTC_VECT(MFI, 0x900), INTC_VECT(VPU, 0x980), INTC_VECT(USB, 0xa20),
INTC_VECT(MMC_MMC1I, 0xb00), INTC_VECT(MMC_MMC2I, 0xb20),
INTC_VECT(MMC_MMC3I, 0xb40),
INTC_VECT(DMAC4, 0xb80), INTC_VECT(DMAC5, 0xba0),
INTC_VECT(DMAC_DADERR, 0xbc0),
INTC_VECT(SCIF, 0xc00), INTC_VECT(SCIFA1, 0xc20),
INTC_VECT(SCIFA2, 0xc40),
INTC_VECT(DENC, 0xc60), INTC_VECT(MSIOF, 0xc80),
INTC_VECT(FLCTL_FLSTEI, 0xd80), INTC_VECT(FLCTL_FLENDI, 0xda0),
INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0),
INTC_VECT(I2C_ALI, 0xe00), INTC_VECT(I2C_TACKI, 0xe20),
INTC_VECT(I2C_WAITI, 0xe40), INTC_VECT(I2C_DTEI, 0xe60),
INTC_VECT(SDHI0, 0xe80), INTC_VECT(SDHI1, 0xea0),
INTC_VECT(SDHI2, 0xec0), INTC_VECT(SDHI3, 0xee0),
INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20),
INTC_VECT(SIU, 0xf80),
INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
INTC_VECT(TMU2, 0x440),
INTC_VECT(VEU2, 0x580), INTC_VECT(LCDC, 0x580),
};
static struct intc_group groups[] __initdata = {
INTC_GROUP(DMAC0123, DMAC0, DMAC1, DMAC2, DMAC3),
INTC_GROUP(VIOVOU, VIO_CEUI, VIO_BEUI, VIO_VEUI, VOU),
INTC_GROUP(MMC, MMC_MMC1I, MMC_MMC2I, MMC_MMC3I),
INTC_GROUP(DMAC45, DMAC4, DMAC5, DMAC_DADERR),
INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLENDI,
FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
INTC_GROUP(I2C, I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI),
INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3),
};
static struct intc_mask_reg mask_registers[] __initdata = {
{ 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */
{ } },
{ 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */
{ VOU, VIO_VEUI, VIO_BEUI, VIO_CEUI, DMAC3, DMAC2, DMAC1, DMAC0 } },
{ 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */
{ 0, 0, 0, VPU, 0, 0, 0, MFI } },
{ 0xa408008c, 0xa40800cc, 8, /* IMR3 / IMCR3 */
{ 0, 0, 0, ICB } },
{ 0xa4080090, 0xa40800d0, 8, /* IMR4 / IMCR4 */
{ 0, TMU2, TMU1, TMU0, VEU2, 0, 0, LCDC } },
{ 0xa4080094, 0xa40800d4, 8, /* IMR5 / IMCR5 */
{ 0, DMAC_DADERR, DMAC5, DMAC4, DENC, SCIFA2, SCIFA1, SCIF } },
{ 0xa4080098, 0xa40800d8, 8, /* IMR6 / IMCR6 */
{ 0, 0, 0, 0, 0, 0, 0, MSIOF } },
{ 0xa408009c, 0xa40800dc, 8, /* IMR7 / IMCR7 */
{ I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI,
FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } },
{ 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
{ SDHI3, SDHI2, SDHI1, SDHI0, 0, 0, 0, SIU } },
{ 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
{ 0, 0, 0, CMT, 0, USB, } },
{ 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */
{ 0, MMC_MMC3I, MMC_MMC2I, MMC_MMC1I } },
{ 0xa40800ac, 0xa40800ec, 8, /* IMR11 / IMCR11 */
{ 0, 0, 0, 0, 0, 0, 0, TSIF } },
{ 0xa4140044, 0xa4140064, 8, /* INTMSK00 / INTMSKCLR00 */
{ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
};
static struct intc_prio_reg prio_registers[] __initdata = {
{ 0xa4080000, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2 } },
{ 0xa4080004, 0, 16, 4, /* IPRB */ { VEU2, LCDC, ICB } },
{ 0xa4080008, 0, 16, 4, /* IPRC */ { } },
{ 0xa408000c, 0, 16, 4, /* IPRD */ { } },
{ 0xa4080010, 0, 16, 4, /* IPRE */ { DMAC0123, VIOVOU, MFI, VPU } },
{ 0xa4080014, 0, 16, 4, /* IPRF */ { 0, DMAC45, USB, CMT } },
{ 0xa4080018, 0, 16, 4, /* IPRG */ { SCIF, SCIFA1, SCIFA2, DENC } },
{ 0xa408001c, 0, 16, 4, /* IPRH */ { MSIOF, 0, FLCTL, I2C } },
{ 0xa4080020, 0, 16, 4, /* IPRI */ { 0, 0, TSIF, } },
{ 0xa4080024, 0, 16, 4, /* IPRJ */ { 0, 0, SIU } },
{ 0xa4080028, 0, 16, 4, /* IPRK */ { 0, MMC, 0, SDHI } },
{ 0xa408002c, 0, 16, 4, /* IPRL */ { } },
{ 0xa4140010, 0, 32, 4, /* INTPRI00 */
{ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
};
static struct intc_sense_reg sense_registers[] __initdata = {
{ 0xa414001c, 16, 2, /* ICR1 */
{ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
};
static DECLARE_INTC_DESC(intc_desc, "sh7366", vectors, groups,
mask_registers, prio_registers, sense_registers);
void __init plat_irq_setup(void)
{
register_intc_controller(&intc_desc);
}
void __init plat_mem_setup(void)
{
/* TODO: Register Node 1 */
}
...@@ -20,19 +20,18 @@ int __init detect_cpu_and_cache_system(void) ...@@ -20,19 +20,18 @@ int __init detect_cpu_and_cache_system(void)
{ {
unsigned long long cir; unsigned long long cir;
/* Do peeks in real mode to avoid having to set up a mapping for the /*
WPC registers. On SH5-101 cut2, such a mapping would be exposed to * Do peeks in real mode to avoid having to set up a mapping for
an address translation erratum which would make it hard to set up * the WPC registers. On SH5-101 cut2, such a mapping would be
correctly. */ * exposed to an address translation erratum which would make it
* hard to set up correctly.
*/
cir = peek_real_address_q(0x0d000008); cir = peek_real_address_q(0x0d000008);
if ((cir & 0xffff) == 0x5103) { if ((cir & 0xffff) == 0x5103)
boot_cpu_data.type = CPU_SH5_103; boot_cpu_data.type = CPU_SH5_103;
} else if (((cir >> 32) & 0xffff) == 0x51e2) { else if (((cir >> 32) & 0xffff) == 0x51e2)
/* CPU.VCR aliased at CIR address on SH5-101 */ /* CPU.VCR aliased at CIR address on SH5-101 */
boot_cpu_data.type = CPU_SH5_101; boot_cpu_data.type = CPU_SH5_101;
} else {
boot_cpu_data.type = CPU_SH_NONE;
}
/* /*
* First, setup some sane values for the I-cache. * First, setup some sane values for the I-cache.
...@@ -40,37 +39,33 @@ int __init detect_cpu_and_cache_system(void) ...@@ -40,37 +39,33 @@ int __init detect_cpu_and_cache_system(void)
boot_cpu_data.icache.ways = 4; boot_cpu_data.icache.ways = 4;
boot_cpu_data.icache.sets = 256; boot_cpu_data.icache.sets = 256;
boot_cpu_data.icache.linesz = L1_CACHE_BYTES; boot_cpu_data.icache.linesz = L1_CACHE_BYTES;
boot_cpu_data.icache.way_incr = (1 << 13);
boot_cpu_data.icache.entry_shift = 5;
boot_cpu_data.icache.way_size = boot_cpu_data.icache.sets *
boot_cpu_data.icache.linesz;
boot_cpu_data.icache.entry_mask = 0x1fe0;
boot_cpu_data.icache.flags = 0;
#if 0
/* /*
* FIXME: This can probably be cleaned up a bit as well.. for example, * Next, setup some sane values for the D-cache.
* do we really need the way shift _and_ the way_step_shift ?? Judging *
* by the existing code, I would guess no.. is there any valid reason * On the SH5, these are pretty consistent with the I-cache settings,
* why we need to be tracking this around? * so we just copy over the existing definitions.. these can be fixed
* up later, especially if we add runtime CPU probing.
*
* Though in the meantime it saves us from having to duplicate all of
* the above definitions..
*/ */
boot_cpu_data.icache.way_shift = 13; boot_cpu_data.dcache = boot_cpu_data.icache;
boot_cpu_data.icache.entry_shift = 5;
boot_cpu_data.icache.set_shift = 4;
boot_cpu_data.icache.way_step_shift = 16;
boot_cpu_data.icache.asid_shift = 2;
/* /*
* way offset = cache size / associativity, so just don't factor in * Setup any cache-related flags here
* associativity in the first place..
*/ */
boot_cpu_data.icache.way_ofs = boot_cpu_data.icache.sets * #if defined(CONFIG_CACHE_WRITETHROUGH)
boot_cpu_data.icache.linesz; set_bit(SH_CACHE_MODE_WT, &(boot_cpu_data.dcache.flags));
#elif defined(CONFIG_CACHE_WRITEBACK)
boot_cpu_data.icache.asid_mask = 0x3fc; set_bit(SH_CACHE_MODE_WB, &(boot_cpu_data.dcache.flags));
boot_cpu_data.icache.idx_mask = 0x1fe0;
boot_cpu_data.icache.epn_mask = 0xffffe000;
#endif #endif
boot_cpu_data.icache.flags = 0;
/* A trivial starting point.. */
memcpy(&boot_cpu_data.dcache,
&boot_cpu_data.icache, sizeof(struct cache_info));
return 0; return 0;
} }
...@@ -63,7 +63,13 @@ EXPORT_SYMBOL(memset_io); ...@@ -63,7 +63,13 @@ EXPORT_SYMBOL(memset_io);
void __iomem *ioport_map(unsigned long port, unsigned int nr) void __iomem *ioport_map(unsigned long port, unsigned int nr)
{ {
return sh_mv.mv_ioport_map(port, nr); void __iomem *ret;
ret = __ioport_map_trapped(port, nr);
if (ret)
return ret;
return __ioport_map(port, nr);
} }
EXPORT_SYMBOL(ioport_map); EXPORT_SYMBOL(ioport_map);
......
...@@ -33,17 +33,17 @@ static inline void delay(void) ...@@ -33,17 +33,17 @@ static inline void delay(void)
u8 generic_inb(unsigned long port) u8 generic_inb(unsigned long port)
{ {
return ctrl_inb((unsigned long __force)ioport_map(port, 1)); return ctrl_inb((unsigned long __force)__ioport_map(port, 1));
} }
u16 generic_inw(unsigned long port) u16 generic_inw(unsigned long port)
{ {
return ctrl_inw((unsigned long __force)ioport_map(port, 2)); return ctrl_inw((unsigned long __force)__ioport_map(port, 2));
} }
u32 generic_inl(unsigned long port) u32 generic_inl(unsigned long port)
{ {
return ctrl_inl((unsigned long __force)ioport_map(port, 4)); return ctrl_inl((unsigned long __force)__ioport_map(port, 4));
} }
u8 generic_inb_p(unsigned long port) u8 generic_inb_p(unsigned long port)
...@@ -81,7 +81,7 @@ void generic_insb(unsigned long port, void *dst, unsigned long count) ...@@ -81,7 +81,7 @@ void generic_insb(unsigned long port, void *dst, unsigned long count)
volatile u8 *port_addr; volatile u8 *port_addr;
u8 *buf = dst; u8 *buf = dst;
port_addr = (volatile u8 *)ioport_map(port, 1); port_addr = (volatile u8 *)__ioport_map(port, 1);
while (count--) while (count--)
*buf++ = *port_addr; *buf++ = *port_addr;
} }
...@@ -91,7 +91,7 @@ void generic_insw(unsigned long port, void *dst, unsigned long count) ...@@ -91,7 +91,7 @@ void generic_insw(unsigned long port, void *dst, unsigned long count)
volatile u16 *port_addr; volatile u16 *port_addr;
u16 *buf = dst; u16 *buf = dst;
port_addr = (volatile u16 *)ioport_map(port, 2); port_addr = (volatile u16 *)__ioport_map(port, 2);
while (count--) while (count--)
*buf++ = *port_addr; *buf++ = *port_addr;
...@@ -103,7 +103,7 @@ void generic_insl(unsigned long port, void *dst, unsigned long count) ...@@ -103,7 +103,7 @@ void generic_insl(unsigned long port, void *dst, unsigned long count)
volatile u32 *port_addr; volatile u32 *port_addr;
u32 *buf = dst; u32 *buf = dst;
port_addr = (volatile u32 *)ioport_map(port, 4); port_addr = (volatile u32 *)__ioport_map(port, 4);
while (count--) while (count--)
*buf++ = *port_addr; *buf++ = *port_addr;
...@@ -112,17 +112,17 @@ void generic_insl(unsigned long port, void *dst, unsigned long count) ...@@ -112,17 +112,17 @@ void generic_insl(unsigned long port, void *dst, unsigned long count)
void generic_outb(u8 b, unsigned long port) void generic_outb(u8 b, unsigned long port)
{ {
ctrl_outb(b, (unsigned long __force)ioport_map(port, 1)); ctrl_outb(b, (unsigned long __force)__ioport_map(port, 1));
} }
void generic_outw(u16 b, unsigned long port) void generic_outw(u16 b, unsigned long port)
{ {
ctrl_outw(b, (unsigned long __force)ioport_map(port, 2)); ctrl_outw(b, (unsigned long __force)__ioport_map(port, 2));
} }
void generic_outl(u32 b, unsigned long port) void generic_outl(u32 b, unsigned long port)
{ {
ctrl_outl(b, (unsigned long __force)ioport_map(port, 4)); ctrl_outl(b, (unsigned long __force)__ioport_map(port, 4));
} }
void generic_outb_p(u8 b, unsigned long port) void generic_outb_p(u8 b, unsigned long port)
...@@ -153,7 +153,7 @@ void generic_outsb(unsigned long port, const void *src, unsigned long count) ...@@ -153,7 +153,7 @@ void generic_outsb(unsigned long port, const void *src, unsigned long count)
volatile u8 *port_addr; volatile u8 *port_addr;
const u8 *buf = src; const u8 *buf = src;
port_addr = (volatile u8 __force *)ioport_map(port, 1); port_addr = (volatile u8 __force *)__ioport_map(port, 1);
while (count--) while (count--)
*port_addr = *buf++; *port_addr = *buf++;
...@@ -164,7 +164,7 @@ void generic_outsw(unsigned long port, const void *src, unsigned long count) ...@@ -164,7 +164,7 @@ void generic_outsw(unsigned long port, const void *src, unsigned long count)
volatile u16 *port_addr; volatile u16 *port_addr;
const u16 *buf = src; const u16 *buf = src;
port_addr = (volatile u16 __force *)ioport_map(port, 2); port_addr = (volatile u16 __force *)__ioport_map(port, 2);
while (count--) while (count--)
*port_addr = *buf++; *port_addr = *buf++;
...@@ -177,7 +177,7 @@ void generic_outsl(unsigned long port, const void *src, unsigned long count) ...@@ -177,7 +177,7 @@ void generic_outsl(unsigned long port, const void *src, unsigned long count)
volatile u32 *port_addr; volatile u32 *port_addr;
const u32 *buf = src; const u32 *buf = src;
port_addr = (volatile u32 __force *)ioport_map(port, 4); port_addr = (volatile u32 __force *)__ioport_map(port, 4);
while (count--) while (count--)
*port_addr = *buf++; *port_addr = *buf++;
......
/*
* Trapped io support
*
* Copyright (C) 2008 Magnus Damm
*
* Intercept io operations by trapping.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/bitops.h>
#include <linux/vmalloc.h>
#include <linux/module.h>
#include <asm/system.h>
#include <asm/mmu_context.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/io_trapped.h>
#define TRAPPED_PAGES_MAX 16
#ifdef CONFIG_HAS_IOPORT
LIST_HEAD(trapped_io);
EXPORT_SYMBOL_GPL(trapped_io);
#endif
#ifdef CONFIG_HAS_IOMEM
LIST_HEAD(trapped_mem);
EXPORT_SYMBOL_GPL(trapped_mem);
#endif
static DEFINE_SPINLOCK(trapped_lock);
int __init register_trapped_io(struct trapped_io *tiop)
{
struct resource *res;
unsigned long len = 0, flags = 0;
struct page *pages[TRAPPED_PAGES_MAX];
int k, n;
/* structure must be page aligned */
if ((unsigned long)tiop & (PAGE_SIZE - 1))
goto bad;
for (k = 0; k < tiop->num_resources; k++) {
res = tiop->resource + k;
len += roundup((res->end - res->start) + 1, PAGE_SIZE);
flags |= res->flags;
}
/* support IORESOURCE_IO _or_ MEM, not both */
if (hweight_long(flags) != 1)
goto bad;
n = len >> PAGE_SHIFT;
if (n >= TRAPPED_PAGES_MAX)
goto bad;
for (k = 0; k < n; k++)
pages[k] = virt_to_page(tiop);
tiop->virt_base = vmap(pages, n, VM_MAP, PAGE_NONE);
if (!tiop->virt_base)
goto bad;
len = 0;
for (k = 0; k < tiop->num_resources; k++) {
res = tiop->resource + k;
pr_info("trapped io 0x%08lx overrides %s 0x%08lx\n",
(unsigned long)(tiop->virt_base + len),
res->flags & IORESOURCE_IO ? "io" : "mmio",
(unsigned long)res->start);
len += roundup((res->end - res->start) + 1, PAGE_SIZE);
}
tiop->magic = IO_TRAPPED_MAGIC;
INIT_LIST_HEAD(&tiop->list);
spin_lock_irq(&trapped_lock);
if (flags & IORESOURCE_IO)
list_add(&tiop->list, &trapped_io);
if (flags & IORESOURCE_MEM)
list_add(&tiop->list, &trapped_mem);
spin_unlock_irq(&trapped_lock);
return 0;
bad:
pr_warning("unable to install trapped io filter\n");
return -1;
}
EXPORT_SYMBOL_GPL(register_trapped_io);
void __iomem *match_trapped_io_handler(struct list_head *list,
unsigned long offset,
unsigned long size)
{
unsigned long voffs;
struct trapped_io *tiop;
struct resource *res;
int k, len;
spin_lock_irq(&trapped_lock);
list_for_each_entry(tiop, list, list) {
voffs = 0;
for (k = 0; k < tiop->num_resources; k++) {
res = tiop->resource + k;
if (res->start == offset) {
spin_unlock_irq(&trapped_lock);
return tiop->virt_base + voffs;
}
len = (res->end - res->start) + 1;
voffs += roundup(len, PAGE_SIZE);
}
}
spin_unlock_irq(&trapped_lock);
return NULL;
}
EXPORT_SYMBOL_GPL(match_trapped_io_handler);
static struct trapped_io *lookup_tiop(unsigned long address)
{
pgd_t *pgd_k;
pud_t *pud_k;
pmd_t *pmd_k;
pte_t *pte_k;
pte_t entry;
pgd_k = swapper_pg_dir + pgd_index(address);
if (!pgd_present(*pgd_k))
return NULL;
pud_k = pud_offset(pgd_k, address);
if (!pud_present(*pud_k))
return NULL;
pmd_k = pmd_offset(pud_k, address);
if (!pmd_present(*pmd_k))
return NULL;
pte_k = pte_offset_kernel(pmd_k, address);
entry = *pte_k;
return pfn_to_kaddr(pte_pfn(entry));
}
static unsigned long lookup_address(struct trapped_io *tiop,
unsigned long address)
{
struct resource *res;
unsigned long vaddr = (unsigned long)tiop->virt_base;
unsigned long len;
int k;
for (k = 0; k < tiop->num_resources; k++) {
res = tiop->resource + k;
len = roundup((res->end - res->start) + 1, PAGE_SIZE);
if (address < (vaddr + len))
return res->start + (address - vaddr);
vaddr += len;
}
return 0;
}
static unsigned long long copy_word(unsigned long src_addr, int src_len,
unsigned long dst_addr, int dst_len)
{
unsigned long long tmp = 0;
switch (src_len) {
case 1:
tmp = ctrl_inb(src_addr);
break;
case 2:
tmp = ctrl_inw(src_addr);
break;
case 4:
tmp = ctrl_inl(src_addr);
break;
case 8:
tmp = ctrl_inq(src_addr);
break;
}
switch (dst_len) {
case 1:
ctrl_outb(tmp, dst_addr);
break;
case 2:
ctrl_outw(tmp, dst_addr);
break;
case 4:
ctrl_outl(tmp, dst_addr);
break;
case 8:
ctrl_outq(tmp, dst_addr);
break;
}
return tmp;
}
static unsigned long from_device(void *dst, const void *src, unsigned long cnt)
{
struct trapped_io *tiop;
unsigned long src_addr = (unsigned long)src;
unsigned long long tmp;
pr_debug("trapped io read 0x%08lx (%ld)\n", src_addr, cnt);
tiop = lookup_tiop(src_addr);
WARN_ON(!tiop || (tiop->magic != IO_TRAPPED_MAGIC));
src_addr = lookup_address(tiop, src_addr);
if (!src_addr)
return cnt;
tmp = copy_word(src_addr,
max_t(unsigned long, cnt,
(tiop->minimum_bus_width / 8)),
(unsigned long)dst, cnt);
pr_debug("trapped io read 0x%08lx -> 0x%08llx\n", src_addr, tmp);
return 0;
}
static unsigned long to_device(void *dst, const void *src, unsigned long cnt)
{
struct trapped_io *tiop;
unsigned long dst_addr = (unsigned long)dst;
unsigned long long tmp;
pr_debug("trapped io write 0x%08lx (%ld)\n", dst_addr, cnt);
tiop = lookup_tiop(dst_addr);
WARN_ON(!tiop || (tiop->magic != IO_TRAPPED_MAGIC));
dst_addr = lookup_address(tiop, dst_addr);
if (!dst_addr)
return cnt;
tmp = copy_word((unsigned long)src, cnt,
dst_addr, max_t(unsigned long, cnt,
(tiop->minimum_bus_width / 8)));
pr_debug("trapped io write 0x%08lx -> 0x%08llx\n", dst_addr, tmp);
return 0;
}
static struct mem_access trapped_io_access = {
from_device,
to_device,
};
int handle_trapped_io(struct pt_regs *regs, unsigned long address)
{
mm_segment_t oldfs;
opcode_t instruction;
int tmp;
if (!lookup_tiop(address))
return 0;
WARN_ON(user_mode(regs));
oldfs = get_fs();
set_fs(KERNEL_DS);
if (copy_from_user(&instruction, (void *)(regs->pc),
sizeof(instruction))) {
set_fs(oldfs);
return 0;
}
tmp = handle_unaligned_access(instruction, regs, &trapped_io_access);
set_fs(oldfs);
return tmp == 0;
}
...@@ -248,9 +248,6 @@ asmlinkage void do_softirq(void) ...@@ -248,9 +248,6 @@ asmlinkage void do_softirq(void)
void __init init_IRQ(void) void __init init_IRQ(void)
{ {
#ifdef CONFIG_CPU_HAS_PINT_IRQ
init_IRQ_pint();
#endif
plat_irq_setup(); plat_irq_setup();
/* Perform the machine specific initialisation */ /* Perform the machine specific initialisation */
......
...@@ -623,6 +623,7 @@ extern void interruptible_sleep_on(wait_queue_head_t *q); ...@@ -623,6 +623,7 @@ extern void interruptible_sleep_on(wait_queue_head_t *q);
#define mid_sched ((unsigned long) interruptible_sleep_on) #define mid_sched ((unsigned long) interruptible_sleep_on)
#ifdef CONFIG_FRAME_POINTER
static int in_sh64_switch_to(unsigned long pc) static int in_sh64_switch_to(unsigned long pc)
{ {
extern char __sh64_switch_to_end; extern char __sh64_switch_to_end;
...@@ -631,12 +632,10 @@ static int in_sh64_switch_to(unsigned long pc) ...@@ -631,12 +632,10 @@ static int in_sh64_switch_to(unsigned long pc)
return (pc >= (unsigned long) sh64_switch_to) && return (pc >= (unsigned long) sh64_switch_to) &&
(pc < (unsigned long) &__sh64_switch_to_end); (pc < (unsigned long) &__sh64_switch_to_end);
} }
#endif
unsigned long get_wchan(struct task_struct *p) unsigned long get_wchan(struct task_struct *p)
{ {
unsigned long schedule_fp;
unsigned long sh64_switch_to_fp;
unsigned long schedule_caller_pc;
unsigned long pc; unsigned long pc;
if (!p || p == current || p->state == TASK_RUNNING) if (!p || p == current || p->state == TASK_RUNNING)
...@@ -649,6 +648,10 @@ unsigned long get_wchan(struct task_struct *p) ...@@ -649,6 +648,10 @@ unsigned long get_wchan(struct task_struct *p)
#ifdef CONFIG_FRAME_POINTER #ifdef CONFIG_FRAME_POINTER
if (in_sh64_switch_to(pc)) { if (in_sh64_switch_to(pc)) {
unsigned long schedule_fp;
unsigned long sh64_switch_to_fp;
unsigned long schedule_caller_pc;
sh64_switch_to_fp = (long) p->thread.sp; sh64_switch_to_fp = (long) p->thread.sp;
/* r14 is saved at offset 4 in the sh64_switch_to frame */ /* r14 is saved at offset 4 in the sh64_switch_to frame */
schedule_fp = *(unsigned long *) (long)(sh64_switch_to_fp + 4); schedule_fp = *(unsigned long *) (long)(sh64_switch_to_fp + 4);
......
...@@ -220,7 +220,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) ...@@ -220,7 +220,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
dp = ((unsigned long) child) + THREAD_SIZE - dp = ((unsigned long) child) + THREAD_SIZE -
sizeof(struct pt_dspregs); sizeof(struct pt_dspregs);
if (*((int *) (dp - 4)) == SR_FD) { if (*((int *) (dp - 4)) == SR_FD) {
copy_to_user(addr, (void *) dp, copy_to_user((void *)addr, (void *) dp,
sizeof(struct pt_dspregs)); sizeof(struct pt_dspregs));
ret = 0; ret = 0;
} }
...@@ -234,7 +234,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) ...@@ -234,7 +234,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
dp = ((unsigned long) child) + THREAD_SIZE - dp = ((unsigned long) child) + THREAD_SIZE -
sizeof(struct pt_dspregs); sizeof(struct pt_dspregs);
if (*((int *) (dp - 4)) == SR_FD) { if (*((int *) (dp - 4)) == SR_FD) {
copy_from_user((void *) dp, addr, copy_from_user((void *) dp, (void *)addr,
sizeof(struct pt_dspregs)); sizeof(struct pt_dspregs));
ret = 0; ret = 0;
} }
......
...@@ -333,7 +333,7 @@ static const char *cpu_name[] = { ...@@ -333,7 +333,7 @@ static const char *cpu_name[] = {
[CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785", [CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785",
[CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3", [CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3",
[CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103", [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103",
[CPU_SH_NONE] = "Unknown" [CPU_SH7366] = "SH7366", [CPU_SH_NONE] = "Unknown"
}; };
const char *get_cpu_subtype(struct sh_cpuinfo *c) const char *get_cpu_subtype(struct sh_cpuinfo *c)
......
...@@ -338,6 +338,8 @@ ENTRY(sys_call_table) ...@@ -338,6 +338,8 @@ ENTRY(sys_call_table)
.long sys_epoll_pwait .long sys_epoll_pwait
.long sys_utimensat /* 320 */ .long sys_utimensat /* 320 */
.long sys_signalfd .long sys_signalfd
.long sys_ni_syscall .long sys_timerfd_create
.long sys_eventfd .long sys_eventfd
.long sys_fallocate .long sys_fallocate
.long sys_timerfd_settime /* 325 */
.long sys_timerfd_gettime
...@@ -376,6 +376,8 @@ sys_call_table: ...@@ -376,6 +376,8 @@ sys_call_table:
.long sys_epoll_pwait .long sys_epoll_pwait
.long sys_utimensat .long sys_utimensat
.long sys_signalfd .long sys_signalfd
.long sys_ni_syscall /* 350 */ .long sys_timerfd_create /* 350 */
.long sys_eventfd .long sys_eventfd
.long sys_fallocate .long sys_fallocate
.long sys_timerfd_settime
.long sys_timerfd_gettime
...@@ -120,10 +120,6 @@ static long last_rtc_update; ...@@ -120,10 +120,6 @@ static long last_rtc_update;
*/ */
void handle_timer_tick(void) void handle_timer_tick(void)
{ {
do_timer(1);
#ifndef CONFIG_SMP
update_process_times(user_mode(get_irq_regs()));
#endif
if (current->pid) if (current->pid)
profile_tick(CPU_PROFILING); profile_tick(CPU_PROFILING);
...@@ -132,6 +128,16 @@ void handle_timer_tick(void) ...@@ -132,6 +128,16 @@ void handle_timer_tick(void)
sh_mv.mv_heartbeat(); sh_mv.mv_heartbeat();
#endif #endif
/*
* Here we are in the timer irq handler. We just have irqs locally
* disabled but we don't know if the timer_bh is running on the other
* CPU. We need to avoid to SMP race with it. NOTE: we don' t need
* the irq version of write_lock because as just said we have irq
* locally disabled. -arca
*/
write_seqlock(&xtime_lock);
do_timer(1);
/* /*
* If we have an externally synchronized Linux clock, then update * If we have an externally synchronized Linux clock, then update
* RTC clock accordingly every ~11 minutes. Set_rtc_mmss() has to be * RTC clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
...@@ -147,6 +153,11 @@ void handle_timer_tick(void) ...@@ -147,6 +153,11 @@ void handle_timer_tick(void)
/* do it again in 60s */ /* do it again in 60s */
last_rtc_update = xtime.tv_sec - 600; last_rtc_update = xtime.tv_sec - 600;
} }
write_sequnlock(&xtime_lock);
#ifndef CONFIG_SMP
update_process_times(user_mode(get_irq_regs()));
#endif
} }
#endif /* !CONFIG_GENERIC_CLOCKEVENTS */ #endif /* !CONFIG_GENERIC_CLOCKEVENTS */
......
...@@ -229,15 +229,22 @@ static long last_rtc_update; ...@@ -229,15 +229,22 @@ static long last_rtc_update;
static inline void do_timer_interrupt(void) static inline void do_timer_interrupt(void)
{ {
unsigned long long current_ctc; unsigned long long current_ctc;
if (current->pid)
profile_tick(CPU_PROFILING);
/*
* Here we are in the timer irq handler. We just have irqs locally
* disabled but we don't know if the timer_bh is running on the other
* CPU. We need to avoid to SMP race with it. NOTE: we don' t need
* the irq version of write_lock because as just said we have irq
* locally disabled. -arca
*/
write_lock(&xtime_lock);
asm ("getcon cr62, %0" : "=r" (current_ctc)); asm ("getcon cr62, %0" : "=r" (current_ctc));
ctc_last_interrupt = (unsigned long) current_ctc; ctc_last_interrupt = (unsigned long) current_ctc;
do_timer(1); do_timer(1);
#ifndef CONFIG_SMP
update_process_times(user_mode(get_irq_regs()));
#endif
if (current->pid)
profile_tick(CPU_PROFILING);
#ifdef CONFIG_HEARTBEAT #ifdef CONFIG_HEARTBEAT
if (sh_mv.mv_heartbeat != NULL) if (sh_mv.mv_heartbeat != NULL)
...@@ -259,6 +266,11 @@ static inline void do_timer_interrupt(void) ...@@ -259,6 +266,11 @@ static inline void do_timer_interrupt(void)
/* do it again in 60 s */ /* do it again in 60 s */
last_rtc_update = xtime.tv_sec - 600; last_rtc_update = xtime.tv_sec - 600;
} }
write_unlock(&xtime_lock);
#ifndef CONFIG_SMP
update_process_times(user_mode(get_irq_regs()));
#endif
} }
/* /*
...@@ -275,16 +287,7 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id) ...@@ -275,16 +287,7 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id)
timer_status &= ~0x100; timer_status &= ~0x100;
ctrl_outw(timer_status, TMU0_TCR); ctrl_outw(timer_status, TMU0_TCR);
/*
* Here we are in the timer irq handler. We just have irqs locally
* disabled but we don't know if the timer_bh is running on the other
* CPU. We need to avoid to SMP race with it. NOTE: we don' t need
* the irq version of write_lock because as just said we have irq
* locally disabled. -arca
*/
write_lock(&xtime_lock);
do_timer_interrupt(); do_timer_interrupt();
write_unlock(&xtime_lock);
return IRQ_HANDLED; return IRQ_HANDLED;
} }
......
...@@ -154,7 +154,6 @@ static int mtu2_timer_stop(void) ...@@ -154,7 +154,6 @@ static int mtu2_timer_stop(void)
static int mtu2_timer_init(void) static int mtu2_timer_init(void)
{ {
u8 tmp;
unsigned long interval; unsigned long interval;
setup_irq(CONFIG_SH_TIMER_IRQ, &mtu2_irq); setup_irq(CONFIG_SH_TIMER_IRQ, &mtu2_irq);
......
...@@ -147,6 +147,36 @@ static int die_if_no_fixup(const char * str, struct pt_regs * regs, long err) ...@@ -147,6 +147,36 @@ static int die_if_no_fixup(const char * str, struct pt_regs * regs, long err)
return -EFAULT; return -EFAULT;
} }
static inline void sign_extend(unsigned int count, unsigned char *dst)
{
#ifdef __LITTLE_ENDIAN__
if ((count == 1) && dst[0] & 0x80) {
dst[1] = 0xff;
dst[2] = 0xff;
dst[3] = 0xff;
}
if ((count == 2) && dst[1] & 0x80) {
dst[2] = 0xff;
dst[3] = 0xff;
}
#else
if ((count == 1) && dst[3] & 0x80) {
dst[2] = 0xff;
dst[1] = 0xff;
dst[0] = 0xff;
}
if ((count == 2) && dst[2] & 0x80) {
dst[1] = 0xff;
dst[0] = 0xff;
}
#endif
}
static struct mem_access user_mem_access = {
copy_from_user,
copy_to_user,
};
/* /*
* handle an instruction that does an unaligned memory access by emulating the * handle an instruction that does an unaligned memory access by emulating the
* desired behaviour * desired behaviour
...@@ -154,7 +184,8 @@ static int die_if_no_fixup(const char * str, struct pt_regs * regs, long err) ...@@ -154,7 +184,8 @@ static int die_if_no_fixup(const char * str, struct pt_regs * regs, long err)
* (if that instruction is in a branch delay slot) * (if that instruction is in a branch delay slot)
* - return 0 if emulation okay, -EFAULT on existential error * - return 0 if emulation okay, -EFAULT on existential error
*/ */
static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs) static int handle_unaligned_ins(opcode_t instruction, struct pt_regs *regs,
struct mem_access *ma)
{ {
int ret, index, count; int ret, index, count;
unsigned long *rm, *rn; unsigned long *rm, *rn;
...@@ -178,25 +209,13 @@ static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs) ...@@ -178,25 +209,13 @@ static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs)
dst = (unsigned char*) rn; dst = (unsigned char*) rn;
*(unsigned long*)dst = 0; *(unsigned long*)dst = 0;
#ifdef __LITTLE_ENDIAN__ #if !defined(__LITTLE_ENDIAN__)
if (copy_from_user(dst, src, count))
goto fetch_fault;
if ((count == 2) && dst[1] & 0x80) {
dst[2] = 0xff;
dst[3] = 0xff;
}
#else
dst += 4-count; dst += 4-count;
#endif
if (__copy_user(dst, src, count)) if (ma->from(dst, src, count))
goto fetch_fault; goto fetch_fault;
if ((count == 2) && dst[2] & 0x80) { sign_extend(count, dst);
dst[0] = 0xff;
dst[1] = 0xff;
}
#endif
} else { } else {
/* to memory */ /* to memory */
src = (unsigned char*) rm; src = (unsigned char*) rm;
...@@ -206,7 +225,7 @@ static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs) ...@@ -206,7 +225,7 @@ static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs)
dst = (unsigned char*) *rn; dst = (unsigned char*) *rn;
dst += regs->regs[0]; dst += regs->regs[0];
if (copy_to_user(dst, src, count)) if (ma->to(dst, src, count))
goto fetch_fault; goto fetch_fault;
} }
ret = 0; ret = 0;
...@@ -217,7 +236,7 @@ static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs) ...@@ -217,7 +236,7 @@ static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs)
dst = (unsigned char*) *rn; dst = (unsigned char*) *rn;
dst += (instruction&0x000F)<<2; dst += (instruction&0x000F)<<2;
if (copy_to_user(dst,src,4)) if (ma->to(dst, src, 4))
goto fetch_fault; goto fetch_fault;
ret = 0; ret = 0;
break; break;
...@@ -230,7 +249,7 @@ static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs) ...@@ -230,7 +249,7 @@ static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs)
#if !defined(__LITTLE_ENDIAN__) #if !defined(__LITTLE_ENDIAN__)
src += 4-count; src += 4-count;
#endif #endif
if (copy_to_user(dst, src, count)) if (ma->to(dst, src, count))
goto fetch_fault; goto fetch_fault;
ret = 0; ret = 0;
break; break;
...@@ -241,7 +260,7 @@ static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs) ...@@ -241,7 +260,7 @@ static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs)
dst = (unsigned char*) rn; dst = (unsigned char*) rn;
*(unsigned long*)dst = 0; *(unsigned long*)dst = 0;
if (copy_from_user(dst,src,4)) if (ma->from(dst, src, 4))
goto fetch_fault; goto fetch_fault;
ret = 0; ret = 0;
break; break;
...@@ -253,25 +272,12 @@ static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs) ...@@ -253,25 +272,12 @@ static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs)
dst = (unsigned char*) rn; dst = (unsigned char*) rn;
*(unsigned long*)dst = 0; *(unsigned long*)dst = 0;
#ifdef __LITTLE_ENDIAN__ #if !defined(__LITTLE_ENDIAN__)
if (copy_from_user(dst, src, count))
goto fetch_fault;
if ((count == 2) && dst[1] & 0x80) {
dst[2] = 0xff;
dst[3] = 0xff;
}
#else
dst += 4-count; dst += 4-count;
if (copy_from_user(dst, src, count))
goto fetch_fault;
if ((count == 2) && dst[2] & 0x80) {
dst[0] = 0xff;
dst[1] = 0xff;
}
#endif #endif
if (ma->from(dst, src, count))
goto fetch_fault;
sign_extend(count, dst);
ret = 0; ret = 0;
break; break;
...@@ -285,7 +291,7 @@ static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs) ...@@ -285,7 +291,7 @@ static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs)
dst = (unsigned char*) *rm; /* called Rn in the spec */ dst = (unsigned char*) *rm; /* called Rn in the spec */
dst += (instruction&0x000F)<<1; dst += (instruction&0x000F)<<1;
if (copy_to_user(dst, src, 2)) if (ma->to(dst, src, 2))
goto fetch_fault; goto fetch_fault;
ret = 0; ret = 0;
break; break;
...@@ -299,21 +305,9 @@ static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs) ...@@ -299,21 +305,9 @@ static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs)
#if !defined(__LITTLE_ENDIAN__) #if !defined(__LITTLE_ENDIAN__)
dst += 2; dst += 2;
#endif #endif
if (ma->from(dst, src, 2))
if (copy_from_user(dst, src, 2))
goto fetch_fault; goto fetch_fault;
sign_extend(2, dst);
#ifdef __LITTLE_ENDIAN__
if (dst[1] & 0x80) {
dst[2] = 0xff;
dst[3] = 0xff;
}
#else
if (dst[2] & 0x80) {
dst[0] = 0xff;
dst[1] = 0xff;
}
#endif
ret = 0; ret = 0;
break; break;
} }
...@@ -332,11 +326,14 @@ static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs) ...@@ -332,11 +326,14 @@ static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs)
* emulate the instruction in the delay slot * emulate the instruction in the delay slot
* - fetches the instruction from PC+2 * - fetches the instruction from PC+2
*/ */
static inline int handle_unaligned_delayslot(struct pt_regs *regs) static inline int handle_delayslot(struct pt_regs *regs,
opcode_t old_instruction,
struct mem_access *ma)
{ {
u16 instruction; opcode_t instruction;
void *addr = (void *)(regs->pc + instruction_size(old_instruction));
if (copy_from_user(&instruction, (u16 *)(regs->pc+2), 2)) { if (copy_from_user(&instruction, addr, sizeof(instruction))) {
/* the instruction-fetch faulted */ /* the instruction-fetch faulted */
if (user_mode(regs)) if (user_mode(regs))
return -EFAULT; return -EFAULT;
...@@ -346,7 +343,7 @@ static inline int handle_unaligned_delayslot(struct pt_regs *regs) ...@@ -346,7 +343,7 @@ static inline int handle_unaligned_delayslot(struct pt_regs *regs)
regs, 0); regs, 0);
} }
return handle_unaligned_ins(instruction,regs); return handle_unaligned_ins(instruction, regs, ma);
} }
/* /*
...@@ -369,10 +366,11 @@ static inline int handle_unaligned_delayslot(struct pt_regs *regs) ...@@ -369,10 +366,11 @@ static inline int handle_unaligned_delayslot(struct pt_regs *regs)
* XXX: SH-2A needs this too, but it needs an overhaul thanks to mixed 32-bit * XXX: SH-2A needs this too, but it needs an overhaul thanks to mixed 32-bit
* opcodes.. * opcodes..
*/ */
#ifndef CONFIG_CPU_SH2A
static int handle_unaligned_notify_count = 10; static int handle_unaligned_notify_count = 10;
static int handle_unaligned_access(u16 instruction, struct pt_regs *regs) int handle_unaligned_access(opcode_t instruction, struct pt_regs *regs,
struct mem_access *ma)
{ {
u_int rm; u_int rm;
int ret, index; int ret, index;
...@@ -387,7 +385,7 @@ static int handle_unaligned_access(u16 instruction, struct pt_regs *regs) ...@@ -387,7 +385,7 @@ static int handle_unaligned_access(u16 instruction, struct pt_regs *regs)
printk(KERN_NOTICE "Fixing up unaligned userspace access " printk(KERN_NOTICE "Fixing up unaligned userspace access "
"in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n", "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
current->comm, task_pid_nr(current), current->comm, task_pid_nr(current),
(u16 *)regs->pc, instruction); (void *)regs->pc, instruction);
} }
ret = -EFAULT; ret = -EFAULT;
...@@ -395,19 +393,19 @@ static int handle_unaligned_access(u16 instruction, struct pt_regs *regs) ...@@ -395,19 +393,19 @@ static int handle_unaligned_access(u16 instruction, struct pt_regs *regs)
case 0x0000: case 0x0000:
if (instruction==0x000B) { if (instruction==0x000B) {
/* rts */ /* rts */
ret = handle_unaligned_delayslot(regs); ret = handle_delayslot(regs, instruction, ma);
if (ret==0) if (ret==0)
regs->pc = regs->pr; regs->pc = regs->pr;
} }
else if ((instruction&0x00FF)==0x0023) { else if ((instruction&0x00FF)==0x0023) {
/* braf @Rm */ /* braf @Rm */
ret = handle_unaligned_delayslot(regs); ret = handle_delayslot(regs, instruction, ma);
if (ret==0) if (ret==0)
regs->pc += rm + 4; regs->pc += rm + 4;
} }
else if ((instruction&0x00FF)==0x0003) { else if ((instruction&0x00FF)==0x0003) {
/* bsrf @Rm */ /* bsrf @Rm */
ret = handle_unaligned_delayslot(regs); ret = handle_delayslot(regs, instruction, ma);
if (ret==0) { if (ret==0) {
regs->pr = regs->pc + 4; regs->pr = regs->pc + 4;
regs->pc += rm + 4; regs->pc += rm + 4;
...@@ -428,13 +426,13 @@ static int handle_unaligned_access(u16 instruction, struct pt_regs *regs) ...@@ -428,13 +426,13 @@ static int handle_unaligned_access(u16 instruction, struct pt_regs *regs)
case 0x4000: case 0x4000:
if ((instruction&0x00FF)==0x002B) { if ((instruction&0x00FF)==0x002B) {
/* jmp @Rm */ /* jmp @Rm */
ret = handle_unaligned_delayslot(regs); ret = handle_delayslot(regs, instruction, ma);
if (ret==0) if (ret==0)
regs->pc = rm; regs->pc = rm;
} }
else if ((instruction&0x00FF)==0x000B) { else if ((instruction&0x00FF)==0x000B) {
/* jsr @Rm */ /* jsr @Rm */
ret = handle_unaligned_delayslot(regs); ret = handle_delayslot(regs, instruction, ma);
if (ret==0) { if (ret==0) {
regs->pr = regs->pc + 4; regs->pr = regs->pc + 4;
regs->pc = rm; regs->pc = rm;
...@@ -461,7 +459,7 @@ static int handle_unaligned_access(u16 instruction, struct pt_regs *regs) ...@@ -461,7 +459,7 @@ static int handle_unaligned_access(u16 instruction, struct pt_regs *regs)
case 0x0B00: /* bf lab - no delayslot*/ case 0x0B00: /* bf lab - no delayslot*/
break; break;
case 0x0F00: /* bf/s lab */ case 0x0F00: /* bf/s lab */
ret = handle_unaligned_delayslot(regs); ret = handle_delayslot(regs, instruction, ma);
if (ret==0) { if (ret==0) {
#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB) #if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)
if ((regs->sr & 0x00000001) != 0) if ((regs->sr & 0x00000001) != 0)
...@@ -474,7 +472,7 @@ static int handle_unaligned_access(u16 instruction, struct pt_regs *regs) ...@@ -474,7 +472,7 @@ static int handle_unaligned_access(u16 instruction, struct pt_regs *regs)
case 0x0900: /* bt lab - no delayslot */ case 0x0900: /* bt lab - no delayslot */
break; break;
case 0x0D00: /* bt/s lab */ case 0x0D00: /* bt/s lab */
ret = handle_unaligned_delayslot(regs); ret = handle_delayslot(regs, instruction, ma);
if (ret==0) { if (ret==0) {
#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB) #if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)
if ((regs->sr & 0x00000001) == 0) if ((regs->sr & 0x00000001) == 0)
...@@ -488,13 +486,13 @@ static int handle_unaligned_access(u16 instruction, struct pt_regs *regs) ...@@ -488,13 +486,13 @@ static int handle_unaligned_access(u16 instruction, struct pt_regs *regs)
break; break;
case 0xA000: /* bra label */ case 0xA000: /* bra label */
ret = handle_unaligned_delayslot(regs); ret = handle_delayslot(regs, instruction, ma);
if (ret==0) if (ret==0)
regs->pc += SH_PC_12BIT_OFFSET(instruction); regs->pc += SH_PC_12BIT_OFFSET(instruction);
break; break;
case 0xB000: /* bsr label */ case 0xB000: /* bsr label */
ret = handle_unaligned_delayslot(regs); ret = handle_delayslot(regs, instruction, ma);
if (ret==0) { if (ret==0) {
regs->pr = regs->pc + 4; regs->pr = regs->pc + 4;
regs->pc += SH_PC_12BIT_OFFSET(instruction); regs->pc += SH_PC_12BIT_OFFSET(instruction);
...@@ -505,12 +503,11 @@ static int handle_unaligned_access(u16 instruction, struct pt_regs *regs) ...@@ -505,12 +503,11 @@ static int handle_unaligned_access(u16 instruction, struct pt_regs *regs)
/* handle non-delay-slot instruction */ /* handle non-delay-slot instruction */
simple: simple:
ret = handle_unaligned_ins(instruction,regs); ret = handle_unaligned_ins(instruction, regs, ma);
if (ret==0) if (ret==0)
regs->pc += instruction_size(instruction); regs->pc += instruction_size(instruction);
return ret; return ret;
} }
#endif /* CONFIG_CPU_SH2A */
#ifdef CONFIG_CPU_HAS_SR_RB #ifdef CONFIG_CPU_HAS_SR_RB
#define lookup_exception_vector(x) \ #define lookup_exception_vector(x) \
...@@ -538,10 +535,8 @@ asmlinkage void do_address_error(struct pt_regs *regs, ...@@ -538,10 +535,8 @@ asmlinkage void do_address_error(struct pt_regs *regs,
unsigned long error_code = 0; unsigned long error_code = 0;
mm_segment_t oldfs; mm_segment_t oldfs;
siginfo_t info; siginfo_t info;
#ifndef CONFIG_CPU_SH2A opcode_t instruction;
u16 instruction;
int tmp; int tmp;
#endif
/* Intentional ifdef */ /* Intentional ifdef */
#ifdef CONFIG_CPU_HAS_SR_RB #ifdef CONFIG_CPU_HAS_SR_RB
...@@ -561,9 +556,9 @@ asmlinkage void do_address_error(struct pt_regs *regs, ...@@ -561,9 +556,9 @@ asmlinkage void do_address_error(struct pt_regs *regs,
goto uspace_segv; goto uspace_segv;
} }
#ifndef CONFIG_CPU_SH2A
set_fs(USER_DS); set_fs(USER_DS);
if (copy_from_user(&instruction, (u16 *)(regs->pc), 2)) { if (copy_from_user(&instruction, (void *)(regs->pc),
sizeof(instruction))) {
/* Argh. Fault on the instruction itself. /* Argh. Fault on the instruction itself.
This should never happen non-SMP This should never happen non-SMP
*/ */
...@@ -571,13 +566,12 @@ asmlinkage void do_address_error(struct pt_regs *regs, ...@@ -571,13 +566,12 @@ asmlinkage void do_address_error(struct pt_regs *regs,
goto uspace_segv; goto uspace_segv;
} }
tmp = handle_unaligned_access(instruction, regs); tmp = handle_unaligned_access(instruction, regs,
&user_mem_access);
set_fs(oldfs); set_fs(oldfs);
if (tmp==0) if (tmp==0)
return; /* sorted */ return; /* sorted */
#endif
uspace_segv: uspace_segv:
printk(KERN_NOTICE "Sending SIGBUS to \"%s\" due to unaligned " printk(KERN_NOTICE "Sending SIGBUS to \"%s\" due to unaligned "
"access (PC %lx PR %lx)\n", current->comm, regs->pc, "access (PC %lx PR %lx)\n", current->comm, regs->pc,
...@@ -592,9 +586,9 @@ asmlinkage void do_address_error(struct pt_regs *regs, ...@@ -592,9 +586,9 @@ asmlinkage void do_address_error(struct pt_regs *regs,
if (regs->pc & 1) if (regs->pc & 1)
die("unaligned program counter", regs, error_code); die("unaligned program counter", regs, error_code);
#ifndef CONFIG_CPU_SH2A
set_fs(KERNEL_DS); set_fs(KERNEL_DS);
if (copy_from_user(&instruction, (u16 *)(regs->pc), 2)) { if (copy_from_user(&instruction, (void *)(regs->pc),
sizeof(instruction))) {
/* Argh. Fault on the instruction itself. /* Argh. Fault on the instruction itself.
This should never happen non-SMP This should never happen non-SMP
*/ */
...@@ -602,14 +596,8 @@ asmlinkage void do_address_error(struct pt_regs *regs, ...@@ -602,14 +596,8 @@ asmlinkage void do_address_error(struct pt_regs *regs,
die("insn faulting in do_address_error", regs, 0); die("insn faulting in do_address_error", regs, 0);
} }
handle_unaligned_access(instruction, regs); handle_unaligned_access(instruction, regs, &user_mem_access);
set_fs(oldfs); set_fs(oldfs);
#else
printk(KERN_NOTICE "Killing process \"%s\" due to unaligned "
"access\n", current->comm);
force_sig(SIGSEGV, current);
#endif
} }
} }
......
...@@ -630,7 +630,7 @@ static int misaligned_fpu_load(struct pt_regs *regs, ...@@ -630,7 +630,7 @@ static int misaligned_fpu_load(struct pt_regs *regs,
current->thread.fpu.hard.fp_regs[destreg] = buflo; current->thread.fpu.hard.fp_regs[destreg] = buflo;
current->thread.fpu.hard.fp_regs[destreg+1] = bufhi; current->thread.fpu.hard.fp_regs[destreg+1] = bufhi;
} else { } else {
#if defined(CONFIG_LITTLE_ENDIAN) #if defined(CONFIG_CPU_LITTLE_ENDIAN)
current->thread.fpu.hard.fp_regs[destreg] = bufhi; current->thread.fpu.hard.fp_regs[destreg] = bufhi;
current->thread.fpu.hard.fp_regs[destreg+1] = buflo; current->thread.fpu.hard.fp_regs[destreg+1] = buflo;
#else #else
...@@ -700,7 +700,7 @@ static int misaligned_fpu_store(struct pt_regs *regs, ...@@ -700,7 +700,7 @@ static int misaligned_fpu_store(struct pt_regs *regs,
buflo = current->thread.fpu.hard.fp_regs[srcreg]; buflo = current->thread.fpu.hard.fp_regs[srcreg];
bufhi = current->thread.fpu.hard.fp_regs[srcreg+1]; bufhi = current->thread.fpu.hard.fp_regs[srcreg+1];
} else { } else {
#if defined(CONFIG_LITTLE_ENDIAN) #if defined(CONFIG_CPU_LITTLE_ENDIAN)
bufhi = current->thread.fpu.hard.fp_regs[srcreg]; bufhi = current->thread.fpu.hard.fp_regs[srcreg];
buflo = current->thread.fpu.hard.fp_regs[srcreg+1]; buflo = current->thread.fpu.hard.fp_regs[srcreg+1];
#else #else
......
...@@ -51,7 +51,7 @@ SECTIONS ...@@ -51,7 +51,7 @@ SECTIONS
KPROBES_TEXT KPROBES_TEXT
*(.fixup) *(.fixup)
*(.gnu.warning) *(.gnu.warning)
#ifdef CONFIG_LITTLE_ENDIAN #ifdef CONFIG_CPU_LITTLE_ENDIAN
} = 0x6ff0fff0 } = 0x6ff0fff0
#else #else
} = 0xf0fff06f } = 0xf0fff06f
......
此差异已折叠。
...@@ -26,7 +26,7 @@ struct dma_coherent_mem { ...@@ -26,7 +26,7 @@ struct dma_coherent_mem {
void *dma_alloc_coherent(struct device *dev, size_t size, void *dma_alloc_coherent(struct device *dev, size_t size,
dma_addr_t *dma_handle, gfp_t gfp) dma_addr_t *dma_handle, gfp_t gfp)
{ {
void *ret; void *ret, *ret_nocache;
struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL; struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL;
int order = get_order(size); int order = get_order(size);
...@@ -44,17 +44,24 @@ void *dma_alloc_coherent(struct device *dev, size_t size, ...@@ -44,17 +44,24 @@ void *dma_alloc_coherent(struct device *dev, size_t size,
} }
ret = (void *)__get_free_pages(gfp, order); ret = (void *)__get_free_pages(gfp, order);
if (!ret)
return NULL;
if (ret != NULL) {
memset(ret, 0, size); memset(ret, 0, size);
/* /*
* Pages from the page allocator may have data present in * Pages from the page allocator may have data present in
* cache. So flush the cache before using uncached memory. * cache. So flush the cache before using uncached memory.
*/ */
dma_cache_sync(NULL, ret, size, DMA_BIDIRECTIONAL); dma_cache_sync(dev, ret, size, DMA_BIDIRECTIONAL);
*dma_handle = virt_to_phys(ret);
ret_nocache = ioremap_nocache(virt_to_phys(ret), size);
if (!ret_nocache) {
free_pages((unsigned long)ret, order);
return NULL;
} }
return ret;
*dma_handle = virt_to_phys(ret);
return ret_nocache;
} }
EXPORT_SYMBOL(dma_alloc_coherent); EXPORT_SYMBOL(dma_alloc_coherent);
...@@ -71,7 +78,8 @@ void dma_free_coherent(struct device *dev, size_t size, ...@@ -71,7 +78,8 @@ void dma_free_coherent(struct device *dev, size_t size,
} else { } else {
WARN_ON(irqs_disabled()); /* for portability */ WARN_ON(irqs_disabled()); /* for portability */
BUG_ON(mem && mem->flags & DMA_MEMORY_EXCLUSIVE); BUG_ON(mem && mem->flags & DMA_MEMORY_EXCLUSIVE);
free_pages((unsigned long)vaddr, order); free_pages((unsigned long)phys_to_virt(dma_handle), order);
iounmap(vaddr);
} }
} }
EXPORT_SYMBOL(dma_free_coherent); EXPORT_SYMBOL(dma_free_coherent);
......
...@@ -15,6 +15,7 @@ ...@@ -15,6 +15,7 @@
#include <linux/mm.h> #include <linux/mm.h>
#include <linux/hardirq.h> #include <linux/hardirq.h>
#include <linux/kprobes.h> #include <linux/kprobes.h>
#include <asm/io_trapped.h>
#include <asm/system.h> #include <asm/system.h>
#include <asm/mmu_context.h> #include <asm/mmu_context.h>
#include <asm/tlbflush.h> #include <asm/tlbflush.h>
...@@ -163,6 +164,8 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs, ...@@ -163,6 +164,8 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs,
if (fixup_exception(regs)) if (fixup_exception(regs))
return; return;
if (handle_trapped_io(regs, address))
return;
/* /*
* Oops. The kernel tried to access some bad page. We'll have to * Oops. The kernel tried to access some bad page. We'll have to
* terminate things with extreme prejudice. * terminate things with extreme prejudice.
...@@ -296,6 +299,14 @@ asmlinkage int __kprobes __do_page_fault(struct pt_regs *regs, ...@@ -296,6 +299,14 @@ asmlinkage int __kprobes __do_page_fault(struct pt_regs *regs,
entry = pte_mkdirty(entry); entry = pte_mkdirty(entry);
entry = pte_mkyoung(entry); entry = pte_mkyoung(entry);
#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SMP)
/*
* ITLB is not affected by "ldtlb" instruction.
* So, we need to flush the entry by ourselves.
*/
local_flush_tlb_one(get_asid(), address & PAGE_MASK);
#endif
set_pte(pte, entry); set_pte(pte, entry);
update_mmu_cache(NULL, address, entry); update_mmu_cache(NULL, address, entry);
......
...@@ -203,6 +203,7 @@ void __init paging_init(void) ...@@ -203,6 +203,7 @@ void __init paging_init(void)
free_area_init_nodes(max_zone_pfns); free_area_init_nodes(max_zone_pfns);
#ifdef CONFIG_SUPERH32
/* Set up the uncached fixmap */ /* Set up the uncached fixmap */
set_fixmap_nocache(FIX_UNCACHED, __pa(&__uncached_start)); set_fixmap_nocache(FIX_UNCACHED, __pa(&__uncached_start));
...@@ -214,6 +215,7 @@ void __init paging_init(void) ...@@ -214,6 +215,7 @@ void __init paging_init(void)
*/ */
cached_to_uncached = P2SEG - P1SEG; cached_to_uncached = P2SEG - P1SEG;
#endif #endif
#endif
} }
static struct kcore_list kcore_mem, kcore_vmalloc; static struct kcore_list kcore_mem, kcore_vmalloc;
......
...@@ -45,3 +45,5 @@ MAGICPANELR2 SH_MAGIC_PANEL_R2 ...@@ -45,3 +45,5 @@ MAGICPANELR2 SH_MAGIC_PANEL_R2
R2D_PLUS RTS7751R2D_PLUS R2D_PLUS RTS7751R2D_PLUS
R2D_1 RTS7751R2D_1 R2D_1 RTS7751R2D_1
CAYMAN SH_CAYMAN CAYMAN SH_CAYMAN
SDK7780 SH_SDK7780
MIGOR SH_MIGOR
...@@ -393,7 +393,7 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) ...@@ -393,7 +393,7 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
if (cflag & CRTSCTS) { if (cflag & CRTSCTS) {
fcr_val |= SCFCR_MCE; fcr_val |= SCFCR_MCE;
} else { } else {
#ifdef CONFIG_CPU_SUBTYPE_SH7343 #if defined(CONFIG_CPU_SUBTYPE_SH7343) || defined(CONFIG_CPU_SUBTYPE_SH7366)
/* Nothing */ /* Nothing */
#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
defined(CONFIG_CPU_SUBTYPE_SH7780) || \ defined(CONFIG_CPU_SUBTYPE_SH7780) || \
......
...@@ -97,13 +97,18 @@ ...@@ -97,13 +97,18 @@
# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ # define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
# define SCIF_ONLY # define SCIF_ONLY
# define PORT_PSCR 0xA405011E # define PORT_PSCR 0xA405011E
#elif defined(CONFIG_CPU_SUBTYPE_SH7366)
# define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */
# define SCSPTR0 SCPDR0
# define SCIF_ORER 0x0001 /* overrun error bit */
# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
# define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH4_202) #elif defined(CONFIG_CPU_SUBTYPE_SH4_202)
# define SCSPTR2 0xffe80020 /* 16 bit SCIF */ # define SCSPTR2 0xffe80020 /* 16 bit SCIF */
# define SCIF_ORER 0x0001 /* overrun error bit */ # define SCIF_ORER 0x0001 /* overrun error bit */
# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
# define SCIF_ONLY # define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) #elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
# include <asm/hardware.h>
# define SCIF_BASE_ADDR 0x01030000 # define SCIF_BASE_ADDR 0x01030000
# define SCIF_ADDR_SH5 PHYS_PERIPHERAL_BLOCK+SCIF_BASE_ADDR # define SCIF_ADDR_SH5 PHYS_PERIPHERAL_BLOCK+SCIF_BASE_ADDR
# define SCIF_PTR2_OFFS 0x0000020 # define SCIF_PTR2_OFFS 0x0000020
...@@ -577,7 +582,7 @@ static inline int sci_rxd_in(struct uart_port *port) ...@@ -577,7 +582,7 @@ static inline int sci_rxd_in(struct uart_port *port)
return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
return 1; return 1;
} }
#elif defined(CONFIG_CPU_SUBTYPE_SH7722) #elif defined(CONFIG_CPU_SUBTYPE_SH7722) || defined(CONFIG_CPU_SUBTYPE_SH7366)
static inline int sci_rxd_in(struct uart_port *port) static inline int sci_rxd_in(struct uart_port *port)
{ {
if (port->mapbase == 0xffe00000) if (port->mapbase == 0xffe00000)
......
...@@ -31,6 +31,7 @@ ...@@ -31,6 +31,7 @@
#include <asm/mach/dma.h> #include <asm/mach/dma.h>
#include <asm/mach/sysasic.h> #include <asm/mach/sysasic.h>
#include <asm/mach/maple.h> #include <asm/mach/maple.h>
#include <linux/delay.h>
MODULE_AUTHOR("Yaegshi Takeshi, Paul Mundt, M.R. Brown, Adrian McMenamin"); MODULE_AUTHOR("Yaegshi Takeshi, Paul Mundt, M.R. Brown, Adrian McMenamin");
MODULE_DESCRIPTION("Maple bus driver for Dreamcast"); MODULE_DESCRIPTION("Maple bus driver for Dreamcast");
...@@ -53,7 +54,7 @@ static struct device maple_bus; ...@@ -53,7 +54,7 @@ static struct device maple_bus;
static int subdevice_map[MAPLE_PORTS]; static int subdevice_map[MAPLE_PORTS];
static unsigned long *maple_sendbuf, *maple_sendptr, *maple_lastptr; static unsigned long *maple_sendbuf, *maple_sendptr, *maple_lastptr;
static unsigned long maple_pnp_time; static unsigned long maple_pnp_time;
static int started, scanning, liststatus; static int started, scanning, liststatus, realscan;
static struct kmem_cache *maple_queue_cache; static struct kmem_cache *maple_queue_cache;
struct maple_device_specify { struct maple_device_specify {
...@@ -94,7 +95,7 @@ static void maplebus_dma_reset(void) ...@@ -94,7 +95,7 @@ static void maplebus_dma_reset(void)
* @function: the function code for the device * @function: the function code for the device
*/ */
void maple_getcond_callback(struct maple_device *dev, void maple_getcond_callback(struct maple_device *dev,
void (*callback) (struct mapleq * mq), void (*callback) (struct mapleq *mq),
unsigned long interval, unsigned long function) unsigned long interval, unsigned long function)
{ {
dev->callback = callback; dev->callback = callback;
...@@ -111,10 +112,19 @@ static int maple_dma_done(void) ...@@ -111,10 +112,19 @@ static int maple_dma_done(void)
static void maple_release_device(struct device *dev) static void maple_release_device(struct device *dev)
{ {
if (dev->type) { struct maple_device *mdev;
kfree(dev->type->name); struct mapleq *mq;
kfree(dev->type); if (!dev)
return;
mdev = to_maple_dev(dev);
mq = mdev->mq;
if (mq) {
if (mq->recvbufdcsp)
kmem_cache_free(maple_queue_cache, mq->recvbufdcsp);
kfree(mq);
mq = NULL;
} }
kfree(mdev);
} }
/** /**
...@@ -129,7 +139,7 @@ void maple_add_packet(struct mapleq *mq) ...@@ -129,7 +139,7 @@ void maple_add_packet(struct mapleq *mq)
} }
EXPORT_SYMBOL_GPL(maple_add_packet); EXPORT_SYMBOL_GPL(maple_add_packet);
static struct mapleq *maple_allocq(struct maple_device *dev) static struct mapleq *maple_allocq(struct maple_device *mdev)
{ {
struct mapleq *mq; struct mapleq *mq;
...@@ -137,7 +147,7 @@ static struct mapleq *maple_allocq(struct maple_device *dev) ...@@ -137,7 +147,7 @@ static struct mapleq *maple_allocq(struct maple_device *dev)
if (!mq) if (!mq)
return NULL; return NULL;
mq->dev = dev; mq->dev = mdev;
mq->recvbufdcsp = kmem_cache_zalloc(maple_queue_cache, GFP_KERNEL); mq->recvbufdcsp = kmem_cache_zalloc(maple_queue_cache, GFP_KERNEL);
mq->recvbuf = (void *) P2SEGADDR(mq->recvbufdcsp); mq->recvbuf = (void *) P2SEGADDR(mq->recvbufdcsp);
if (!mq->recvbuf) { if (!mq->recvbuf) {
...@@ -150,22 +160,24 @@ static struct mapleq *maple_allocq(struct maple_device *dev) ...@@ -150,22 +160,24 @@ static struct mapleq *maple_allocq(struct maple_device *dev)
static struct maple_device *maple_alloc_dev(int port, int unit) static struct maple_device *maple_alloc_dev(int port, int unit)
{ {
struct maple_device *dev; struct maple_device *mdev;
dev = kzalloc(sizeof(*dev), GFP_KERNEL); mdev = kzalloc(sizeof(*mdev), GFP_KERNEL);
if (!dev) if (!mdev)
return NULL; return NULL;
dev->port = port; mdev->port = port;
dev->unit = unit; mdev->unit = unit;
dev->mq = maple_allocq(dev); mdev->mq = maple_allocq(mdev);
if (!dev->mq) { if (!mdev->mq) {
kfree(dev); kfree(mdev);
return NULL; return NULL;
} }
mdev->dev.bus = &maple_bus_type;
return dev; mdev->dev.parent = &maple_bus;
mdev->function = 0;
return mdev;
} }
static void maple_free_dev(struct maple_device *mdev) static void maple_free_dev(struct maple_device *mdev)
...@@ -173,7 +185,9 @@ static void maple_free_dev(struct maple_device *mdev) ...@@ -173,7 +185,9 @@ static void maple_free_dev(struct maple_device *mdev)
if (!mdev) if (!mdev)
return; return;
if (mdev->mq) { if (mdev->mq) {
kmem_cache_free(maple_queue_cache, mdev->mq->recvbufdcsp); if (mdev->mq->recvbufdcsp)
kmem_cache_free(maple_queue_cache,
mdev->mq->recvbufdcsp);
kfree(mdev->mq); kfree(mdev->mq);
} }
kfree(mdev); kfree(mdev);
...@@ -257,80 +271,89 @@ static void maple_detach_driver(struct maple_device *mdev) ...@@ -257,80 +271,89 @@ static void maple_detach_driver(struct maple_device *mdev)
mdev->driver->disconnect(mdev); mdev->driver->disconnect(mdev);
} }
mdev->driver = NULL; mdev->driver = NULL;
if (mdev->registered) {
maple_release_device(&mdev->dev);
device_unregister(&mdev->dev); device_unregister(&mdev->dev);
} mdev = NULL;
mdev->registered = 0;
maple_free_dev(mdev);
} }
/* process initial MAPLE_COMMAND_DEVINFO for each device or port */ /* process initial MAPLE_COMMAND_DEVINFO for each device or port */
static void maple_attach_driver(struct maple_device *dev) static void maple_attach_driver(struct maple_device *mdev)
{ {
char *p; char *p, *recvbuf;
char *recvbuf;
unsigned long function; unsigned long function;
int matched, retval; int matched, retval;
recvbuf = dev->mq->recvbuf; recvbuf = mdev->mq->recvbuf;
memcpy(&dev->devinfo, recvbuf + 4, sizeof(dev->devinfo)); /* copy the data as individual elements in
memcpy(dev->product_name, dev->devinfo.product_name, 30); * case of memory optimisation */
memcpy(dev->product_licence, dev->devinfo.product_licence, 60); memcpy(&mdev->devinfo.function, recvbuf + 4, 4);
dev->product_name[30] = '\0'; memcpy(&mdev->devinfo.function_data[0], recvbuf + 8, 12);
dev->product_licence[60] = '\0'; memcpy(&mdev->devinfo.area_code, recvbuf + 20, 1);
memcpy(&mdev->devinfo.connector_direction, recvbuf + 21, 1);
for (p = dev->product_name + 29; dev->product_name <= p; p--) memcpy(&mdev->devinfo.product_name[0], recvbuf + 22, 30);
memcpy(&mdev->devinfo.product_licence[0], recvbuf + 52, 60);
memcpy(&mdev->devinfo.standby_power, recvbuf + 112, 2);
memcpy(&mdev->devinfo.max_power, recvbuf + 114, 2);
memcpy(mdev->product_name, mdev->devinfo.product_name, 30);
mdev->product_name[30] = '\0';
memcpy(mdev->product_licence, mdev->devinfo.product_licence, 60);
mdev->product_licence[60] = '\0';
for (p = mdev->product_name + 29; mdev->product_name <= p; p--)
if (*p == ' ') if (*p == ' ')
*p = '\0'; *p = '\0';
else else
break; break;
for (p = mdev->product_licence + 59; mdev->product_licence <= p; p--)
for (p = dev->product_licence + 59; dev->product_licence <= p; p--)
if (*p == ' ') if (*p == ' ')
*p = '\0'; *p = '\0';
else else
break; break;
function = be32_to_cpu(dev->devinfo.function); if (realscan) {
printk(KERN_INFO "Maple device detected: %s\n",
mdev->product_name);
printk(KERN_INFO "Maple device: %s\n", mdev->product_licence);
}
function = be32_to_cpu(mdev->devinfo.function);
if (function > 0x200) { if (function > 0x200) {
/* Do this silently - as not a real device */ /* Do this silently - as not a real device */
function = 0; function = 0;
dev->driver = &maple_dummy_driver; mdev->driver = &maple_dummy_driver;
sprintf(dev->dev.bus_id, "%d:0.port", dev->port); sprintf(mdev->dev.bus_id, "%d:0.port", mdev->port);
} else { } else {
if (realscan)
printk(KERN_INFO printk(KERN_INFO
"Maple bus at (%d, %d): Connected function 0x%lX\n", "Maple bus at (%d, %d): Function 0x%lX\n",
dev->port, dev->unit, function); mdev->port, mdev->unit, function);
matched = matched =
bus_for_each_drv(&maple_bus_type, NULL, dev, bus_for_each_drv(&maple_bus_type, NULL, mdev,
attach_matching_maple_driver); attach_matching_maple_driver);
if (matched == 0) { if (matched == 0) {
/* Driver does not exist yet */ /* Driver does not exist yet */
if (realscan)
printk(KERN_INFO printk(KERN_INFO
"No maple driver found for this device\n"); "No maple driver found.\n");
dev->driver = &maple_dummy_driver; mdev->driver = &maple_dummy_driver;
} }
sprintf(mdev->dev.bus_id, "%d:0%d.%lX", mdev->port,
sprintf(dev->dev.bus_id, "%d:0%d.%lX", dev->port, mdev->unit, function);
dev->unit, function);
} }
dev->function = function; mdev->function = function;
dev->dev.bus = &maple_bus_type; mdev->dev.release = &maple_release_device;
dev->dev.parent = &maple_bus; retval = device_register(&mdev->dev);
dev->dev.release = &maple_release_device;
retval = device_register(&dev->dev);
if (retval) { if (retval) {
printk(KERN_INFO printk(KERN_INFO
"Maple bus: Attempt to register device (%x, %x) failed.\n", "Maple bus: Attempt to register device"
dev->port, dev->unit); " (%x, %x) failed.\n",
maple_free_dev(dev); mdev->port, mdev->unit);
maple_free_dev(mdev);
mdev = NULL;
return;
} }
dev->registered = 1;
} }
/* /*
...@@ -516,7 +539,8 @@ static void maple_dma_handler(struct work_struct *work) ...@@ -516,7 +539,8 @@ static void maple_dma_handler(struct work_struct *work)
case MAPLE_RESPONSE_ALLINFO: case MAPLE_RESPONSE_ALLINFO:
printk(KERN_DEBUG printk(KERN_DEBUG
"Maple - extended device information not supported\n"); "Maple - extended device information"
" not supported\n");
break; break;
case MAPLE_RESPONSE_OK: case MAPLE_RESPONSE_OK:
...@@ -552,26 +576,16 @@ static irqreturn_t maplebus_vblank_interrupt(int irq, void *dev_id) ...@@ -552,26 +576,16 @@ static irqreturn_t maplebus_vblank_interrupt(int irq, void *dev_id)
return IRQ_HANDLED; return IRQ_HANDLED;
} }
static struct irqaction maple_dma_irq = {
.name = "maple bus DMA handler",
.handler = maplebus_dma_interrupt,
.flags = IRQF_SHARED,
};
static struct irqaction maple_vblank_irq = {
.name = "maple bus VBLANK handler",
.handler = maplebus_vblank_interrupt,
.flags = IRQF_SHARED,
};
static int maple_set_dma_interrupt_handler(void) static int maple_set_dma_interrupt_handler(void)
{ {
return setup_irq(HW_EVENT_MAPLE_DMA, &maple_dma_irq); return request_irq(HW_EVENT_MAPLE_DMA, maplebus_dma_interrupt,
IRQF_SHARED, "maple bus DMA", &maple_dummy_driver);
} }
static int maple_set_vblank_interrupt_handler(void) static int maple_set_vblank_interrupt_handler(void)
{ {
return setup_irq(HW_EVENT_VSYNC, &maple_vblank_irq); return request_irq(HW_EVENT_VSYNC, maplebus_vblank_interrupt,
IRQF_SHARED, "maple bus VBLANK", &maple_dummy_driver);
} }
static int maple_get_dma_buffer(void) static int maple_get_dma_buffer(void)
...@@ -601,7 +615,8 @@ static int match_maple_bus_driver(struct device *devptr, ...@@ -601,7 +615,8 @@ static int match_maple_bus_driver(struct device *devptr,
return 0; return 0;
} }
static int maple_bus_uevent(struct device *dev, struct kobj_uevent_env *env) static int maple_bus_uevent(struct device *dev,
struct kobj_uevent_env *env)
{ {
return 0; return 0;
} }
...@@ -644,7 +659,6 @@ static int __init maple_bus_init(void) ...@@ -644,7 +659,6 @@ static int __init maple_bus_init(void)
goto cleanup_device; goto cleanup_device;
retval = driver_register(&maple_dummy_driver.drv); retval = driver_register(&maple_dummy_driver.drv);
if (retval) if (retval)
goto cleanup_bus; goto cleanup_bus;
...@@ -673,7 +687,7 @@ static int __init maple_bus_init(void) ...@@ -673,7 +687,7 @@ static int __init maple_bus_init(void)
maple_queue_cache = maple_queue_cache =
kmem_cache_create("maple_queue_cache", 0x400, 0, kmem_cache_create("maple_queue_cache", 0x400, 0,
SLAB_HWCACHE_ALIGN, NULL); SLAB_POISON|SLAB_HWCACHE_ALIGN, NULL);
if (!maple_queue_cache) if (!maple_queue_cache)
goto cleanup_bothirqs; goto cleanup_bothirqs;
...@@ -686,22 +700,20 @@ static int __init maple_bus_init(void) ...@@ -686,22 +700,20 @@ static int __init maple_bus_init(void)
maple_free_dev(mdev[i]); maple_free_dev(mdev[i]);
goto cleanup_cache; goto cleanup_cache;
} }
mdev[i]->registered = 0;
mdev[i]->mq->command = MAPLE_COMMAND_DEVINFO; mdev[i]->mq->command = MAPLE_COMMAND_DEVINFO;
mdev[i]->mq->length = 0; mdev[i]->mq->length = 0;
maple_attach_driver(mdev[i]);
maple_add_packet(mdev[i]->mq); maple_add_packet(mdev[i]->mq);
/* delay aids hardware detection */
mdelay(5);
subdevice_map[i] = 0; subdevice_map[i] = 0;
} }
realscan = 1;
/* setup maplebus hardware */ /* setup maplebus hardware */
maplebus_dma_reset(); maplebus_dma_reset();
/* initial detection */ /* initial detection */
maple_send(); maple_send();
maple_pnp_time = jiffies; maple_pnp_time = jiffies;
printk(KERN_INFO "Maple bus core now registered.\n"); printk(KERN_INFO "Maple bus core now registered.\n");
return 0; return 0;
...@@ -731,4 +743,5 @@ static int __init maple_bus_init(void) ...@@ -731,4 +743,5 @@ static int __init maple_bus_init(void)
printk(KERN_INFO "Maple bus registration failed\n"); printk(KERN_INFO "Maple bus registration failed\n");
return retval; return retval;
} }
subsys_initcall(maple_bus_init); /* Push init to later to ensure hardware gets detected */
fs_initcall(maple_bus_init);
...@@ -39,7 +39,7 @@ static void __init check_bugs(void) ...@@ -39,7 +39,7 @@ static void __init check_bugs(void)
*p++ = '4'; *p++ = '4';
*p++ = 'a'; *p++ = 'a';
break; break;
case CPU_SH7343 ... CPU_SH7722: case CPU_SH7343 ... CPU_SH7366:
*p++ = '4'; *p++ = '4';
*p++ = 'a'; *p++ = 'a';
*p++ = 'l'; *p++ = 'l';
......
...@@ -10,12 +10,14 @@ ...@@ -10,12 +10,14 @@
#ifndef __ASM_CPU_SH4_FREQ_H #ifndef __ASM_CPU_SH4_FREQ_H
#define __ASM_CPU_SH4_FREQ_H #define __ASM_CPU_SH4_FREQ_H
#if defined(CONFIG_CPU_SUBTYPE_SH7722) #if defined(CONFIG_CPU_SUBTYPE_SH7722) || defined(CONFIG_CPU_SUBTYPE_SH7366)
#define FRQCR 0xa4150000 #define FRQCR 0xa4150000
#define VCLKCR 0xa4150004 #define VCLKCR 0xa4150004
#define SCLKACR 0xa4150008 #define SCLKACR 0xa4150008
#define SCLKBCR 0xa415000c #define SCLKBCR 0xa415000c
#if defined(CONFIG_CPU_SUBTYPE_SH7722)
#define IrDACLKCR 0xa4150010 #define IrDACLKCR 0xa4150010
#endif
#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
defined(CONFIG_CPU_SUBTYPE_SH7780) defined(CONFIG_CPU_SUBTYPE_SH7780)
#define FRQCR 0xffc80000 #define FRQCR 0xffc80000
......
...@@ -3,15 +3,13 @@ ...@@ -3,15 +3,13 @@
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
#include <asm/page.h>
struct vm_area_struct; struct vm_area_struct;
struct page; struct page;
struct mm_struct; struct mm_struct;
extern void flush_cache_all(void); extern void flush_cache_all(void);
extern void flush_cache_mm(struct mm_struct *mm); extern void flush_cache_mm(struct mm_struct *mm);
extern void flush_cache_sigtramp(unsigned long start, unsigned long end); extern void flush_cache_sigtramp(unsigned long vaddr);
extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
unsigned long end); unsigned long end);
extern void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn); extern void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn);
...@@ -27,7 +25,7 @@ extern void flush_icache_user_range(struct vm_area_struct *vma, ...@@ -27,7 +25,7 @@ extern void flush_icache_user_range(struct vm_area_struct *vma,
#define flush_dcache_mmap_unlock(mapping) do { } while (0) #define flush_dcache_mmap_unlock(mapping) do { } while (0)
#define flush_icache_page(vma, page) do { } while (0) #define flush_icache_page(vma, page) do { } while (0)
#define p3_cache_init() do { } while (0) void p3_cache_init(void);
#endif /* __ASSEMBLY__ */ #endif /* __ASSEMBLY__ */
......
...@@ -16,12 +16,6 @@ ...@@ -16,12 +16,6 @@
/* This has to be a common function because the next location to fill /* This has to be a common function because the next location to fill
* information is shared. */ * information is shared. */
extern void __do_tlb_refill(unsigned long address, unsigned long long is_text_not_data, pte_t *pte); extern void __do_tlb_refill(unsigned long address, unsigned long long is_text_not_data, pte_t *pte);
/* Profiling counter. */
#ifdef CONFIG_SH64_PROC_TLB
extern unsigned long long calls_to_do_fast_page_fault;
#endif
#endif /* __ASSEMBLY__ */ #endif /* __ASSEMBLY__ */
#endif /* __ASM_SH_CPU_SH5_MMU_CONTEXT_H */ #endif /* __ASM_SH_CPU_SH5_MMU_CONTEXT_H */
...@@ -55,26 +55,4 @@ ...@@ -55,26 +55,4 @@
#define PJDR 0xa4000130 #define PJDR 0xa4000130
#define PKDR 0xa4000132 #define PKDR 0xa4000132
static inline void hp6xx_led_red(int on)
{
u16 v16;
v16 = ctrl_inw(CONFIG_HD64461_IOBASE + HD64461_GPBDR - 0x10000);
if (on)
ctrl_outw(v16 & (~HD64461_GPBDR_LED_RED), CONFIG_HD64461_IOBASE + HD64461_GPBDR - 0x10000);
else
ctrl_outw(v16 | HD64461_GPBDR_LED_RED, CONFIG_HD64461_IOBASE + HD64461_GPBDR - 0x10000);
}
static inline void hp6xx_led_green(int on)
{
u8 v8;
v8 = ctrl_inb(PKDR);
if (on)
ctrl_outb(v8 & (~PKDR_LED_GREEN), PKDR);
else
ctrl_outb(v8 | PKDR_LED_GREEN, PKDR);
}
#endif /* __ASM_SH_HP6XX_H */ #endif /* __ASM_SH_HP6XX_H */
...@@ -38,6 +38,7 @@ ...@@ -38,6 +38,7 @@
*/ */
#define __IO_PREFIX generic #define __IO_PREFIX generic
#include <asm/io_generic.h> #include <asm/io_generic.h>
#include <asm/io_trapped.h>
#define maybebadio(port) \ #define maybebadio(port) \
printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \ printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \
...@@ -181,13 +182,13 @@ __BUILD_MEMORY_STRING(w, u16) ...@@ -181,13 +182,13 @@ __BUILD_MEMORY_STRING(w, u16)
#define iowrite32(v,a) writel((v),(a)) #define iowrite32(v,a) writel((v),(a))
#define iowrite32be(v,a) __raw_writel(cpu_to_be32((v)),(a)) #define iowrite32be(v,a) __raw_writel(cpu_to_be32((v)),(a))
#define ioread8_rep(a,d,c) insb((a),(d),(c)) #define ioread8_rep(a, d, c) readsb((a), (d), (c))
#define ioread16_rep(a,d,c) insw((a),(d),(c)) #define ioread16_rep(a, d, c) readsw((a), (d), (c))
#define ioread32_rep(a,d,c) insl((a),(d),(c)) #define ioread32_rep(a, d, c) readsl((a), (d), (c))
#define iowrite8_rep(a,s,c) outsb((a),(s),(c)) #define iowrite8_rep(a, s, c) writesb((a), (s), (c))
#define iowrite16_rep(a,s,c) outsw((a),(s),(c)) #define iowrite16_rep(a, s, c) writesw((a), (s), (c))
#define iowrite32_rep(a,s,c) outsl((a),(s),(c)) #define iowrite32_rep(a, s, c) writesl((a), (s), (c))
#define mmiowb() wmb() /* synco on SH-4A, otherwise a nop */ #define mmiowb() wmb() /* synco on SH-4A, otherwise a nop */
...@@ -207,6 +208,8 @@ static inline void __set_io_port_base(unsigned long pbase) ...@@ -207,6 +208,8 @@ static inline void __set_io_port_base(unsigned long pbase)
generic_io_base = pbase; generic_io_base = pbase;
} }
#define __ioport_map(p, n) sh_mv.mv_ioport_map((p), (n))
/* We really want to try and get these to memcpy etc */ /* We really want to try and get these to memcpy etc */
extern void memcpy_fromio(void *, volatile void __iomem *, unsigned long); extern void memcpy_fromio(void *, volatile void __iomem *, unsigned long);
extern void memcpy_toio(volatile void __iomem *, const void *, unsigned long); extern void memcpy_toio(volatile void __iomem *, const void *, unsigned long);
...@@ -309,7 +312,14 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags) ...@@ -309,7 +312,14 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
{ {
#ifdef CONFIG_SUPERH32 #ifdef CONFIG_SUPERH32
unsigned long last_addr = offset + size - 1; unsigned long last_addr = offset + size - 1;
#endif
void __iomem *ret;
ret = __ioremap_trapped(offset, size);
if (ret)
return ret;
#ifdef CONFIG_SUPERH32
/* /*
* For P1 and P2 space this is trivial, as everything is already * For P1 and P2 space this is trivial, as everything is already
* mapped. Uncached access for P1 addresses are done through P2. * mapped. Uncached access for P1 addresses are done through P2.
......
#ifndef __ASM_SH_IO_TRAPPED_H
#define __ASM_SH_IO_TRAPPED_H
#include <linux/list.h>
#include <linux/ioport.h>
#include <asm/page.h>
#define IO_TRAPPED_MAGIC 0xfeedbeef
struct trapped_io {
unsigned int magic;
struct resource *resource;
unsigned int num_resources;
unsigned int minimum_bus_width;
struct list_head list;
void __iomem *virt_base;
} __aligned(PAGE_SIZE);
#ifdef CONFIG_IO_TRAPPED
int register_trapped_io(struct trapped_io *tiop);
int handle_trapped_io(struct pt_regs *regs, unsigned long address);
void __iomem *match_trapped_io_handler(struct list_head *list,
unsigned long offset,
unsigned long size);
#ifdef CONFIG_HAS_IOMEM
extern struct list_head trapped_mem;
static inline void __iomem *
__ioremap_trapped(unsigned long offset, unsigned long size)
{
return match_trapped_io_handler(&trapped_mem, offset, size);
}
#else
#define __ioremap_trapped(offset, size) NULL
#endif
#ifdef CONFIG_HAS_IOPORT
extern struct list_head trapped_io;
static inline void __iomem *
__ioport_map_trapped(unsigned long offset, unsigned long size)
{
return match_trapped_io_handler(&trapped_io, offset, size);
}
#else
#define __ioport_map_trapped(offset, size) NULL
#endif
#else
#define register_trapped_io(tiop) (-1)
#define handle_trapped_io(tiop, address) 0
#define __ioremap_trapped(offset, size) NULL
#define __ioport_map_trapped(offset, size) NULL
#endif
#endif /* __ASM_SH_IO_TRAPPED_H */
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