提交 00b9f51e 编写于 作者: M Martin Bugge 提交者: Mauro Carvalho Chehab

[media] ths8200: Corrected sync polarities setting

HS_IN/VS_IN was always set to positive.
Acked-by: NLad, Prabhakar <prabhakar.csengg@gmail.com>
Signed-off-by: NMartin Bugge <marbugge@cisco.com>
Signed-off-by: NHans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: NMauro Carvalho Chehab <m.chehab@samsung.com>
上级 8a027faf
......@@ -356,7 +356,7 @@ static void ths8200_setup(struct v4l2_subdev *sd, struct v4l2_bt_timings *bt)
/* Timing of video input bus is derived from HS, VS, and FID dedicated
* inputs
*/
ths8200_write(sd, THS8200_DTG2_CNTL, 0x47 | polarity);
ths8200_write(sd, THS8200_DTG2_CNTL, 0x44 | polarity);
/* leave reset */
ths8200_s_stream(sd, true);
......
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