Few control settings done in architected timer as part of initialisation
can be lost when CPU enters deeper power states. They need to be
restored when the CPU is (warm)reset again.

This patch adds CPU PM notifiers to save the counter control register
when entering low power modes and restore it when CPU exits low power.
Reviewed-by: NCatalin Marinas <catalin.marinas@arm.com>
Reviewed-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: NWill Deacon <will.deacon@arm.com>
Acked-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NSudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>