The bits of BWC, DAHTS and SAHTS in the DMA mode register must be cleared
before a new value can be or-ed in.
Signed-off-by: NThomas Breitung <thomas.breitung@izt-labs.de>
Signed-off-by: NWolfgang Ocker <weo@reccoware.de>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>