/* * Driver for the Conexant CX23885 PCIe bridge * * Copyright (c) 2006 Steven Toth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #include #include #include #include #include #include #include #include "cx23885.h" #include #include "dvb_ca_en50221.h" #include "s5h1409.h" #include "s5h1411.h" #include "mt2131.h" #include "tda8290.h" #include "tda18271.h" #include "lgdt330x.h" #include "xc5000.h" #include "tda10048.h" #include "tuner-xc2028.h" #include "tuner-simple.h" #include "dib7000p.h" #include "dibx000_common.h" #include "zl10353.h" #include "stv0900.h" #include "stv0900_reg.h" #include "stv6110.h" #include "lnbh24.h" #include "cx24116.h" #include "cimax2.h" #include "lgs8gxx.h" #include "netup-eeprom.h" #include "netup-init.h" #include "lgdt3305.h" static unsigned int debug; #define dprintk(level, fmt, arg...)\ do { if (debug >= level)\ printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\ } while (0) /* ------------------------------------------------------------------ */ static unsigned int alt_tuner; module_param(alt_tuner, int, 0644); MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration"); DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); /* ------------------------------------------------------------------ */ static int dvb_buf_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size) { struct cx23885_tsport *port = q->priv_data; port->ts_packet_size = 188 * 4; port->ts_packet_count = 32; *size = port->ts_packet_size * port->ts_packet_count; *count = 32; return 0; } static int dvb_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb, enum v4l2_field field) { struct cx23885_tsport *port = q->priv_data; return cx23885_buf_prepare(q, port, (struct cx23885_buffer *)vb, field); } static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb) { struct cx23885_tsport *port = q->priv_data; cx23885_buf_queue(port, (struct cx23885_buffer *)vb); } static void dvb_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb) { cx23885_free_buffer(q, (struct cx23885_buffer *)vb); } static struct videobuf_queue_ops dvb_qops = { .buf_setup = dvb_buf_setup, .buf_prepare = dvb_buf_prepare, .buf_queue = dvb_buf_queue, .buf_release = dvb_buf_release, }; static struct s5h1409_config hauppauge_generic_config = { .demod_address = 0x32 >> 1, .output_mode = S5H1409_SERIAL_OUTPUT, .gpio = S5H1409_GPIO_ON, .qam_if = 44000, .inversion = S5H1409_INVERSION_OFF, .status_mode = S5H1409_DEMODLOCKING, .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, }; static struct tda10048_config hauppauge_hvr1200_config = { .demod_address = 0x10 >> 1, .output_mode = TDA10048_SERIAL_OUTPUT, .fwbulkwritelen = TDA10048_BULKWRITE_200, .inversion = TDA10048_INVERSION_ON, .dtv6_if_freq_khz = TDA10048_IF_3300, .dtv7_if_freq_khz = TDA10048_IF_3800, .dtv8_if_freq_khz = TDA10048_IF_4300, .clk_freq_khz = TDA10048_CLK_16000, }; static struct tda10048_config hauppauge_hvr1210_config = { .demod_address = 0x10 >> 1, .output_mode = TDA10048_SERIAL_OUTPUT, .fwbulkwritelen = TDA10048_BULKWRITE_200, .inversion = TDA10048_INVERSION_ON, .dtv6_if_freq_khz = TDA10048_IF_3300, .dtv7_if_freq_khz = TDA10048_IF_3500, .dtv8_if_freq_khz = TDA10048_IF_4000, .clk_freq_khz = TDA10048_CLK_16000, }; static struct s5h1409_config hauppauge_ezqam_config = { .demod_address = 0x32 >> 1, .output_mode = S5H1409_SERIAL_OUTPUT, .gpio = S5H1409_GPIO_OFF, .qam_if = 4000, .inversion = S5H1409_INVERSION_ON, .status_mode = S5H1409_DEMODLOCKING, .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, }; static struct s5h1409_config hauppauge_hvr1800lp_config = { .demod_address = 0x32 >> 1, .output_mode = S5H1409_SERIAL_OUTPUT, .gpio = S5H1409_GPIO_OFF, .qam_if = 44000, .inversion = S5H1409_INVERSION_OFF, .status_mode = S5H1409_DEMODLOCKING, .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, }; static struct s5h1409_config hauppauge_hvr1500_config = { .demod_address = 0x32 >> 1, .output_mode = S5H1409_SERIAL_OUTPUT, .gpio = S5H1409_GPIO_OFF, .inversion = S5H1409_INVERSION_OFF, .status_mode = S5H1409_DEMODLOCKING, .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, }; static struct mt2131_config hauppauge_generic_tunerconfig = { 0x61 }; static struct lgdt330x_config fusionhdtv_5_express = { .demod_address = 0x0e, .demod_chip = LGDT3303, .serial_mpeg = 0x40, }; static struct s5h1409_config hauppauge_hvr1500q_config = { .demod_address = 0x32 >> 1, .output_mode = S5H1409_SERIAL_OUTPUT, .gpio = S5H1409_GPIO_ON, .qam_if = 44000, .inversion = S5H1409_INVERSION_OFF, .status_mode = S5H1409_DEMODLOCKING, .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, }; static struct s5h1409_config dvico_s5h1409_config = { .demod_address = 0x32 >> 1, .output_mode = S5H1409_SERIAL_OUTPUT, .gpio = S5H1409_GPIO_ON, .qam_if = 44000, .inversion = S5H1409_INVERSION_OFF, .status_mode = S5H1409_DEMODLOCKING, .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, }; static struct s5h1411_config dvico_s5h1411_config = { .output_mode = S5H1411_SERIAL_OUTPUT, .gpio = S5H1411_GPIO_ON, .qam_if = S5H1411_IF_44000, .vsb_if = S5H1411_IF_44000, .inversion = S5H1411_INVERSION_OFF, .status_mode = S5H1411_DEMODLOCKING, .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, }; static struct s5h1411_config hcw_s5h1411_config = { .output_mode = S5H1411_SERIAL_OUTPUT, .gpio = S5H1411_GPIO_OFF, .vsb_if = S5H1411_IF_44000, .qam_if = S5H1411_IF_4000, .inversion = S5H1411_INVERSION_ON, .status_mode = S5H1411_DEMODLOCKING, .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, }; static struct xc5000_config hauppauge_hvr1500q_tunerconfig = { .i2c_address = 0x61, .if_khz = 5380, }; static struct xc5000_config dvico_xc5000_tunerconfig = { .i2c_address = 0x64, .if_khz = 5380, }; static struct tda829x_config tda829x_no_probe = { .probe_tuner = TDA829X_DONT_PROBE, }; static struct tda18271_std_map hauppauge_tda18271_std_map = { .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3, .if_lvl = 6, .rfagc_top = 0x37 }, .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0, .if_lvl = 6, .rfagc_top = 0x37 }, }; static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map = { .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4, .if_lvl = 1, .rfagc_top = 0x37, }, .dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5, .if_lvl = 1, .rfagc_top = 0x37, }, .dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6, .if_lvl = 1, .rfagc_top = 0x37, }, }; static struct tda18271_config hauppauge_tda18271_config = { .std_map = &hauppauge_tda18271_std_map, .gate = TDA18271_GATE_ANALOG, .output_opt = TDA18271_OUTPUT_LT_OFF, }; static struct tda18271_config hauppauge_hvr1200_tuner_config = { .std_map = &hauppauge_hvr1200_tda18271_std_map, .gate = TDA18271_GATE_ANALOG, .output_opt = TDA18271_OUTPUT_LT_OFF, }; static struct tda18271_config hauppauge_hvr1210_tuner_config = { .gate = TDA18271_GATE_DIGITAL, .output_opt = TDA18271_OUTPUT_LT_OFF, }; static struct tda18271_std_map hauppauge_hvr127x_std_map = { .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4, .if_lvl = 1, .rfagc_top = 0x58 }, .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5, .if_lvl = 1, .rfagc_top = 0x58 }, }; static struct tda18271_config hauppauge_hvr127x_config = { .std_map = &hauppauge_hvr127x_std_map, .output_opt = TDA18271_OUTPUT_LT_OFF, }; static struct lgdt3305_config hauppauge_lgdt3305_config = { .i2c_addr = 0x0e, .mpeg_mode = LGDT3305_MPEG_SERIAL, .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE, .tpvalid_polarity = LGDT3305_TP_VALID_HIGH, .deny_i2c_rptr = 1, .spectral_inversion = 1, .qam_if_khz = 4000, .vsb_if_khz = 3250, }; static struct dibx000_agc_config xc3028_agc_config = { BAND_VHF | BAND_UHF, /* band_caps */ /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0, * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, * P_agc_nb_est=2, P_agc_write=0 */ (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */ 712, /* inv_gain */ 21, /* time_stabiliz */ 0, /* alpha_level */ 118, /* thlock */ 0, /* wbd_inv */ 2867, /* wbd_ref */ 0, /* wbd_sel */ 2, /* wbd_alpha */ 0, /* agc1_max */ 0, /* agc1_min */ 39718, /* agc2_max */ 9930, /* agc2_min */ 0, /* agc1_pt1 */ 0, /* agc1_pt2 */ 0, /* agc1_pt3 */ 0, /* agc1_slope1 */ 0, /* agc1_slope2 */ 0, /* agc2_pt1 */ 128, /* agc2_pt2 */ 29, /* agc2_slope1 */ 29, /* agc2_slope2 */ 17, /* alpha_mant */ 27, /* alpha_exp */ 23, /* beta_mant */ 51, /* beta_exp */ 1, /* perform_agc_softsplit */ }; /* PLL Configuration for COFDM BW_MHz = 8.000000 * With external clock = 30.000000 */ static struct dibx000_bandwidth_config xc3028_bw_config = { 60000, /* internal */ 30000, /* sampling */ 1, /* pll_cfg: prediv */ 8, /* pll_cfg: ratio */ 3, /* pll_cfg: range */ 1, /* pll_cfg: reset */ 0, /* pll_cfg: bypass */ 0, /* misc: refdiv */ 0, /* misc: bypclk_div */ 1, /* misc: IO_CLK_en_core */ 1, /* misc: ADClkSrc */ 0, /* misc: modulo */ (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */ (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */ 20452225, /* timf */ 30000000 /* xtal_hz */ }; static struct dib7000p_config hauppauge_hvr1400_dib7000_config = { .output_mpeg2_in_188_bytes = 1, .hostbus_diversity = 1, .tuner_is_baseband = 0, .update_lna = NULL, .agc_config_count = 1, .agc = &xc3028_agc_config, .bw = &xc3028_bw_config, .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, .pwm_freq_div = 0, .agc_control = NULL, .spur_protect = 0, .output_mode = OUTMODE_MPEG2_SERIAL, }; static struct zl10353_config dvico_fusionhdtv_xc3028 = { .demod_address = 0x0f, .if2 = 45600, .no_tuner = 1, .disable_i2c_gate_ctrl = 1, }; static struct stv0900_reg stv0900_ts_regs[] = { { R0900_TSGENERAL, 0x00 }, { R0900_P1_TSSPEED, 0x40 }, { R0900_P2_TSSPEED, 0x40 }, { R0900_P1_TSCFGM, 0xc0 }, { R0900_P2_TSCFGM, 0xc0 }, { R0900_P1_TSCFGH, 0xe0 }, { R0900_P2_TSCFGH, 0xe0 }, { R0900_P1_TSCFGL, 0x20 }, { R0900_P2_TSCFGL, 0x20 }, { 0xffff, 0xff }, /* terminate */ }; static struct stv0900_config netup_stv0900_config = { .demod_address = 0x68, .demod_mode = 1, /* dual */ .xtal = 8000000, .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */ .diseqc_mode = 2,/* 2/3 PWM */ .ts_config_regs = stv0900_ts_regs, .tun1_maddress = 0,/* 0x60 */ .tun2_maddress = 3,/* 0x63 */ .tun1_adc = 1,/* 1 Vpp */ .tun2_adc = 1,/* 1 Vpp */ }; static struct stv6110_config netup_stv6110_tunerconfig_a = { .i2c_address = 0x60, .mclk = 16000000, .clk_div = 1, .gain = 8, /* +16 dB - maximum gain */ }; static struct stv6110_config netup_stv6110_tunerconfig_b = { .i2c_address = 0x63, .mclk = 16000000, .clk_div = 1, .gain = 8, /* +16 dB - maximum gain */ }; static int tbs_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) { struct cx23885_tsport *port = fe->dvb->priv; struct cx23885_dev *dev = port->dev; if (voltage == SEC_VOLTAGE_18) cx_write(MC417_RWD, 0x00001e00);/* GPIO-13 high */ else if (voltage == SEC_VOLTAGE_13) cx_write(MC417_RWD, 0x00001a00);/* GPIO-13 low */ else cx_write(MC417_RWD, 0x00001800);/* GPIO-12 low */ return 0; } static struct cx24116_config tbs_cx24116_config = { .demod_address = 0x05, }; static struct cx24116_config tevii_cx24116_config = { .demod_address = 0x55, }; static struct cx24116_config dvbworld_cx24116_config = { .demod_address = 0x05, }; static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = { .prod = LGS8GXX_PROD_LGS8GL5, .demod_address = 0x19, .serial_ts = 0, .ts_clk_pol = 1, .ts_clk_gated = 1, .if_clk_freq = 30400, /* 30.4 MHz */ .if_freq = 5380, /* 5.38 MHz */ .if_neg_center = 1, .ext_adc = 0, .adc_signed = 0, .if_neg_edge = 0, }; static struct xc5000_config mygica_x8506_xc5000_config = { .i2c_address = 0x61, .if_khz = 5380, }; static int cx23885_dvb_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *param) { struct cx23885_tsport *port = fe->dvb->priv; struct cx23885_dev *dev = port->dev; switch (dev->board) { case CX23885_BOARD_HAUPPAUGE_HVR1275: switch (param->u.vsb.modulation) { case VSB_8: cx23885_gpio_clear(dev, GPIO_5); break; case QAM_64: case QAM_256: default: cx23885_gpio_set(dev, GPIO_5); break; } break; case CX23885_BOARD_MYGICA_X8506: case CX23885_BOARD_MAGICPRO_PROHDTVE2: /* Select Digital TV */ cx23885_gpio_set(dev, GPIO_0); break; } return 0; } static int cx23885_dvb_fe_ioctl_override(struct dvb_frontend *fe, unsigned int cmd, void *parg, unsigned int stage) { int err = 0; switch (stage) { case DVB_FE_IOCTL_PRE: switch (cmd) { case FE_SET_FRONTEND: err = cx23885_dvb_set_frontend(fe, (struct dvb_frontend_parameters *) parg); break; } break; case DVB_FE_IOCTL_POST: /* no post-ioctl handling required */ break; } return err; }; static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = { .prod = LGS8GXX_PROD_LGS8G75, .demod_address = 0x19, .serial_ts = 0, .ts_clk_pol = 1, .ts_clk_gated = 1, .if_clk_freq = 30400, /* 30.4 MHz */ .if_freq = 6500, /* 6.50 MHz */ .if_neg_center = 1, .ext_adc = 0, .adc_signed = 1, .adc_vpp = 2, /* 1.6 Vpp */ .if_neg_edge = 1, }; static struct xc5000_config magicpro_prohdtve2_xc5000_config = { .i2c_address = 0x61, .if_khz = 6500, }; static int dvb_register(struct cx23885_tsport *port) { struct cx23885_dev *dev = port->dev; struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL; struct videobuf_dvb_frontend *fe0; int ret; /* Get the first frontend */ fe0 = videobuf_dvb_get_frontend(&port->frontends, 1); if (!fe0) return -EINVAL; /* init struct videobuf_dvb */ fe0->dvb.name = dev->name; /* init frontend */ switch (dev->board) { case CX23885_BOARD_HAUPPAUGE_HVR1250: i2c_bus = &dev->i2c_bus[0]; fe0->dvb.frontend = dvb_attach(s5h1409_attach, &hauppauge_generic_config, &i2c_bus->i2c_adap); if (fe0->dvb.frontend != NULL) { dvb_attach(mt2131_attach, fe0->dvb.frontend, &i2c_bus->i2c_adap, &hauppauge_generic_tunerconfig, 0); } break; case CX23885_BOARD_HAUPPAUGE_HVR1270: case CX23885_BOARD_HAUPPAUGE_HVR1275: i2c_bus = &dev->i2c_bus[0]; fe0->dvb.frontend = dvb_attach(lgdt3305_attach, &hauppauge_lgdt3305_config, &i2c_bus->i2c_adap); if (fe0->dvb.frontend != NULL) { dvb_attach(tda18271_attach, fe0->dvb.frontend, 0x60, &dev->i2c_bus[1].i2c_adap, &hauppauge_hvr127x_config); } break; case CX23885_BOARD_HAUPPAUGE_HVR1255: i2c_bus = &dev->i2c_bus[0]; fe0->dvb.frontend = dvb_attach(s5h1411_attach, &hcw_s5h1411_config, &i2c_bus->i2c_adap); if (fe0->dvb.frontend != NULL) { dvb_attach(tda18271_attach, fe0->dvb.frontend, 0x60, &dev->i2c_bus[1].i2c_adap, &hauppauge_tda18271_config); } break; case CX23885_BOARD_HAUPPAUGE_HVR1800: i2c_bus = &dev->i2c_bus[0]; switch (alt_tuner) { case 1: fe0->dvb.frontend = dvb_attach(s5h1409_attach, &hauppauge_ezqam_config, &i2c_bus->i2c_adap); if (fe0->dvb.frontend != NULL) { dvb_attach(tda829x_attach, fe0->dvb.frontend, &dev->i2c_bus[1].i2c_adap, 0x42, &tda829x_no_probe); dvb_attach(tda18271_attach, fe0->dvb.frontend, 0x60, &dev->i2c_bus[1].i2c_adap, &hauppauge_tda18271_config); } break; case 0: default: fe0->dvb.frontend = dvb_attach(s5h1409_attach, &hauppauge_generic_config, &i2c_bus->i2c_adap); if (fe0->dvb.frontend != NULL) dvb_attach(mt2131_attach, fe0->dvb.frontend, &i2c_bus->i2c_adap, &hauppauge_generic_tunerconfig, 0); break; } break; case CX23885_BOARD_HAUPPAUGE_HVR1800lp: i2c_bus = &dev->i2c_bus[0]; fe0->dvb.frontend = dvb_attach(s5h1409_attach, &hauppauge_hvr1800lp_config, &i2c_bus->i2c_adap); if (fe0->dvb.frontend != NULL) { dvb_attach(mt2131_attach, fe0->dvb.frontend, &i2c_bus->i2c_adap, &hauppauge_generic_tunerconfig, 0); } break; case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP: i2c_bus = &dev->i2c_bus[0]; fe0->dvb.frontend = dvb_attach(lgdt330x_attach, &fusionhdtv_5_express, &i2c_bus->i2c_adap); if (fe0->dvb.frontend != NULL) { dvb_attach(simple_tuner_attach, fe0->dvb.frontend, &i2c_bus->i2c_adap, 0x61, TUNER_LG_TDVS_H06XF); } break; case CX23885_BOARD_HAUPPAUGE_HVR1500Q: i2c_bus = &dev->i2c_bus[1]; fe0->dvb.frontend = dvb_attach(s5h1409_attach, &hauppauge_hvr1500q_config, &dev->i2c_bus[0].i2c_adap); if (fe0->dvb.frontend != NULL) dvb_attach(xc5000_attach, fe0->dvb.frontend, &i2c_bus->i2c_adap, &hauppauge_hvr1500q_tunerconfig); break; case CX23885_BOARD_HAUPPAUGE_HVR1500: i2c_bus = &dev->i2c_bus[1]; fe0->dvb.frontend = dvb_attach(s5h1409_attach, &hauppauge_hvr1500_config, &dev->i2c_bus[0].i2c_adap); if (fe0->dvb.frontend != NULL) { struct dvb_frontend *fe; struct xc2028_config cfg = { .i2c_adap = &i2c_bus->i2c_adap, .i2c_addr = 0x61, }; static struct xc2028_ctrl ctl = { .fname = XC2028_DEFAULT_FIRMWARE, .max_len = 64, .demod = XC3028_FE_OREN538, }; fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg); if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) fe->ops.tuner_ops.set_config(fe, &ctl); } break; case CX23885_BOARD_HAUPPAUGE_HVR1200: case CX23885_BOARD_HAUPPAUGE_HVR1700: i2c_bus = &dev->i2c_bus[0]; fe0->dvb.frontend = dvb_attach(tda10048_attach, &hauppauge_hvr1200_config, &i2c_bus->i2c_adap); if (fe0->dvb.frontend != NULL) { dvb_attach(tda829x_attach, fe0->dvb.frontend, &dev->i2c_bus[1].i2c_adap, 0x42, &tda829x_no_probe); dvb_attach(tda18271_attach, fe0->dvb.frontend, 0x60, &dev->i2c_bus[1].i2c_adap, &hauppauge_hvr1200_tuner_config); } break; case CX23885_BOARD_HAUPPAUGE_HVR1210: i2c_bus = &dev->i2c_bus[0]; fe0->dvb.frontend = dvb_attach(tda10048_attach, &hauppauge_hvr1210_config, &i2c_bus->i2c_adap); if (fe0->dvb.frontend != NULL) { dvb_attach(tda18271_attach, fe0->dvb.frontend, 0x60, &dev->i2c_bus[1].i2c_adap, &hauppauge_hvr1210_tuner_config); } break; case CX23885_BOARD_HAUPPAUGE_HVR1400: i2c_bus = &dev->i2c_bus[0]; fe0->dvb.frontend = dvb_attach(dib7000p_attach, &i2c_bus->i2c_adap, 0x12, &hauppauge_hvr1400_dib7000_config); if (fe0->dvb.frontend != NULL) { struct dvb_frontend *fe; struct xc2028_config cfg = { .i2c_adap = &dev->i2c_bus[1].i2c_adap, .i2c_addr = 0x64, }; static struct xc2028_ctrl ctl = { .fname = XC3028L_DEFAULT_FIRMWARE, .max_len = 64, .demod = 5000, /* This is true for all demods with v36 firmware? */ .type = XC2028_D2633, }; fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg); if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) fe->ops.tuner_ops.set_config(fe, &ctl); } break; case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: i2c_bus = &dev->i2c_bus[port->nr - 1]; fe0->dvb.frontend = dvb_attach(s5h1409_attach, &dvico_s5h1409_config, &i2c_bus->i2c_adap); if (fe0->dvb.frontend == NULL) fe0->dvb.frontend = dvb_attach(s5h1411_attach, &dvico_s5h1411_config, &i2c_bus->i2c_adap); if (fe0->dvb.frontend != NULL) dvb_attach(xc5000_attach, fe0->dvb.frontend, &i2c_bus->i2c_adap, &dvico_xc5000_tunerconfig); break; case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: { i2c_bus = &dev->i2c_bus[port->nr - 1]; fe0->dvb.frontend = dvb_attach(zl10353_attach, &dvico_fusionhdtv_xc3028, &i2c_bus->i2c_adap); if (fe0->dvb.frontend != NULL) { struct dvb_frontend *fe; struct xc2028_config cfg = { .i2c_adap = &i2c_bus->i2c_adap, .i2c_addr = 0x61, }; static struct xc2028_ctrl ctl = { .fname = XC2028_DEFAULT_FIRMWARE, .max_len = 64, .demod = XC3028_FE_ZARLINK456, }; fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg); if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) fe->ops.tuner_ops.set_config(fe, &ctl); } break; } case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: case CX23885_BOARD_COMPRO_VIDEOMATE_E800: i2c_bus = &dev->i2c_bus[0]; fe0->dvb.frontend = dvb_attach(zl10353_attach, &dvico_fusionhdtv_xc3028, &i2c_bus->i2c_adap); if (fe0->dvb.frontend != NULL) { struct dvb_frontend *fe; struct xc2028_config cfg = { .i2c_adap = &dev->i2c_bus[1].i2c_adap, .i2c_addr = 0x61, }; static struct xc2028_ctrl ctl = { .fname = XC2028_DEFAULT_FIRMWARE, .max_len = 64, .demod = XC3028_FE_ZARLINK456, }; fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg); if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) fe->ops.tuner_ops.set_config(fe, &ctl); } break; case CX23885_BOARD_TBS_6920: i2c_bus = &dev->i2c_bus[0]; fe0->dvb.frontend = dvb_attach(cx24116_attach, &tbs_cx24116_config, &i2c_bus->i2c_adap); if (fe0->dvb.frontend != NULL) fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage; break; case CX23885_BOARD_TEVII_S470: i2c_bus = &dev->i2c_bus[1]; fe0->dvb.frontend = dvb_attach(cx24116_attach, &tevii_cx24116_config, &i2c_bus->i2c_adap); if (fe0->dvb.frontend != NULL) fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage; break; case CX23885_BOARD_DVBWORLD_2005: i2c_bus = &dev->i2c_bus[1]; fe0->dvb.frontend = dvb_attach(cx24116_attach, &dvbworld_cx24116_config, &i2c_bus->i2c_adap); break; case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: i2c_bus = &dev->i2c_bus[0]; switch (port->nr) { /* port B */ case 1: fe0->dvb.frontend = dvb_attach(stv0900_attach, &netup_stv0900_config, &i2c_bus->i2c_adap, 0); if (fe0->dvb.frontend != NULL) { if (dvb_attach(stv6110_attach, fe0->dvb.frontend, &netup_stv6110_tunerconfig_a, &i2c_bus->i2c_adap)) { if (!dvb_attach(lnbh24_attach, fe0->dvb.frontend, &i2c_bus->i2c_adap, LNBH24_PCL | LNBH24_TTX, LNBH24_TEN, 0x09)) printk(KERN_ERR "No LNBH24 found!\n"); } } break; /* port C */ case 2: fe0->dvb.frontend = dvb_attach(stv0900_attach, &netup_stv0900_config, &i2c_bus->i2c_adap, 1); if (fe0->dvb.frontend != NULL) { if (dvb_attach(stv6110_attach, fe0->dvb.frontend, &netup_stv6110_tunerconfig_b, &i2c_bus->i2c_adap)) { if (!dvb_attach(lnbh24_attach, fe0->dvb.frontend, &i2c_bus->i2c_adap, LNBH24_PCL | LNBH24_TTX, LNBH24_TEN, 0x0a)) printk(KERN_ERR "No LNBH24 found!\n"); } } break; } break; case CX23885_BOARD_MYGICA_X8506: i2c_bus = &dev->i2c_bus[0]; i2c_bus2 = &dev->i2c_bus[1]; fe0->dvb.frontend = dvb_attach(lgs8gxx_attach, &mygica_x8506_lgs8gl5_config, &i2c_bus->i2c_adap); if (fe0->dvb.frontend != NULL) { dvb_attach(xc5000_attach, fe0->dvb.frontend, &i2c_bus2->i2c_adap, &mygica_x8506_xc5000_config); } break; case CX23885_BOARD_MAGICPRO_PROHDTVE2: i2c_bus = &dev->i2c_bus[0]; i2c_bus2 = &dev->i2c_bus[1]; fe0->dvb.frontend = dvb_attach(lgs8gxx_attach, &magicpro_prohdtve2_lgs8g75_config, &i2c_bus->i2c_adap); if (fe0->dvb.frontend != NULL) { dvb_attach(xc5000_attach, fe0->dvb.frontend, &i2c_bus2->i2c_adap, &magicpro_prohdtve2_xc5000_config); } break; case CX23885_BOARD_HAUPPAUGE_HVR1850: i2c_bus = &dev->i2c_bus[0]; fe0->dvb.frontend = dvb_attach(s5h1411_attach, &hcw_s5h1411_config, &i2c_bus->i2c_adap); if (fe0->dvb.frontend != NULL) dvb_attach(tda18271_attach, fe0->dvb.frontend, 0x60, &dev->i2c_bus[0].i2c_adap, &hauppauge_tda18271_config); break; default: printk(KERN_INFO "%s: The frontend of your DVB/ATSC card " " isn't supported yet\n", dev->name); break; } if (NULL == fe0->dvb.frontend) { printk(KERN_ERR "%s: frontend initialization failed\n", dev->name); return -1; } /* define general-purpose callback pointer */ fe0->dvb.frontend->callback = cx23885_tuner_callback; /* Put the analog decoder in standby to keep it quiet */ call_all(dev, core, s_power, 0); if (fe0->dvb.frontend->ops.analog_ops.standby) fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend); /* register everything */ ret = videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port, &dev->pci->dev, adapter_nr, 0, cx23885_dvb_fe_ioctl_override); /* init CI & MAC */ switch (dev->board) { case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: { static struct netup_card_info cinfo; netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo); memcpy(port->frontends.adapter.proposed_mac, cinfo.port[port->nr - 1].mac, 6); printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=" "%02X:%02X:%02X:%02X:%02X:%02X\n", port->nr, port->frontends.adapter.proposed_mac[0], port->frontends.adapter.proposed_mac[1], port->frontends.adapter.proposed_mac[2], port->frontends.adapter.proposed_mac[3], port->frontends.adapter.proposed_mac[4], port->frontends.adapter.proposed_mac[5]); netup_ci_init(port); break; } } return ret; } int cx23885_dvb_register(struct cx23885_tsport *port) { struct videobuf_dvb_frontend *fe0; struct cx23885_dev *dev = port->dev; int err, i; /* Here we need to allocate the correct number of frontends, * as reflected in the cards struct. The reality is that currrently * no cx23885 boards support this - yet. But, if we don't modify this * code then the second frontend would never be allocated (later) * and fail with error before the attach in dvb_register(). * Without these changes we risk an OOPS later. The changes here * are for safety, and should provide a good foundation for the * future addition of any multi-frontend cx23885 based boards. */ printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__, port->num_frontends); for (i = 1; i <= port->num_frontends; i++) { if (videobuf_dvb_alloc_frontend( &port->frontends, i) == NULL) { printk(KERN_ERR "%s() failed to alloc\n", __func__); return -ENOMEM; } fe0 = videobuf_dvb_get_frontend(&port->frontends, i); if (!fe0) err = -EINVAL; dprintk(1, "%s\n", __func__); dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n", dev->board, dev->name, dev->pci_bus, dev->pci_slot); err = -ENODEV; /* dvb stuff */ /* We have to init the queue for each frontend on a port. */ printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name); videobuf_queue_sg_init(&fe0->dvb.dvbq, &dvb_qops, &dev->pci->dev, &port->slock, V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP, sizeof(struct cx23885_buffer), port); } err = dvb_register(port); if (err != 0) printk(KERN_ERR "%s() dvb_register failed err = %d\n", __func__, err); return err; } int cx23885_dvb_unregister(struct cx23885_tsport *port) { struct videobuf_dvb_frontend *fe0; /* FIXME: in an error condition where the we have * an expected number of frontends (attach problem) * then this might not clean up correctly, if 1 * is invalid. * This comment only applies to future boards IF they * implement MFE support. */ fe0 = videobuf_dvb_get_frontend(&port->frontends, 1); if (fe0->dvb.frontend) videobuf_dvb_unregister_bus(&port->frontends); switch (port->dev->board) { case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: netup_ci_exit(port); break; } return 0; }