In preparation to move the stack to use the generic videmode struct for
display timing information rename the y_res member to vactive.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

In preparation to move the stack to use the generic videmode struct for
display timing information rename the x_res member to hactive.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Found with scripts/coccinelle/misc/boolconv.cocci.
Signed-off-by: NAndrew F. Davis <afd@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Workaround for errata i734 in DSS dispc
 - LCD1 Gamma Correction Is Not Working When GFX Pipe Is Disabled

For gamma tables to work on LCD1 the GFX plane has to be used at least
once after DSS HW has come out of reset. The workaround sets up a
minimal LCD setup with GFX plane and waits for one vertical sync irq
before disabling the setup and continuing with the context
restore. The physical outputs are gated during the operation.

For details see:
OMAP543x Multimedia Device Silicon Revision 2.0 Silicon Errata
Literature Number: SWPZ037E
Or some other relevant errata document for the DSS IP version.
Signed-off-by: NJyri Sarha <jsarha@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Add gamma table support to DSS dispc.

DSS driver initializes the default gamma table at component bind time
and holds a copy of all gamma tables in its internal data structure.

Each call to dispc_mgr_set_gamma() updates the internal table and
triggers write to the HW, if it is enabled. The tables are restored to
HW in PM resume callback. The drivers internal data structure match
the HW tables in size and in number of significant bits per color
component. The dispc_mgr_set_gamma() converts the size of any given
table for the internal data structure using linear interpolation.
Default gamma table is restored if NULL is given in place of gamma
lut.

dispc_mgr_gamma_size() gives HW gamma table size for the channel and
returns 0 if gamma table is not supported by the HW or the DSS driver.
Signed-off-by: NJyri Sarha <jsarha@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

All drivers to include the omapdrm/dss/omapdss.h header file. This header
includes the <video/omapdss.h>
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>

With the new PLL helpers, we can clean up the dispc_fclk_rate(). This
will also make dispc_fclk_rate() support clock sources it didn't support
earlier.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

With the new PLL helpers, we can clean up the dispc_mgr_lclk_rate().
This will also make dispc_mgr_lclk_rate() support clock sources it
didn't support earlier.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

The names of the enum dss_clk_source's values are legacy names, only
correct for OMAP3 DSS. Rename the names to more generic ones.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Now that there is no "non-generic" version of the function to get the
clock source name, lets rename dss_get_generic_clk_source_name() to
dss_get_clk_source_name().
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

We have two functions to return a name for clock sources for debugging
purposes: dss_feat_get_clk_source_name() and
dss_get_generic_clk_source_name().

The former is supposed to return a DSS IP version specific name for the
clock source, and the latter is supposed to return a more generic name.

All this seems a bit pointless, so let's remove the former one.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

'enum omap_dss_clk_source' is internal to dss. Let's rename it to
'dss_clk_source' match our naming convention.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

dispc_ovl_check() is not used anywhere, so it can be removed.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

We have removed all the uses of compat code from omapdrm and the
non-compat parts of omapdss, so now we can remove all the compat code
itself.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

We are removing the use of the 'struct omap_overlay_manager' from
omapdrm, and one part of that is removing the use of
mgr->supported_outputs field.

This patch adds dispc_mgr_get_supported_outputs() function which can be
used instead of mgr->supported_outputs. omap_crtc.c is changed to use
the new function.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Interlace field order is different between VENC and HDMI. The driver
currently sets the field order for VENC.

This patch adds the code to set the field order for HDMI.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>

We need double-pixel mode (pixel repetition) for interlace modes. This
patch adds the necessary support to DISPC to output double-pixel mode.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>

Now that omapfb has its own copy of omapdss and display drivers, we can
move omapdss and display drivers which omapdrm uses to omapdrm's
directory.

We also need to change the main drm Makefile so that omapdrm directory
is always entered, because omapdss has a file that can't be built as a
module.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: NDave Airlie <airlied@gmail.com>
Acked-by: NRob Clark <robdclark@gmail.com>

Boolean tests do not need explicit comparison to true or false.
Signed-off-by: NLuis de Bethencourt <luisbg@osg.samsung.com>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

A bunch of dispc functions are only used inside dispc, so we can make
them static.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>

The functions dispc_ovl_set_fifo_threshold and
dispc_ovl_compute_fifo_thresholds are exported, but not declared in
public headers, and thus are not used outside omapdss. So we can remove
the EXPORT_SYMBOL()s.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>

dispc_wb_setup() handles configuration only for mem-to-mem case. This
patch adds the necessary configuration to handle also display capture
mode.

We need to set CAPTUREMODE to 0 (continuous capture), and WBDELAYCOUNT
according to the vertical timings of the display, so that the WB FIFO
has time to flush before the next frame starts.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

In mem-to-mem mode WB CAPTUREMODE needs to be set to 1 (capture one
frame).
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

The color conversion coefficients for RGB to YUV conversion (used with
writeback) don't result in the correct result. This patch sets the
correct coefficients.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

When doing mem-to-mem writeback, there's no pixelclock. However, the
code that calculates scaling factors check that there is a pixel clock.
We can just skip the check when doing mem-to-mem writeback.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Mflag thresholds for all pipelines are set in dispc_init_mflag(), but we
are missing that for WB pipeline. Add WB configuration.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Fifo thresholds for all pipelines are set in dispc_init_fifos(), but we
are missing it for WB pipeline. Add that.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Burst size for all pipelines is set in dispc_configure_burst_sizes(),
but we are missing WB pipe. So add that.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Add handling of OMAP_DSS_CHANNEL_WB to dispc_ovl_set_channel_out() and
dispc_ovl_get_channel_out().
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Refactor dispc_ovl_get_channel_out() to a bit cleaner form, which makes
it easier to add support for writeback in the following patch.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

At the moment we have a function to get the number of writeback
pipelines supported. However, the function is used in a wrong way,
causing a wrong pipeline to get configured when trying to use WB. Also,
we only have a single writeback pipeline on any of the DSS versions.

To fix and simplify this, create a 'has_writeback' flag into the dispc
driver, and after checking the flag, use OMAP_DSS_WB pipeline
explicitly when calling the configuration functions.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Add dumping of the writeback registers to the register dump function.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

By default DISPC asserts hsync and vsync sequentially, i.e. there's
first hsync and that is immediately followed by vsync. This is the only
available behaviour on OMAP2/3, and default behaviour on OMAP4+.

OMAP4+ has ALIGN bit in POL_FREQ register, which makes DISPC assert both
syncs at the same time.

It has been observed that some panels don't like sequential syncs (AM5
EVM's panel). After studying the datasheets for multiple panels and
encoders, and MIPI DPI spec, it looks like there is no standard way to
handle this.

Sometimes the datasheets don't mention the required syncs behaviour at
all, sometimes the datasheets have images that hint towards simultaneous
syncs, and sometimes it is explicitly mentioned that simultaneous syncs
are needed. No panels or encoders requiring sequential sync was found.

It thus seems to be safe to default to simultaneous syncs when the ALIGN
bit is available. This fixed AM5 EVM's panel, and no side effects have
been observed on other panels or encoders.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>

Improve the DISPC debug print for scaling.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

The current driver does both x and y decimation on OMAP3 DSS. Testing
shows that x decimation rarely works, leading to underflows.

The exact reason for this is unclear, as the underflows seem to happen
even with low pixel clock rates, and I would presume that if the DSS can
manage a display with 140MHz pixel clock, it could manage x decimation
with factor 2 with a low pixel clock (~30MHz).

So it is possible that there is a problem somewhere else, in memory
management, or DSS DMA, or similar. I have not found anything that would
help this.

So, to fix the downscaling scaling, this patch removes x decimation for
OMAP3. This will limit some of the more demanding downscaling scenarios,
but one could argue that using DSS to downscale such a large amount is
insane in the first place, as the produced image is rather bad quality.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

The DISPC's scaling code seems to presume that decimation always
succeeds, and so we always do find a suitable downscaling setup.
However, this is not the case, and the algorithm can fail.

When that happens, the code just proceeds with wrong results, causing
issues later.

Add the necessary checks to bail out if the scaling algorithm failed.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

The DISPC driver uses 64 bit arithmetic to calculate the required clock
rate for scaling. The code does not seem to work correctly, and instead
calculates with 32 bit numbers, giving wrong result.

Fix the code by typecasting values to u64 first, so that the
calculations do happen in 64 bits.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

pixel_inc and row_inc work differently on OMAP2/3 and OMAP4+ DSS. On
OMAP2/3 DSS, the pixel_inc is _not_ added by the HW at the end of the
line, after the last pixel, whereas on OMAP4+ it is.

The driver currently works for OMAP4+, but does not handle OMAP2/3
correctly, which leads to tilted image when row_inc is used.

This patch adds a flag to DISPC driver so that the pixel_inc is added
when required.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

On OMAP3/AM43xx some scaling factors cause underflows/synclosts. After
studying this, I found that sometimes the driver uses three-tap scaling
with downscaling factor smaller than x0.5. This causes issues, as x0.5
is the limit for three-tap scaling.

The driver has FEAT_PARAM_DOWNSCALE parameter, but that seems to be for
five-tap scaling, which allows scaling down to x0.25.

This patch adds checks for both horizontal and vertical scaling. For
horizontal the HW always uses 5 taps, so the limit is x0.25.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

After calculating the required decimation for scaling, the dispc driver
checks once more if the resulting configuration is valid by calling
check_horiz_timing_omap3().

Earlier calls to this function have correctly used in_width and
in_height as parameters, but the last call uses width and height. This
causes the driver to possibly reject scaling that would work.

This patch fixes the parameters.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>