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  1. 06 11月, 2013 1 次提交
  3. 04 10月, 2012 4 次提交
  5. 23 3月, 2012 2 次提交
    • M
      microblaze: Handle TLB skip size dynamically · e02db0aa
      由 Michal Simek 提交于 
      This patch fix the problem with rootfs on JFFS2 with early printk
console turned on.

The origin version used TLB63 for temporary early printk mapping.
The code expect that kernel is not able to use all 64 TLB entries
till early printk console is remapped by ioremap. After that
temporary mapping on TLB63 is silently lost.
This expectation give the opportunity to have early console pretty
early.

Microblaze systems with JFFS2 rootfs with early printk console turned on
used more than 64 TLB entries before kernel can remap early console.
Based on that kernel does access to bad area because early printk mapping
is rewritten.

This patch introduces tlb_skip variable which dynamically stores number
of skipped TLB entries from the TLB0. skip_tlb=2 means that TLB0 and TLB1
should be skipped.

MICROBLAZE_TLB_SKIP defines how many TLB is skipped at the kernel start.
They can be used for user purpose.

TLB 63 is used for temporary LMB mapping (MICROBLAZE_LMB_TLB_ID).

Also clean TLBLO when kernel starts.

For specific kernel sizes kernel can use just one TLB. Detect this case
and use the second TLB for general purpose.

Change _tlbia function to flush TLB entries from tlb_skip to TLB_SIZE.

Export tlb_skip size through debugfs.
Signed-off-by: NMichal Simek <monstr@monstr.eu>
      e02db0aa
    • M
      microblaze: Introduce TLB skip size · 1451d1d8
      由 Michal Simek 提交于 
      TLB skip size direct how many TLBs is skipped.
Currently TLB0 and TLB1 are used for Linux kernel mapping
that's why their are skipped.
Signed-off-by: NMichal Simek <monstr@monstr.eu>
      1451d1d8
  7. 25 7月, 2011 1 次提交
    • M
      microblaze: Fix unaligned value saving to the stack for system with MMU · c1138940
      由 Michal Simek 提交于 
      Several registers weren't saved correctly to the stack.

Unaligned expection for system with MMU stores
value in ex_tmp_data_loc_X address which is load to registers r3.
The next step is to move this value from r3 to a destination
register which caused unaligned exception. For several registers
this value was directly moved to the register.

For example for r28:
by "or r28, r0, r3"

but register r28 was rewritten when kernel returns from exception
handler by value saved on stack.

This patch changed r3 saving to the correct address on the stack.
For example for r28:
by "swi r3, r1, 4 * 28"

When kernel returns from the exception handler, correct value is restored.
Signed-off-by: NMichal Simek <monstr@monstr.eu>
      c1138940
  9. 09 3月, 2011 3 次提交
  11. 28 1月, 2011 1 次提交
    • M
      microblaze: Fix unaligned issue on MMU system with BS=0 DIV=1 · 9c749e17
      由 Michal Simek 提交于 
      Unaligned code use shift for finding register operand.
There is used BSRLI(r8,r8,2) macro which is expand for BS=0, DIV=1
by
	ori rD, r0, (1 << imm);	\
	idivu rD, rD, rA

but if rD is equal rA then ori instruction rewrite value which
should be devide.

The patch remove this macro which use idivu instruction because
idivu takes 32/34 cycles. The highest shifting is 20 which takes
20 cycles.
Signed-off-by: NMichal Simek <monstr@monstr.eu>
      9c749e17
  13. 03 1月, 2011 1 次提交
  15. 04 8月, 2010 1 次提交
    • S
      microblaze: Add stack unwinder · ce3266c0
      由 Steven J. Magnani 提交于 
      Implement intelligent backtracing by searching for stack frame creation,
and emitting only return addresses. Use print_hex_dump() to display the
entire binary kernel stack.

Limitation: MMU kernels are not currently able to trace beyond a system trap
(interrupt, syscall, etc.). It is the intent of this patch to provide
infrastructure that can be extended to add this capability later.

Changes from V1:
* Removed checks in find_frame_creation() that prevented location of the frame
  creation instruction in heavily optimized code
* Various formatting/commenting/file location tweaks per review comments
* Dropped Kconfig option to enable STACKTRACE as something logically separate
Signed-off-by: NSteven J. Magnani <steve@digidescorp.com>
      ce3266c0
  17. 01 4月, 2010 5 次提交
  19. 05 10月, 2009 1 次提交
  21. 22 9月, 2009 2 次提交
  23. 27 7月, 2009 1 次提交
    • M
      microblaze: Support unaligned address for put/get_user macros · 3863dbce
      由 Michal Simek 提交于 
      This patch add support for cases where load/store instruction
in put/get_user macro gets unaligned pointer to data and this
address is not valid. I prevent all cases which can failed.
I had to disable first stage of unaligned handler which is used
only for noMMU kernel and the whole work is done when interrupt
is enabled.
You have enable HW support for detect unaligned access in Microblaze.

This patch fixed three LTP tests:
getpeername01, getsockname01, socketpair01
Signed-off-by: NMichal Simek <monstr@monstr.eu>
      3863dbce
  25. 26 5月, 2009 1 次提交
  27. 27 3月, 2009 1 次提交