fsl_get_immr() uses /soc/ranges to determine the immr.

mpc885_get_clock() transforms a crystal frequency into a system frequency
according to the PLL register settings.

pq2_get_clocks() does the same as the above for the PowerQUICC II,
except that it produces several different clocks.

The mpc8xx/pq2 set_clocks() functions modify common properties in
the device tree based on the given clock data.

The mpc885/pq2 fixup_clocks() functions call get_clocks(), and
pass the results to set_clocks().
Signed-off-by: NScott Wood <scottwood@freescale.com>
Acked-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Consensus was reached to put PCI nodes at the root of the tree (and not
under /soc), but the phandle to a control node was rejected in favor of
simply not worrying about /pci/reg overlapping /soc/ranges.

This updates cuboot-82xx to not look for the phandle.
Signed-off-by: NScott Wood <scottwood@freescale.com>
Acked-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

This code assumes that the ports have been previously set up, with
buffers in DPRAM.
Signed-off-by: NScott Wood <scottwood@freescale.com>
Acked-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

This introduces a new device binding for the CPM and other devices on
these boards.  Some of the changes include:

1. Proper namespace scoping for Freescale compatibles and properties.

2. Use compatible rather than things like device_type and model
to determine which particular variant of a device is present.

3. Give the drivers the relevant CPM command word directly, rather than
requiring it to have a lookup table based on device-id, SCC v. SMC, and
CPM version.

4. Specify the CPCR and the usable DPRAM region in the CPM's reg property.

Boards that do not require the legacy bindings should select
CONFIG_PPC_CPM_NEW_BINDING to enable the of_platform CPM devices. Once
all existing boards are converted and tested, the config option can
become default y to prevent new boards from using the old model.  Once
arch/ppc is gone, the config option can be removed altogether.
Signed-off-by: NScott Wood <scottwood@freescale.com>
Acked-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

As suggested by David Gibson, now that we have a separate node
for the baud rate generators, it's better to use the standard
clock-frequency property than a cpm-node-level fsl,brg-frequency
property.

This patch updates existing places where fsl,brg-frequency is
used.
Signed-off-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Commit 8112753b made 44x in
ARCH=powerpc builds use cpu setup routines in cpu_setup_44x.S,
but didn't make a similar change for ARCH=ppc, and consequently
the ARCH=ppc builds fail with undefined symbols (since both use
the same cputable.c).

This fixes it by including cpu_setup_44x.S in the ARCH=ppc builds,
and by taking out the now-redundant FPU initialization in
arch/ppc/kernel/head_44x.S.
Signed-off-by: NPaul Mackerras <paulus@samba.org>

Reverts commit a15da8ef

This driver is used by devices other than the xilinx opb-uartlite which
depend on bytewise access to the registers.  The change to 32 bit access
does not work on these devices.
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
Acked-by: NPeter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

Add macros to define register names to improve readability.
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

This simply adds the boilerplate default Ethernet address to embed_config
for the Xilinx platform (bug fix).
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

XilnixFB can be used by more than just arch/ppc.  Move the data structure
definition into include/linux/xilinxfb.h so it can be used by microblaze
and arch/powerpc
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

Flush the uartlite RX fifo so that characters typed before entry into
the zImage wrapper do not muck up the kernel command line.
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

Tell git to ignore the generated treeImage.* files in arch/powerpc/boot
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

By configuring it earlier we get console output sooner which is helpful
for debugging when the kernel crashes before the serial drivers are
initialized.
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

Add of_platform bus binding so this driver can be used with arch/powerpc
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

Tidy the comments to split the driver into logical section; the main driver,
the console driver, the platform bus binding, and module initialization
and teardown.
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

Separate the bus binding code from the driver structure allocation code in
preparation for adding the of_platform_bus bindings needed by arch/powerpc
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

Changed to make the following OF_platform bus binding patch a wee bit cleaner
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

Changed to match naming convention used in the rest of the module
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

The Uartlite data sheet defines the registers as 32 bit wide.  This
patch changes the register access to use 32 bit transfers and eliminates
the magic +3 offset which is currently required to make the device
work.
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
Acked-by: NJohn Williams <jwilliams@itee.uq.edu.au>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

Adds support for generic Xilinx Virtex boards.  Any board which specifies
"xilinx,virtex" in the compatible property will make use of this board
support.
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

Adds support for the Xilinx opb-intc interrupt controller
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

Add the needed kconfig macros to enable Xilinx Virtex board support
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

Allows the bootwrapper to use the uartlite device for console output.
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

Add a workaround for PowerPC 440EPx/GRx incorrect write to
DDR SDRAM errata. Data can be written to wrong address
in SDRAM when write pipelining enabled on plb0. We disable
it in the cpu_setup for these processors at early init.
Signed-off-by: NValentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

The PowerPC 440EP(x) FPU init is currently done in head_44x
under ifdefs. Since we should support more then one board
in the same kernel, we move FPU initialization code from head_44x
to cpu_setup_44x and add cpu_setup callbacks for 440EP(x).
Signed-off-by: NValentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

This adds cpu_setup functionality for ppc44x platform.
Low level cpu-spefic initialization routines should be
placed in cpu_setup_44x.S and a callback should be
added to cputable. The cpu_setup is invoked
by identify_cpu() function at early init.
Signed-off-by: NValentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

Pass the appropriate -mcpu flag to the treeboot-walnut.o object to prevent
some toolchains from erroring out with unknown opcodes
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

Signed-off-by: NTony Breeds <tony@bakeyournoodle.com>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

This registers a clock event structure for the decrementer and turns
on CONFIG_GENERIC_CLOCKEVENTS, which means that we now don't need
most of timer_interrupt(), since the work is done in generic code.
For secondary CPUs, their decrementer clockevent is registered when
the CPU comes up (the generic code automatically removes the
clockevent when the CPU goes down).
Signed-off-by: NTony Breeds <tony@bakeyournoodle.com>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

Some older pSeries machines were panicking in pSeries_log_error
because it was getting called before it was ready.  This is a result
of commit "[POWERPC] pseries: Fix jumbled no_logging flag."
(79c0108d).

This fixes it by explicitly enabling RTAS error logging when it has
been initialized, and also makes the code clearer by renaming the
"no_more_logging" variable to "logging_enabled".
Signed-off-by: NTony Breeds <tony@bakeyournoodle.com>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

Use alloc_maybe_bootmem() which wraps the if (mem_init_done)
malloc clause.
Signed-off-by: NLinas Vepstas <linas@austin.ibm.com>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

This adds support for the PCI bus on Celleb with new "I/O routines
for PowerPC."  External PCI on Celleb must do explicit synchronization
with devices (Bus has no automatic synchronization feature).
Signed-off-by: NKou Ishizaki <Kou.Ishizaki@toshiba.co.jp>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

This is an update for Serial I/O on Celleb.
  - Detection algorithm has been changed
Signed-off-by: NKou Ishizaki <Kou.Ishizaki@toshiba.co.jp>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

This changes the Celleb code to work with new Guest OS Interface
to tweak HTAB on Beat. It detects old and new Guest OS Interfaces
automatically.
Signed-off-by: NKou Ishizaki <Kou.Ishizaki@toshiba.co.jp>
Acked-by: NArnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

This supports Power/Reset buttons on Beat on Celleb.

On Beat, we have an event from Beat if Power button or Reset button
is pressed. This patch catches the event and convert it to a signal
to INIT process by calling ctrl_alt_del() function.

/sbin/inittab have no entry to turn the machine power off so we have
to detect if power button is pressed or not internally in our driver.
This idea is taken from PS3's event handling subsystem.
Signed-off-by: NKou Ishizaki <Kou.Ishizaki@toshiba.co.jp>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

This is an update for "Beat on Celleb"
  - Move beat_pause(), beat_kexec_cpu_down() from setup.c to beat.c

Signed-off-by: <Kou.Ishizaki@toshiba.co.jp>
Acked-by: NArnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

Signed-off-by: NJoachim Fenkes <fenkes@de.ibm.com>
Signed-off-by: NPaul Mackerras <paulus@samba.org>