1. 10 9月, 2014 2 次提交
  2. 09 9月, 2014 7 次提交
  3. 28 7月, 2014 2 次提交
    • C
      serial: 8250_dw: Add support for deferred probing · c8ed99d4
      Chen-Yu Tsai 提交于
      The 8250_dw driver fails to probe if the specified clock isn't
      registered at probe time. Even if a clock frequency is given,
      the required clock might be gated because it wasn't properly
      enabled.
      
      This happened to me when the device is registered through DT,
      and the clock was part of an MFD, the PRCM found on A31 and A23
      SoCs. Unlike core clocks that are registered with OF_CLK_DECLARE,
      which happen almost immediately after the kernel starts, the
      clocks are registered as sub-devices of the PRCM MFD platform
      device. Even though devices are registered in the order they are
      found in the DT, the drivers are registered in a different,
      arbitrary order. It is possible that the 8250_dw driver is
      registered, and thus associated with the device and probed, before
      the clock driver is registered and probed.
      
      8250_dw then reports unable to get the clock, and fails. Without
      a working console, the kernel panics.
      
      This patch adds support for deferred probe handling for the clock
      and reset controller. It also fixes the cleanup path if
      serial8250_register_8250_port fails.
      Signed-off-by: NChen-Yu Tsai <wens@csie.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      c8ed99d4
    • C
      serial: 8250_dw: Add optional reset control support · 7fe090bf
      Chen-Yu Tsai 提交于
      The Allwinner A31 and A23 SoCs have a reset controller
      maintaining the UART in reset by default.
      
      This patch adds optional reset support to the driver.
      Signed-off-by: NChen-Yu Tsai <wens@csie.org>
      Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      7fe090bf
  4. 18 7月, 2014 2 次提交
    • Y
      serial/uart/8250: Add tunable RX interrupt trigger I/F of FIFO buffers · aef9a7bd
      Yoshihiro YUNOMAE 提交于
      Add tunable RX interrupt trigger I/F of FIFO buffers.
      
      Serial devices are used as not only message communication devices but control
      or sending communication devices. For the latter uses, normally small data
      will be exchanged, so user applications want to receive data unit as soon as
      possible for real-time tendency. If we have a sensor which sends a 1 byte data
      each time and must control a device based on the sensor feedback, the RX
      interrupt should be triggered for each data.
      
      According to HW specification of serial UART devices, RX interrupt trigger
      can be changed, but the trigger is hard-coded. For example, RX interrupt trigger
      in 16550A can be set to 1, 4, 8, or 14 bytes for HW, but current driver sets
      the trigger to only 8bytes.
      
      This patch makes some devices change RX interrupt trigger from userland.
      
      <How to use>
      - Read current setting
       # cat /sys/class/tty/ttyS0/rx_trig_bytes
       8
      
      - Write user setting
       # echo 1 > /sys/class/tty/ttyS0/rx_trig_bytes
       # cat /sys/class/tty/ttyS0/rx_trig_bytes
       1
      
      <Support uart devices>
      - 16550A and Tegra (1, 4, 8, or 14 bytes)
      - 16650V2 (8, 16, 24, or 28 bytes)
      - 16654 (8, 16, 56, or 60 bytes)
      - 16750 (1, 16, 32, or 56 bytes)
      
      <Change log>
      Changes in V9:
       - Use attr_group instead of dev_spec_attr_group of uart_port structure
      
      Changes in V8:
       - Divide this patch from V7's patch based on Greg's comment
      
      Changes in V7:
       - Add Documentation
       - Change I/F name from rx_int_trig to rx_trig_bytes because the name
         rx_int_trig is hard to understand how users specify the value
      
      Changes in V6:
       - Move FCR_RX_TRIG_* definition in 8250.h to include/uapi/linux/serial_reg.h,
         rename those to UART_FCR_R_TRIG_*, and use UART_FCR_TRIGGER_MASK to
         UART_FCR_R_TRIG_BITS()
       - Change following function names:
          convert_fcr2val() => fcr_get_rxtrig_bytes()
          convert_val2rxtrig() => bytes_to_fcr_rxtrig()
       - Fix typo in serial8250_do_set_termios()
       - Delete the verbose error message pr_info() in bytes_to_fcr_rxtrig()
       - Rename *rx_int_trig/rx_trig* to *rxtrig* for several functions or variables
         (but UI remains rx_int_trig)
       - Change the meaningless variable name 'val' to 'bytes' following functions:
          fcr_get_rxtrig_bytes(), bytes_to_fcr_rxtrig(), do_set_rxtrig(),
          do_serial8250_set_rxtrig(), and serial8250_set_attr_rxtrig()
       - Use up->fcr in order to get rxtrig_bytes instead of rx_trig_raw in
         fcr_get_rxtrig_bytes()
       - Use conf_type->rxtrig_bytes[0] instead of switch statement for support check
         in register_dev_spec_attr_grp()
       - Delete the checking whether a user changed FCR or not when minimum buffer
         is needed in serial8250_do_set_termios()
      
      Changes in V5.1:
       - Fix FCR_RX_TRIG_MAX_STATE definition
      
      Changes in V5:
       - Support Tegra, 16650V2, 16654, and 16750
       - Store default FCR value to up->fcr when the port is first created
       - Add rx_trig_byte[] in uart_config[] for each device and use rx_trig_byte[]
         in convert_fcr2val() and convert_val2rxtrig()
      
      Changes in V4:
       - Introduce fifo_bug flag in uart_8250_port structure
         This is enabled only when parity is enabled and UART_BUG_PARITY is enabled
         for up->bugs. If this flag is enabled, user cannot set RX trigger.
       - Return -EOPNOTSUPP when it does not support device at convert_fcr2val() and
         at convert_val2rxtrig()
       - Set the nearest lower RX trigger when users input a meaningless value at
         convert_val2rxtrig()
       - Check whether p->fcr is existing at serial8250_clear_and_reinit_fifos()
       - Set fcr = up->fcr in the begging of serial8250_do_set_termios()
      
      Changes in V3:
       - Change I/F from ioctl(2) to sysfs(rx_int_trig)
      
      Changed in V2:
       - Use _IOW for TIOCSFIFORTRIG definition
       - Pass the interrupt trigger value itself
      Signed-off-by: NYoshihiro YUNOMAE <yoshihiro.yunomae.ez@hitachi.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      aef9a7bd
    • A
      serial: 8250: introduce up_to_u8250p() helper · b1261c86
      Andy Shevchenko 提交于
      It helps to cast struct uart_port to struct uart_8250_port at runtime.
      Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      b1261c86
  5. 11 7月, 2014 3 次提交
  6. 20 6月, 2014 2 次提交
    • R
      tty/serial: fix 8250 early console option passing to regular console · 60efcf04
      Rob Herring 提交于
      In the conversion to generic early console, the passing of options from
      the early 8250 console to the regular ttyS console was broken. This
      resulted in the baud rate changing when switching consoles during boot.
      
      This feature allows specifying a single console option on the kernel
      command line rather than both an early console and regular serial tty
      console. It would be nice to generalize this feature. However, it only
      works if the correct baud rate can be probed early which is not the
      case on many platforms which have non-standard UART clock rates. So for
      now, this is left as an 8250 specific feature.
      Reported-and-tested-by: NTony Luck <tony.luck@intel.com>
      Signed-off-by: NRob Herring <robh@kernel.org>
      Cc: Jiri Slaby <jslaby@suse.cz>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      60efcf04
    • P
      serial: Fix IGNBRK handling · ef8b9ddc
      Peter Hurley 提交于
      If IGNBRK is set without either BRKINT or PARMRK set, some uart
      drivers send a 0x00 byte for BREAK without the TTYBREAK flag to the
      line discipline, when it should send either nothing or the TTYBREAK flag
      set. This happens because the read_status_mask masks out the BI
      condition, which uart_insert_char() then interprets as a normal 0x00 byte.
      
      SUS v3 is clear regarding the meaning of IGNBRK; Section 11.2.2, General
      Terminal Interface - Input Modes, states:
        "If IGNBRK is set, a break condition detected on input shall be ignored;
         that is, not put on the input queue and therefore not read by any
         process."
      
      Fix read_status_mask to include the BI bit if IGNBRK is set; the
      lsr status retains the BI bit if a BREAK is recv'd, which is
      subsequently ignored in uart_insert_char() when masked with the
      ignore_status_mask.
      
      Affected drivers:
      8250 - all
      serial_txx9
      mfd
      amba-pl010
      amba-pl011
      atmel_serial
      bfin_uart
      dz
      ip22zilog
      max310x
      mxs-auart
      netx-serial
      pnx8xxx_uart
      pxa
      sb1250-duart
      sccnxp
      serial_ks8695
      sirfsoc_uart
      st-asc
      vr41xx_siu
      zs
      sunzilog
      fsl_lpuart
      sunsab
      ucc_uart
      bcm63xx_uart
      sunsu
      efm32-uart
      pmac_zilog
      mpsc
      msm_serial
      m32r_sio
      
      Unaffected drivers:
      omap-serial
      rp2
      sa1100
      imx
      icom
      
      Annotated for fixes:
      altera_uart
      mcf
      
      Drivers without break detection:
      21285
      xilinx-uartps
      altera_jtaguart
      apbuart
      arc-uart
      clps711x
      max3100
      uartlite
      msm_serial_hs
      nwpserial
      lantiq
      vt8500_serial
      
      Unknown:
      samsung
      mpc52xx_uart
      bfin_sport_uart
      cpm_uart/core
      
      Fixes: Bugzilla #71651, '8250_core.c incorrectly handles IGNBRK flag'
      Reported-by: NIvan <athlon_@mail.ru>
      Signed-off-by: NPeter Hurley <peter@hurleysoftware.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      ef8b9ddc
  7. 29 5月, 2014 4 次提交
  8. 04 5月, 2014 2 次提交
  9. 25 4月, 2014 6 次提交
  10. 18 4月, 2014 1 次提交
  11. 17 4月, 2014 1 次提交
  12. 09 3月, 2014 3 次提交
  13. 01 3月, 2014 1 次提交
  14. 14 2月, 2014 3 次提交
    • J
      serial: 8250: Support XR17V35x fraction divisor · 45a7bd63
      Joe Schultz 提交于
      The Exar XR17V35x family of UARTs have an additional fractional divisor
      register (DLD) which was not being used. Calculate and set this
      register for these devices to reduce their baud rate error.
      Signed-off-by: NJoe Schultz <jschultz@xes-inc.com>
      Signed-off-by: NAaron Sierra <asierra@xes-inc.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      45a7bd63
    • D
      serial: 8250_pci: unbreak last serial ports on NetMos 9865 cards · 333c085e
      Dmitry Eremin-Solenikov 提交于
      Aparently 9865 uses standard BAR encoding scheme (unlike 99xx cards).
      Current pci_netmos_9900_setup() uses wrong BAR indices for the 9865 PCI
      device, function 2. Using standard BAR indices makes all 6 ports work
      for me. Thus disable the NetMos 9900 quirk for NetMos 9865 pci device.
      
      For the reference, here is the relevant part of lspci for my device:
      
      02:07.0 Serial controller: MosChip Semiconductor Technology Ltd. PCI
      9865 Multi-I/O Controller (prog-if 02 [16550])
      	Subsystem: Device a000:1000
      	Flags: bus master, medium devsel, latency 32, IRQ 17
      	I/O ports at ac00 [size=8]
      	Memory at fcfff000 (32-bit, non-prefetchable) [size=4K]
      	Memory at fcffe000 (32-bit, non-prefetchable) [size=4K]
      	Capabilities: [48] Power Management version 2
      	Kernel driver in use: serial
      
      02:07.1 Serial controller: MosChip Semiconductor Technology Ltd. PCI
      9865 Multi-I/O Controller (prog-if 02 [16550])
      	Subsystem: Device a000:1000
      	Flags: bus master, medium devsel, latency 32, IRQ 18
      	I/O ports at a800 [size=8]
      	Memory at fcffd000 (32-bit, non-prefetchable) [size=4K]
      	Memory at fcffc000 (32-bit, non-prefetchable) [size=4K]
      	Capabilities: [48] Power Management version 2
      	Kernel driver in use: serial
      
      02:07.2 Communication controller: MosChip Semiconductor Technology Ltd.
      PCI 9865 Multi-I/O Controller
      	Subsystem: Device a000:3004
      	Flags: bus master, medium devsel, latency 32, IRQ 19
      	I/O ports at a400 [size=8]
      	I/O ports at a000 [size=8]
      	I/O ports at 9c00 [size=8]
      	I/O ports at 9800 [size=8]
      	Memory at fcffb000 (32-bit, non-prefetchable) [size=4K]
      	Capabilities: [48] Power Management version 2
      	Kernel driver in use: serial
      Signed-off-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      333c085e
    • M
      serial: 8250_dw: fix compilation warning when !CONFIG_PM_SLEEP · 13b949f0
      Mika Westerberg 提交于
      CONFIG_PM will be set if either or both CONFIG_PM_SLEEP and
      CONFIG_PM_RUNTIME is set. Compiling the driver with !CONFIG_PM_SLEEP causes
      following compilation warnings:
      
      drivers/tty/serial/8250/8250_dw.c:404:12: warning: ‘dw8250_suspend’ defined but not used [-Wunused-function]
      drivers/tty/serial/8250/8250_dw.c:413:12: warning: ‘dw8250_resume’ defined but not used [-Wunused-function]
      
      Fix this by using CONFIG_PM_SLEEP instead.
      Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      13b949f0
  15. 08 1月, 2014 1 次提交
    • S
      serial: 8250: enable UART_BUG_NOMSR for Tegra · 3685f19e
      Stephen Warren 提交于
      Tegra chips have 4 or 5 identical UART modules embedded. UARTs C..E have
      their MODEM-control signals tied off to a static state. However UARTs A
      and B can optionally route those signals to/from package pins, depending
      on the exact pinmux configuration.
      
      When these signals are not routed to package pins, false interrupts may
      trigger either temporarily, or permanently, all while not showing up in
      the IIR; it will read as NO_INT. This will eventually lead to the UART
      IRQ being disabled due to unhandled interrupts. When this happens, the
      kernel may print e.g.:
      
          irq 68: nobody cared (try booting with the "irqpoll" option)
      
      In order to prevent this, enable UART_BUG_NOMSR. This prevents
      UART_IER_MSI from being enabled, which prevents the false interrupts
      from triggering.
      
      In practice, this is not needed under any of the following conditions:
      
      * On Tegra chips after Tegra30, since the HW bug has apparently been
        fixed.
      
      * On UARTs C..E since their MODEM control signals are tied to the correct
        static state which doesn't trigger the issue.
      
      * On UARTs A..B if the MODEM control signals are routed out to package
        pins, since they will then carry valid signals.
      
      However, we ignore these exceptions for now, since they are only relevant
      if a board actually hooks up more than a 4-wire UART, and no currently
      supported board does this. If we ever support a board that does, we can
      refine the algorithm that enables UART_BUG_NOMSR to take those exceptions
      into account, and/or read a flag from DT/... that indicates that the
      board has hooked up and pinmux'd more than a 4-wire UART.
      
      Reported-by: Olof Johansson <olof@lixom.net> # autotester
      Cc: <stable@vger.kernel.org>
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      3685f19e