- 04 10月, 2011 2 次提交
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由 Kukjin Kim 提交于
Removed - arch/arm/plat-s3c24xx/include/plat/pll.h - arch/arm/mach-s3c64xx/include/mach/pll.h - arch/arm/plat-s5p/include/plat/pll.h - arch/arm/plat-samsung/include/plat/pll6553x.h And created - arch/arm/plat-samsung/include/plat/pll.h Cc: Ben Dooks <ben-linux@fluff.org> [kgene.kim@samsung.com: changed title] [kgene.kim@samsung.com: fixed conflicts in plat-s5p/include/pll.h] Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Heiko Stuebner 提交于
This clock is special to the S3C2416/2450 SoCs. Signed-off-by: NHeiko Stuebner <heiko@sntech.de> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 20 7月, 2011 1 次提交
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由 Thomas Abraham 提交于
Signed-off-by: NThomas Abraham <thomas.ab@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 06 1月, 2011 1 次提交
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由 Yauhen Kharuzhy 提交于
Define maps for HSMMC devices. S3C2443 has one HSMMC device with base address 0x4A800000. S3C2416 has HSMMC0 at 0x4AC00000 and HSMMC1 at 0x4A800000. So suppose that S3C2443 has only HSMMC1. Define clock for hsmmc0 device and register it. Signed-off-by: NYauhen Kharuzhy <jekhor@gmail.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 10 5月, 2010 1 次提交
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由 Ben Dooks 提交于
Add basic clock support for the PLLs, HSMMC channels and PWM clocks. This is enough to get a basic system up and running. Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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