From fe23372eb764564063c9027c0fb8d53fd7138092 Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Tue, 13 Aug 2019 20:51:56 +0800 Subject: [PATCH] arm64: tlb: Justify non-leaf invalidation in flush_tlb_range() mainline inclusion from mainline-4.20-rc1 commit: d8289d3a5854a2a0ae144bff106a78738fe63050 category: feature feature: Reduce synchronous TLB invalidation on ARM64 bugzilla: NA CVE: NA -------------------------------------------------- Add a comment to explain why we can't get away with last-level invalidation in flush_tlb_range() Acked-by: Peter Zijlstra (Intel) Signed-off-by: Will Deacon Signed-off-by: Catalin Marinas Signed-off-by: Hanjun Guo Reviewed-by: Xuefeng Wang Signed-off-by: Yang Yingliang --- arch/arm64/include/asm/tlbflush.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h index e257f8655b84..ddbf1718669d 100644 --- a/arch/arm64/include/asm/tlbflush.h +++ b/arch/arm64/include/asm/tlbflush.h @@ -182,6 +182,10 @@ static inline void __flush_tlb_range(struct vm_area_struct *vma, static inline void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) { + /* + * We cannot use leaf-only invalidation here, since we may be invalidating + * table entries as part of collapsing hugepages or moving page tables. + */ __flush_tlb_range(vma, start, end, false); } -- GitLab