From f8b41ec14dff19e6c8359d9707241013ca7fe214 Mon Sep 17 00:00:00 2001 From: Huazhong Tan Date: Fri, 24 May 2019 14:43:18 +0800 Subject: [PATCH] net: hns3: hanlde empty unknown interrupt driver inclusion category: bugfix bugzilla: NA CVE: NA Since some msix interrupt's status may be cleared by hardware, so when the driver receives the interrupt, reading HCLGE_VECTOR0_PF_OTHER_INT_STS_REG register will get an empty unknown interrupt. For this case, the irq handler should enable vector0 interrupt. Signed-off-by: Huazhong Tan Reviewed-by: lipeng Reviewed-by: Yang Yingliang Signed-off-by: Yang Yingliang --- drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index 3e6fc54dd269..b9fb5c3059a5 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -2737,6 +2737,7 @@ static u32 hclge_check_event_cause(struct hclge_dev *hdev, u32 *clearval) if (msix_src_reg & HCLGE_VECTOR0_REG_MSIX_MASK) { dev_info(&hdev->pdev->dev, "received event 0x%x\n", msix_src_reg); + *clearval = msix_src_reg; return HCLGE_VECTOR0_EVENT_ERR; } @@ -2750,6 +2751,8 @@ static u32 hclge_check_event_cause(struct hclge_dev *hdev, u32 *clearval) /* print other vector0 event source */ dev_info(&hdev->pdev->dev, "cmdq_src_reg:0x%x, msix_src_reg:0x%x\n", cmdq_src_reg, msix_src_reg); + *clearval = msix_src_reg; + return HCLGE_VECTOR0_EVENT_OTHER; } @@ -2830,7 +2833,8 @@ static irqreturn_t hclge_misc_irq_handle(int irq, void *data) hclge_clear_event_cause(hdev, event_cause, clearval); /* clear the source of interrupt if it is not cause by reset */ - if (event_cause == HCLGE_VECTOR0_EVENT_MBX) { + if (!clearval || + event_cause == HCLGE_VECTOR0_EVENT_MBX) { hclge_enable_vector(&hdev->misc_vector, true); } -- GitLab