diff --git a/drivers/crypto/hisilicon/hpre/hpre_crypto.c b/drivers/crypto/hisilicon/hpre/hpre_crypto.c
index 68a1d5e9567f0356434fb461ef626a19161c7e9d..8285bc4f660e82f4e42d90bd3fb349f701a40879 100644
--- a/drivers/crypto/hisilicon/hpre/hpre_crypto.c
+++ b/drivers/crypto/hisilicon/hpre/hpre_crypto.c
@@ -24,7 +24,7 @@ struct hpre_ctx;
 #define _CRT_INV			4
 #define _DH_G_FLAG		0x02
 #define HPRE_TRY_SEND_TIMES	100
-#define HPRE_INVLD_REQ_ID		-1
+#define HPRE_INVLD_REQ_ID		(-1)
 #define GET_DEV(ctx)		((ctx)->qp->qm->pdev->dev)
 
 #define BITS64_MERGE(low_32, high_32)	(((u64)(low_32)) | \
@@ -198,7 +198,7 @@ static int _get_data_dma_addr(struct hpre_asym_request *hpre_req,
 
 static int _cp_data_to_dma_buf(struct hpre_asym_request *hpre_req,
 			       struct scatterlist *data, unsigned int len,
-			       int is_src, int is_dh, dma_addr_t *tmp)
+			       int is_src, dma_addr_t *tmp)
 {
 	struct hpre_ctx *ctx = hpre_req->ctx;
 	struct device *dev = &GET_DEV(ctx);
@@ -241,7 +241,7 @@ static int _hw_data_init(struct hpre_asym_request *hpre_req,
 			return ret;
 	} else {
 		ret = _cp_data_to_dma_buf(hpre_req, data, len,
-					  is_src, is_dh, &tmp);
+					  is_src, &tmp);
 		if (ret)
 			return ret;
 	}
diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c
index 8e01097afb406ae876b67f1f6ea276d6e5bd9711..e52afb20207d962d23d932d1f4e478027b75da44 100644
--- a/drivers/crypto/hisilicon/hpre/hpre_main.c
+++ b/drivers/crypto/hisilicon/hpre/hpre_main.c
@@ -242,7 +242,7 @@ static int uacce_mode_set(const char *val, const struct kernel_param *kp)
 		return -EINVAL;
 
 	ret = kstrtou32(val, _TO_DECIMAL, &n);
-	if (ret != 0 || n > 2)
+	if (ret != 0 || n > UACCE_MODE_NOIOMMU)
 		return -EINVAL;
 
 	return param_set_int(val, kp);
diff --git a/drivers/uacce/uacce.c b/drivers/uacce/uacce.c
index 9e61cfd646560a907a69d9e33af74ddc08261c6f..2344b2a2a9f2288e2f7b8044fb1bebb897253a9e 100644
--- a/drivers/uacce/uacce.c
+++ b/drivers/uacce/uacce.c
@@ -42,6 +42,8 @@ static DEFINE_RWLOCK(uacce_qs_lock);
 #define uacce_qs_wunlock() write_unlock_irq(&uacce_qs_lock)
 #endif
 
+#define UACCE_RESET_DELAY_MS        10
+
 static const struct file_operations uacce_fops;
 static int uacce_fops_fasync(int fd, struct file *file, int mode);
 static int uacce_put_queue(struct file *filep);
@@ -95,7 +97,7 @@ void uacce_reset_prepare(struct uacce *uacce)
 	mutex_unlock(&uacce->q_lock);
 
 	/* make sure above single been handled */
-	mdelay(10);
+	mdelay(UACCE_RESET_DELAY_MS);
 }
 EXPORT_SYMBOL_GPL(uacce_reset_prepare);