提交 e9dff0ee 编写于 作者: M Magnus Damm 提交者: Andi Kleen

[PATCH] i386: mark cpu cache functions as __cpuinit

Mark i386-specific cpu cache functions as __cpuinit. They are all
only called from arch/i386/common.c:display_cache_info() that already is
marked as __cpuinit.
Signed-off-by: NMagnus Damm <magnus@valinux.co.jp>
Signed-off-by: NAndi Kleen <ak@suse.de>
上级 5f0f1c16
...@@ -246,7 +246,7 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) ...@@ -246,7 +246,7 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
num_cache_leaves = 3; num_cache_leaves = 3;
} }
static unsigned int amd_size_cache(struct cpuinfo_x86 * c, unsigned int size) static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 * c, unsigned int size)
{ {
/* AMD errata T13 (order #21922) */ /* AMD errata T13 (order #21922) */
if ((c->x86 == 6)) { if ((c->x86 == 6)) {
......
...@@ -442,7 +442,7 @@ static void __cpuinit init_centaur(struct cpuinfo_x86 *c) ...@@ -442,7 +442,7 @@ static void __cpuinit init_centaur(struct cpuinfo_x86 *c)
} }
} }
static unsigned int centaur_size_cache(struct cpuinfo_x86 * c, unsigned int size) static unsigned int __cpuinit centaur_size_cache(struct cpuinfo_x86 * c, unsigned int size)
{ {
/* VIA C3 CPUs (670-68F) need further shifting. */ /* VIA C3 CPUs (670-68F) need further shifting. */
if ((c->x86 == 6) && ((c->x86_model == 7) || (c->x86_model == 8))) if ((c->x86 == 6) && ((c->x86_model == 7) || (c->x86_model == 8)))
......
...@@ -198,7 +198,7 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c) ...@@ -198,7 +198,7 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
} }
static unsigned int intel_size_cache(struct cpuinfo_x86 * c, unsigned int size) static unsigned int __cpuinit intel_size_cache(struct cpuinfo_x86 * c, unsigned int size)
{ {
/* Intel PIII Tualatin. This comes in two flavours. /* Intel PIII Tualatin. This comes in two flavours.
* One has 256kb of cache, the other 512. We have no way * One has 256kb of cache, the other 512. We have no way
......
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