diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index 4ad8f59503dd22b5ae2ef24b801b2b651bcfbb33..ecf722ea5982abc24faee8eef5b1e03230d84f50 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -86,7 +86,7 @@
 		#reset-cells = <1>;
 	};
 
-	pinctrl@20008000 {
+	pinctrl: pinctrl@20008000 {
 		compatible = "rockchip,rk3066a-pinctrl";
 		rockchip,grf = <&grf>;
 		#address-cells = <1>;
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 038d9d45264ce20d4e23bbf62891cd0ce44ab781..7b631ec3102cc3194b2cffdd6250de580ab12c41 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -82,7 +82,7 @@
 		#reset-cells = <1>;
 	};
 
-	pinctrl@20008000 {
+	pinctrl: pinctrl@20008000 {
 		compatible = "rockchip,rk3188-pinctrl";
 		rockchip,grf = <&grf>;
 		rockchip,pmu = <&pmu>;
diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi
index f70addd793a75e0f2892f3a286682798e7af7edb..10e7586c1dc260ffdedd245f28a9772b66ecced6 100644
--- a/arch/arm/boot/dts/rk3xxx.dtsi
+++ b/arch/arm/boot/dts/rk3xxx.dtsi
@@ -57,14 +57,14 @@
 		cache-level = <2>;
 	};
 
-	global-timer@1013c200 {
+	global_timer: global-timer@1013c200 {
 		compatible = "arm,cortex-a9-global-timer";
 		reg = <0x1013c200 0x20>;
 		interrupts = <GIC_PPI 11 0x304>;
 		clocks = <&cru CORE_PERI>;
 	};
 
-	local-timer@1013c600 {
+	local_timer: local-timer@1013c600 {
 		compatible = "arm,cortex-a9-twd-timer";
 		reg = <0x1013c600 0x20>;
 		interrupts = <GIC_PPI 13 0x304>;
@@ -111,7 +111,7 @@
 		status = "disabled";
 	};
 
-	dwmmc@10214000 {
+	mmc0: dwmmc@10214000 {
 		compatible = "rockchip,rk2928-dw-mshc";
 		reg = <0x10214000 0x1000>;
 		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
@@ -124,7 +124,7 @@
 		status = "disabled";
 	};
 
-	dwmmc@10218000 {
+	mmc1: dwmmc@10218000 {
 		compatible = "rockchip,rk2928-dw-mshc";
 		reg = <0x10218000 0x1000>;
 		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;