提交 ce5ea9f3 编写于 作者: D Dave Martin

ARM: l2x0/pl310: Refactor Kconfig to be more maintainable

Making CACHE_L2X0 depend on (huge list of MACH_ and ARCH_ configs)
is bothersome to maintain and likely to lead to merge conflicts.

This patch moves the knowledge of which platforms have a L2x0 or
PL310 cache controller to the individual machines.  To enable this,
a new MIGHT_HAVE_CACHE_L2X0 config option is introduced to allow
machines to indicate that they may have such a cache controller
independently of each other.

Boards/SoCs which cannot reliably operate without the L2 cache
controller support will need to select CACHE_L2X0 directly from
their own Kconfigs instead.  This applies to some TrustZone-enabled
boards where Linux runs in the Normal World, for example.
Signed-off-by: NDave Martin <dave.martin@linaro.org>
Acked-by: NAnton Vorontsov <cbouatmailru@gmail.com>
        (for cns3xxx)
Acked-by: NTony Lindgren <tony@atomide.com>
        (for omap)
Acked-by: NShawn Guo <shawn.guo@linaro.org>
        (for imx)
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
        (for exynos)
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
        (for imx)
Acked-by: NOlof Johansson <olof@lixom.net>
        (for tegra)
上级 caca6a03
...@@ -344,6 +344,7 @@ config ARCH_HIGHBANK ...@@ -344,6 +344,7 @@ config ARCH_HIGHBANK
select CPU_V7 select CPU_V7
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select HAVE_ARM_SCU select HAVE_ARM_SCU
select MIGHT_HAVE_CACHE_L2X0
select USE_OF select USE_OF
help help
Support for the Calxeda Highbank SoC based boards. Support for the Calxeda Highbank SoC based boards.
...@@ -361,6 +362,7 @@ config ARCH_CNS3XXX ...@@ -361,6 +362,7 @@ config ARCH_CNS3XXX
select CPU_V6K select CPU_V6K
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select ARM_GIC select ARM_GIC
select MIGHT_HAVE_CACHE_L2X0
select MIGHT_HAVE_PCI select MIGHT_HAVE_PCI
select PCI_DOMAINS if PCI select PCI_DOMAINS if PCI
help help
...@@ -381,6 +383,7 @@ config ARCH_PRIMA2 ...@@ -381,6 +383,7 @@ config ARCH_PRIMA2
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select CLKDEV_LOOKUP select CLKDEV_LOOKUP
select GENERIC_IRQ_CHIP select GENERIC_IRQ_CHIP
select MIGHT_HAVE_CACHE_L2X0
select USE_OF select USE_OF
select ZONE_DMA select ZONE_DMA
help help
...@@ -633,6 +636,7 @@ config ARCH_TEGRA ...@@ -633,6 +636,7 @@ config ARCH_TEGRA
select GENERIC_GPIO select GENERIC_GPIO
select HAVE_CLK select HAVE_CLK
select HAVE_SCHED_CLOCK select HAVE_SCHED_CLOCK
select MIGHT_HAVE_CACHE_L2X0
select ARCH_HAS_CPUFREQ select ARCH_HAS_CPUFREQ
help help
This enables support for NVIDIA Tegra based systems (Tegra APX, This enables support for NVIDIA Tegra based systems (Tegra APX,
...@@ -703,6 +707,7 @@ config ARCH_SHMOBILE ...@@ -703,6 +707,7 @@ config ARCH_SHMOBILE
select CLKDEV_LOOKUP select CLKDEV_LOOKUP
select HAVE_MACH_CLKDEV select HAVE_MACH_CLKDEV
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select MIGHT_HAVE_CACHE_L2X0
select NO_IOPORT select NO_IOPORT
select SPARSE_IRQ select SPARSE_IRQ
select MULTI_IRQ_HANDLER select MULTI_IRQ_HANDLER
...@@ -904,6 +909,7 @@ config ARCH_U8500 ...@@ -904,6 +909,7 @@ config ARCH_U8500
select CLKDEV_LOOKUP select CLKDEV_LOOKUP
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select ARCH_HAS_CPUFREQ select ARCH_HAS_CPUFREQ
select MIGHT_HAVE_CACHE_L2X0
help help
Support for ST-Ericsson's Ux500 architecture Support for ST-Ericsson's Ux500 architecture
...@@ -914,6 +920,7 @@ config ARCH_NOMADIK ...@@ -914,6 +920,7 @@ config ARCH_NOMADIK
select CPU_ARM926T select CPU_ARM926T
select CLKDEV_LOOKUP select CLKDEV_LOOKUP
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select MIGHT_HAVE_CACHE_L2X0
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
help help
Support for the Nomadik platform by ST-Ericsson Support for the Nomadik platform by ST-Ericsson
...@@ -973,6 +980,7 @@ config ARCH_ZYNQ ...@@ -973,6 +980,7 @@ config ARCH_ZYNQ
select ARM_GIC select ARM_GIC
select ARM_AMBA select ARM_AMBA
select ICST select ICST
select MIGHT_HAVE_CACHE_L2X0
select USE_OF select USE_OF
help help
Support for Xilinx Zynq ARM Cortex A9 Platform Support for Xilinx Zynq ARM Cortex A9 Platform
......
...@@ -17,6 +17,7 @@ choice ...@@ -17,6 +17,7 @@ choice
config ARCH_EXYNOS4 config ARCH_EXYNOS4
bool "SAMSUNG EXYNOS4" bool "SAMSUNG EXYNOS4"
select MIGHT_HAVE_CACHE_L2X0
help help
Samsung EXYNOS4 SoCs based systems Samsung EXYNOS4 SoCs based systems
......
...@@ -44,6 +44,7 @@ config ARCH_OMAP4 ...@@ -44,6 +44,7 @@ config ARCH_OMAP4
select CPU_V7 select CPU_V7
select ARM_GIC select ARM_GIC
select LOCAL_TIMERS if SMP select LOCAL_TIMERS if SMP
select MIGHT_HAVE_CACHE_L2X0
select PL310_ERRATA_588369 select PL310_ERRATA_588369
select PL310_ERRATA_727915 select PL310_ERRATA_727915
select ARM_ERRATA_720789 select ARM_ERRATA_720789
......
...@@ -12,6 +12,7 @@ config REALVIEW_EB_A9MP ...@@ -12,6 +12,7 @@ config REALVIEW_EB_A9MP
bool "Support Multicore Cortex-A9 Tile" bool "Support Multicore Cortex-A9 Tile"
depends on MACH_REALVIEW_EB depends on MACH_REALVIEW_EB
select CPU_V7 select CPU_V7
select MIGHT_HAVE_CACHE_L2X0
help help
Enable support for the Cortex-A9MPCore tile fitted to the Enable support for the Cortex-A9MPCore tile fitted to the
Realview(R) Emulation Baseboard platform. Realview(R) Emulation Baseboard platform.
...@@ -21,6 +22,7 @@ config REALVIEW_EB_ARM11MP ...@@ -21,6 +22,7 @@ config REALVIEW_EB_ARM11MP
depends on MACH_REALVIEW_EB depends on MACH_REALVIEW_EB
select CPU_V6K select CPU_V6K
select ARCH_HAS_BARRIERS if SMP select ARCH_HAS_BARRIERS if SMP
select MIGHT_HAVE_CACHE_L2X0
help help
Enable support for the ARM11MPCore tile fitted to the Realview(R) Enable support for the ARM11MPCore tile fitted to the Realview(R)
Emulation Baseboard platform. Emulation Baseboard platform.
...@@ -39,6 +41,7 @@ config MACH_REALVIEW_PB11MP ...@@ -39,6 +41,7 @@ config MACH_REALVIEW_PB11MP
select CPU_V6K select CPU_V6K
select ARM_GIC select ARM_GIC
select HAVE_PATA_PLATFORM select HAVE_PATA_PLATFORM
select MIGHT_HAVE_CACHE_L2X0
select ARCH_HAS_BARRIERS if SMP select ARCH_HAS_BARRIERS if SMP
help help
Include support for the ARM(R) RealView(R) Platform Baseboard for Include support for the ARM(R) RealView(R) Platform Baseboard for
...@@ -51,6 +54,7 @@ config MACH_REALVIEW_PB1176 ...@@ -51,6 +54,7 @@ config MACH_REALVIEW_PB1176
select CPU_V6 select CPU_V6
select ARM_GIC select ARM_GIC
select HAVE_TCM select HAVE_TCM
select MIGHT_HAVE_CACHE_L2X0
help help
Include support for the ARM(R) RealView(R) Platform Baseboard for Include support for the ARM(R) RealView(R) Platform Baseboard for
ARM1176JZF-S. ARM1176JZF-S.
...@@ -78,6 +82,7 @@ config MACH_REALVIEW_PBX ...@@ -78,6 +82,7 @@ config MACH_REALVIEW_PBX
bool "Support RealView(R) Platform Baseboard Explore" bool "Support RealView(R) Platform Baseboard Explore"
select ARM_GIC select ARM_GIC
select HAVE_PATA_PLATFORM select HAVE_PATA_PLATFORM
select MIGHT_HAVE_CACHE_L2X0
select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET
select ZONE_DMA if SPARSEMEM select ZONE_DMA if SPARSEMEM
help help
......
...@@ -8,5 +8,6 @@ config ARCH_VEXPRESS_CA9X4 ...@@ -8,5 +8,6 @@ config ARCH_VEXPRESS_CA9X4
select ARM_ERRATA_720789 select ARM_ERRATA_720789
select ARM_ERRATA_751472 select ARM_ERRATA_751472
select ARM_ERRATA_753970 select ARM_ERRATA_753970
select MIGHT_HAVE_CACHE_L2X0
endmenu endmenu
...@@ -816,14 +816,23 @@ config CACHE_FEROCEON_L2_WRITETHROUGH ...@@ -816,14 +816,23 @@ config CACHE_FEROCEON_L2_WRITETHROUGH
Say Y here to use the Feroceon L2 cache in writethrough mode. Say Y here to use the Feroceon L2 cache in writethrough mode.
Unless you specifically require this, say N for writeback mode. Unless you specifically require this, say N for writeback mode.
config MIGHT_HAVE_CACHE_L2X0
bool
help
This option should be selected by machines which have a L2x0
or PL310 cache controller, but where its use is optional.
The only effect of this option is to make CACHE_L2X0 and
related options available to the user for configuration.
Boards or SoCs which always require the cache controller
support to be present should select CACHE_L2X0 directly
instead of this option, thus preventing the user from
inadvertently configuring a broken kernel.
config CACHE_L2X0 config CACHE_L2X0
bool "Enable the L2x0 outer cache controller" bool "Enable the L2x0 outer cache controller" if MIGHT_HAVE_CACHE_L2X0
depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \ default MIGHT_HAVE_CACHE_L2X0
REALVIEW_EB_A9MP || ARCH_IMX_V6_V7 || MACH_REALVIEW_PBX || \
ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \
ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || \
ARCH_PRIMA2 || ARCH_ZYNQ || ARCH_CNS3XXX || ARCH_HIGHBANK
default y
select OUTER_CACHE select OUTER_CACHE
select OUTER_CACHE_SYNC select OUTER_CACHE_SYNC
help help
......
...@@ -20,6 +20,7 @@ config ARCH_IMX_V6_V7 ...@@ -20,6 +20,7 @@ config ARCH_IMX_V6_V7
bool "i.MX3, i.MX6" bool "i.MX3, i.MX6"
select AUTO_ZRELADDR if !ZBOOT_ROM select AUTO_ZRELADDR if !ZBOOT_ROM
select ARM_PATCH_PHYS_VIRT select ARM_PATCH_PHYS_VIRT
select MIGHT_HAVE_CACHE_L2X0
help help
This enables support for systems based on the Freescale i.MX3 and i.MX6 This enables support for systems based on the Freescale i.MX3 and i.MX6
family. family.
......
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