ASoC: cs42l73: If Internal MCLK is >= 6.4MHz, then set SCLK to 64*Fs.
Signed-off-by: NPaul Handrigan <Paul.Handrigan@cirrus.com> Acked-by: NBrian Austin <brian.austin@cirrus.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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