提交 c40820d5 编写于 作者: J Joe Handzik 提交者: James Bottomley

hpsa: add more ioaccel2 error handling, including underrun statuses.

improve ioaccel2 error handling, including better handling of
underrun statuses
Reviewed-by: NScott Teel <scott.teel@pmcs.com>
Reviewed-by: NKevin Barnett <kevin.barnett@pmcs.com>
Signed-off-by: NJoe Handzik <joseph.t.handzik@hp.com>
Signed-off-by: NDon Brace <don.brace@pmcs.com>
Reviewed-by: NChristoph Hellwig <hch@lst.de>
Signed-off-by: NJames Bottomley <JBottomley@Odin.com>
上级 d9a729f3
......@@ -1863,6 +1863,7 @@ static int handle_ioaccel_mode2_error(struct ctlr_info *h,
{
int data_len;
int retry = 0;
u32 ioaccel2_resid = 0;
switch (c2->error_data.serv_response) {
case IOACCEL2_SERV_RESPONSE_COMPLETE:
......@@ -1921,11 +1922,31 @@ static int handle_ioaccel_mode2_error(struct ctlr_info *h,
}
break;
case IOACCEL2_SERV_RESPONSE_FAILURE:
/* don't expect to get here. */
switch (c2->error_data.status) {
case IOACCEL2_STATUS_SR_IO_ERROR:
case IOACCEL2_STATUS_SR_IO_ABORTED:
case IOACCEL2_STATUS_SR_OVERRUN:
retry = 1;
break;
case IOACCEL2_STATUS_SR_UNDERRUN:
cmd->result = (DID_OK << 16); /* host byte */
cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
ioaccel2_resid = get_unaligned_le32(
&c2->error_data.resid_cnt[0]);
scsi_set_resid(cmd, ioaccel2_resid);
break;
case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
case IOACCEL2_STATUS_SR_INVALID_DEVICE:
case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
/* We will get an event from ctlr to trigger rescan */
retry = 1;
break;
default:
retry = 1;
dev_warn(&h->pdev->dev,
"unexpected delivery or target failure, status = 0x%02x\n",
c2->error_data.status);
retry = 1;
}
break;
case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
break;
......
......@@ -532,6 +532,12 @@ struct io_accel2_scsi_response {
#define IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL 0x28
#define IOACCEL2_STATUS_SR_TASK_COMP_ABORTED 0x40
#define IOACCEL2_STATUS_SR_IOACCEL_DISABLED 0x0E
#define IOACCEL2_STATUS_SR_IO_ERROR 0x01
#define IOACCEL2_STATUS_SR_IO_ABORTED 0x02
#define IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE 0x03
#define IOACCEL2_STATUS_SR_INVALID_DEVICE 0x04
#define IOACCEL2_STATUS_SR_UNDERRUN 0x51
#define IOACCEL2_STATUS_SR_OVERRUN 0x75
u8 data_present; /* low 2 bits */
#define IOACCEL2_NO_DATAPRESENT 0x000
#define IOACCEL2_RESPONSE_DATAPRESENT 0x001
......
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