ARM: dts: rockchip: remove soc subnodes

Comments received from the rk3288 submission indicated that a generic subnode
to group soc components should not be used.

So to keep all rockchip devicetree files similar, remove it from rk3066 and rk3188.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>

arch/arm/boot/dts/rk3066a-bqcurie2.dts

@@ -24,7 +24,6 @@
 		reg = <0x60000000 0x40000000>;
 	};
 
-	soc {
 	uart0: serial@10124000 {
 		status = "okay";
 	};
@@ -106,5 +105,4 @@
 		};
 		/* VOL+ comes somehow thru the ADC */
 	};
-	};
 };

arch/arm/boot/dts/rk3066a.dtsi

@@ -40,7 +40,6 @@
 		};
 	};
 
-	soc {
 	timer@20038000 {
 		compatible = "snps,dw-apb-timer-osc";
 		reg = <0x20038000 0x100>;
@@ -291,5 +290,4 @@
 			};
 		};
 	};
-	};
 };

arch/arm/boot/dts/rk3188-radxarock.dts

@@ -23,7 +23,6 @@
 		reg = <0x60000000 0x80000000>;
 	};
 
-	soc {
 	uart0: serial@10124000 {
 		status = "okay";
 	};
@@ -76,6 +75,4 @@
 			default-state = "off";
 		};
 	};
-
-	};
 };

arch/arm/boot/dts/rk3188.dtsi

@@ -52,7 +52,6 @@
 		};
 	};
 
-	soc {
 	global-timer@1013c200 {
 		interrupts = <GIC_PPI 11 0xf04>;
 	};
@@ -271,5 +270,4 @@
 			};
 		};
 	};
-	};
 };

arch/arm/boot/dts/rk3xxx.dtsi

@@ -27,12 +27,6 @@
 		clock-output-names = "xin24m";
 	};
 
-	soc {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "simple-bus";
-		ranges;
-
 	scu@1013c000 {
 		compatible = "arm,cortex-a9-scu";
 		reg = <0x1013c000 0x100>;
@@ -142,5 +136,4 @@
 
 		status = "disabled";
 	};
-	};
 };