diff --git a/arch/x86_64/kernel/setup.c b/arch/x86_64/kernel/setup.c index a191d48317895947bdf30aca41f135a4e7dbf7f9..b06221e31952ac310109e14d6edaf77630d60708 100644 --- a/arch/x86_64/kernel/setup.c +++ b/arch/x86_64/kernel/setup.c @@ -855,6 +855,8 @@ static void __init init_intel(struct cpuinfo_x86 *c) if (c->x86 == 15) c->x86_cache_alignment = c->x86_clflush_size * 2; + if (c->x86 >= 15) + set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability); } void __init get_cpu_vendor(struct cpuinfo_x86 *c) @@ -1055,7 +1057,8 @@ static int show_cpuinfo(struct seq_file *m, void *v) NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, /* Other (Linux-defined) */ - "cxmmx", "k6_mtrr", "cyrix_arr", "centaur_mcr", NULL, NULL, NULL, NULL, + "cxmmx", NULL, "cyrix_arr", "centaur_mcr", "k8c+", + "constant_tsc", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, diff --git a/arch/x86_64/kernel/time.c b/arch/x86_64/kernel/time.c index 3bafe438fa750025989983f6b2757e18d7776346..c7a1b50b4af34b5d919a82711f3354ed67137508 100644 --- a/arch/x86_64/kernel/time.c +++ b/arch/x86_64/kernel/time.c @@ -614,6 +614,9 @@ static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val, struct cpufreq_freqs *freq = data; unsigned long *lpj, dummy; + if (cpu_has(&cpu_data[freq->cpu], X86_FEATURE_CONSTANT_TSC)) + return 0; + lpj = &dummy; if (!(freq->flags & CPUFREQ_CONST_LOOPS)) #ifdef CONFIG_SMP @@ -622,8 +625,6 @@ static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val, lpj = &boot_cpu_data.loops_per_jiffy; #endif - - if (!ref_freq) { ref_freq = freq->old; loops_per_jiffy_ref = *lpj; diff --git a/include/asm-x86_64/cpufeature.h b/include/asm-x86_64/cpufeature.h index 0e47a6d53726e9850bfa7e8450ee9d4e129dab3c..e68ad97a6319d3576bf16d4456957b44a6be0a23 100644 --- a/include/asm-x86_64/cpufeature.h +++ b/include/asm-x86_64/cpufeature.h @@ -62,6 +62,7 @@ #define X86_FEATURE_CYRIX_ARR (3*32+ 2) /* Cyrix ARRs (= MTRRs) */ #define X86_FEATURE_CENTAUR_MCR (3*32+ 3) /* Centaur MCRs (= MTRRs) */ #define X86_FEATURE_K8_C (3*32+ 4) /* C stepping K8 */ +#define X86_FEATURE_CONSTANT_TSC (3*32+5) /* TSC runs at constant rate */ /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ #define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */