diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c index fb71859c04a613149b5f54bbdb66311e589c2342..b8bd6ed22b84ad15aefd6931b8dca161e2742d17 100644 --- a/drivers/crypto/hisilicon/qm.c +++ b/drivers/crypto/hisilicon/qm.c @@ -1590,8 +1590,6 @@ static long hisi_qm_uacce_ioctl(struct uacce_queue *q, unsigned int cmd, * available */ static struct uacce_ops uacce_qm_ops = { - .owner = THIS_MODULE, - .flags = 0, .get_available_instances = hisi_qm_get_available_instances, .get_queue = hisi_qm_uacce_get_queue, .put_queue = hisi_qm_uacce_put_queue, @@ -1616,9 +1614,9 @@ static int qm_register_uacce(struct hisi_qm *qm) uacce->algs = qm->algs; if (qm->ver == QM_HW_V1) - uacce->ops->api_ver = HISI_QM_API_VER_BASE; + uacce->api_ver = HISI_QM_API_VER_BASE; else - uacce->ops->api_ver = HISI_QM_API_VER2_BASE; + uacce->api_ver = HISI_QM_API_VER2_BASE; if (qm->use_dma_api) { /* @@ -1627,23 +1625,22 @@ static int qm_register_uacce(struct hisi_qm *qm) * by ourself with the UACCE_DEV_DRVMAP_DUS flag. */ if (qm->use_sva) { - uacce->ops->flags = UACCE_DEV_SVA | - UACCE_DEV_DRVMAP_DUS; + uacce->flags = UACCE_DEV_SVA | UACCE_DEV_DRVMAP_DUS; } else { - uacce->ops->flags = UACCE_DEV_NOIOMMU | - UACCE_DEV_DRVMAP_DUS; + uacce->flags = UACCE_DEV_NOIOMMU | + UACCE_DEV_DRVMAP_DUS; if (qm->ver == QM_HW_V1) - uacce->ops->api_ver = HISI_QM_API_VER_BASE - UACCE_API_VER_NOIOMMU_SUBFIX; + uacce->api_ver = HISI_QM_API_VER_BASE + UACCE_API_VER_NOIOMMU_SUBFIX; else - uacce->ops->api_ver = HISI_QM_API_VER2_BASE - UACCE_API_VER_NOIOMMU_SUBFIX; + uacce->api_ver = HISI_QM_API_VER2_BASE + UACCE_API_VER_NOIOMMU_SUBFIX; } } for (i = 0; i < UACCE_QFRT_MAX; i++) - uacce->ops->qf_pg_start[i] = UACCE_QFR_NA; + uacce->qf_pg_start[i] = UACCE_QFR_NA; return uacce_register(uacce); @@ -1969,10 +1966,9 @@ static int __hisi_qm_start(struct hisi_qm *qm) #ifdef CONFIG_CRYPTO_QM_UACCE /* check if the size exceed the DKO boundary */ if (qm->use_uacce && !qm->use_dma_api) { - WARN_ON(qm->uacce.ops->qf_pg_start[UACCE_QFRT_DKO] == - UACCE_QFR_NA); - dko_size = qm->uacce.ops->qf_pg_start[UACCE_QFRT_DUS] - - qm->uacce.ops->qf_pg_start[UACCE_QFRT_DKO]; + WARN_ON(qm->uacce.qf_pg_start[UACCE_QFRT_DKO] == UACCE_QFR_NA); + dko_size = qm->uacce.qf_pg_start[UACCE_QFRT_DUS] - + qm->uacce.qf_pg_start[UACCE_QFRT_DKO]; dko_size <<= PAGE_SHIFT; dev_dbg(&qm->pdev->dev, "kernel-only buffer used (0x%lx/0x%lx)\n", off, @@ -2010,7 +2006,7 @@ int hisi_qm_start(struct hisi_qm *qm) struct device *dev = &qm->pdev->dev; #ifdef CONFIG_CRYPTO_QM_UACCE - struct uacce_ops *ops = qm->uacce.ops; + struct uacce *uacce = &qm->uacce; unsigned long dus_page_nr = 0; unsigned long dko_page_nr = 0; unsigned long mmio_page_nr; @@ -2043,17 +2039,19 @@ int hisi_qm_start(struct hisi_qm *qm) else mmio_page_nr = QM_DOORBELL_PAGE_NR; if (qm->use_uacce && qm->use_dma_api) { - ops->qf_pg_start[UACCE_QFRT_MMIO] = 0; - ops->qf_pg_start[UACCE_QFRT_DKO] = UACCE_QFR_NA; - ops->qf_pg_start[UACCE_QFRT_DUS] = mmio_page_nr; - ops->qf_pg_start[UACCE_QFRT_SS] = mmio_page_nr + dus_page_nr; + uacce->qf_pg_start[UACCE_QFRT_MMIO] = 0; + uacce->qf_pg_start[UACCE_QFRT_DKO] = UACCE_QFR_NA; + uacce->qf_pg_start[UACCE_QFRT_DUS] = mmio_page_nr; + uacce->qf_pg_start[UACCE_QFRT_SS] = mmio_page_nr + + dus_page_nr; } else if (qm->use_uacce) { - ops->qf_pg_start[UACCE_QFRT_MMIO] = 0; - ops->qf_pg_start[UACCE_QFRT_DKO] = mmio_page_nr; - ops->qf_pg_start[UACCE_QFRT_DUS] = mmio_page_nr + dko_page_nr; - ops->qf_pg_start[UACCE_QFRT_SS] = mmio_page_nr + - dko_page_nr + - dus_page_nr; + uacce->qf_pg_start[UACCE_QFRT_MMIO] = 0; + uacce->qf_pg_start[UACCE_QFRT_DKO] = mmio_page_nr; + uacce->qf_pg_start[UACCE_QFRT_DUS] = mmio_page_nr + + dko_page_nr; + uacce->qf_pg_start[UACCE_QFRT_SS] = mmio_page_nr + + dko_page_nr + + dus_page_nr; } #endif diff --git a/drivers/uacce/Kconfig b/drivers/uacce/Kconfig index 8c4a381962cdbdf389ed36cc38a3bb3600c5419d..5eddca7966af22407d674d84a39186563f354a61 100644 --- a/drivers/uacce/Kconfig +++ b/drivers/uacce/Kconfig @@ -12,6 +12,7 @@ menuconfig UACCE config WD_DUMMY_DEV tristate "Support for WrapDrive Dummy Device" + depends on ARM64 depends on UACCE help Support for WarpDrive test driver with devices (NOT for upstream). diff --git a/drivers/uacce/dummy_drv/dummy_wd_dev.c b/drivers/uacce/dummy_drv/dummy_wd_dev.c index 5a89d7c44faeab7113b133c31211fdd91101a018..237accdd8846b0939a75c08f9879d2e16048545c 100644 --- a/drivers/uacce/dummy_drv/dummy_wd_dev.c +++ b/drivers/uacce/dummy_drv/dummy_wd_dev.c @@ -280,11 +280,6 @@ static int dummy_get_available_instances(struct uacce *uacce) } static struct uacce_ops dummy_ops = { - .owner = THIS_MODULE, - .api_ver = "dummy_v1", - .qf_pg_start = { 0, UACCE_QFR_NA, UACCE_QFR_NA, 1 }, - .flags = UACCE_DEV_NOIOMMU, - .get_queue = dummy_get_queue, .put_queue = dummy_put_queue, .start_queue = dummy_start_queue, diff --git a/drivers/uacce/dummy_drv/dummy_wd_v2.c b/drivers/uacce/dummy_drv/dummy_wd_v2.c index d624b030b60f76fe7e9005df3db45ff43893a35d..177f46e332fdc0169d5f97e8686e3b6f2a373995 100644 --- a/drivers/uacce/dummy_drv/dummy_wd_v2.c +++ b/drivers/uacce/dummy_drv/dummy_wd_v2.c @@ -337,11 +337,6 @@ static int dummy_wd2_get_available_instances(struct uacce *uacce) } static struct uacce_ops dummy_wd2_ops = { - .owner = THIS_MODULE, - .api_ver = "dummy_v2", - .qf_pg_start = {0, UACCE_QFR_NA, 1, 2}, - .flags = 0, - .get_queue = dummy_wd2_get_queue, .put_queue = dummy_wd2_put_queue, .start_queue = dummy_wd2_start_queue, diff --git a/drivers/uacce/uacce.c b/drivers/uacce/uacce.c index 15585b460131377132b82862eb12b42b1d96b1c8..582ec65e159f7df4f59a58331871313efeb0c71e 100644 --- a/drivers/uacce/uacce.c +++ b/drivers/uacce/uacce.c @@ -427,7 +427,7 @@ static long uacce_cmd_share_qfr(struct uacce_queue *tgt, int fd) goto out_with_fd; /* no ssva is needed if the dev can do fault-from-dev */ - if (tgt->uacce->ops->flags & UACCE_DEV_FAULT_FROM_DEV) + if (tgt->uacce->flags & UACCE_DEV_FAULT_FROM_DEV) goto out_with_fd; dev_dbg(&src->uacce->dev, "share ss with %s\n", @@ -506,7 +506,7 @@ static long uacce_get_ss_dma(struct uacce_queue *q, void __user *arg) long ret = 0; unsigned long dma = 0; - if (!(uacce->ops->flags & UACCE_DEV_NOIOMMU)) + if (!(uacce->flags & UACCE_DEV_NOIOMMU)) return -EINVAL; uacce_qs_wlock(); @@ -559,7 +559,7 @@ uacce_fops_compat_ioctl(struct file *filep, unsigned int cmd, unsigned long arg) static int uacce_dev_open_check(struct uacce *uacce) { - if (uacce->ops->flags & UACCE_DEV_NOIOMMU) + if (uacce->flags & UACCE_DEV_NOIOMMU) return 0; /* @@ -567,7 +567,7 @@ static int uacce_dev_open_check(struct uacce *uacce) * table. The better way to check this is counting it per iommu_domain, * this is just a temporary solution */ - if (uacce->ops->flags & (UACCE_DEV_PASID | UACCE_DEV_NOIOMMU)) + if (uacce->flags & (UACCE_DEV_PASID | UACCE_DEV_NOIOMMU)) return 0; if (atomic_cmpxchg(&uacce->state, UACCE_ST_INIT, UACCE_ST_OPENNED) != @@ -614,7 +614,7 @@ static int uacce_queue_drain(struct uacce_queue *q) uacce_destroy_region(q, qfr); } #ifdef CONFIG_IOMMU_SVA - if (uacce->ops->flags & UACCE_DEV_SVA) + if (uacce->flags & UACCE_DEV_SVA) iommu_sva_unbind_device(uacce->pdev, q->pasid); #endif if (uacce->ops->put_queue) @@ -674,7 +674,7 @@ static int uacce_fops_open(struct inode *inode, struct file *filep) if (ret) goto open_err; #ifdef CONFIG_IOMMU_SVA - if (uacce->ops->flags & UACCE_DEV_PASID) { + if (uacce->flags & UACCE_DEV_PASID) { ret = iommu_sva_bind_device(uacce->pdev, current->mm, &pasid, IOMMU_SVA_FEAT_IOPF, NULL); if (ret) @@ -730,7 +730,7 @@ uacce_get_region_type(struct uacce *uacce, struct vm_area_struct *vma) size_t next_start = UACCE_QFR_NA; for (i = UACCE_QFRT_MAX - 1; i >= 0; i--) { - if (vma->vm_pgoff >= uacce->ops->qf_pg_start[i]) { + if (vma->vm_pgoff >= uacce->qf_pg_start[i]) { type = i; break; } @@ -745,8 +745,8 @@ uacce_get_region_type(struct uacce *uacce, struct vm_area_struct *vma) break; case UACCE_QFRT_DKO: - if ((uacce->ops->flags & UACCE_DEV_PASID) || - (uacce->ops->flags & UACCE_DEV_NOIOMMU)) + if ((uacce->flags & UACCE_DEV_PASID) || + (uacce->flags & UACCE_DEV_NOIOMMU)) return UACCE_QFRT_INVALID; break; @@ -755,7 +755,7 @@ uacce_get_region_type(struct uacce *uacce, struct vm_area_struct *vma) case UACCE_QFRT_SS: /* todo: this can be valid to protect the process space */ - if (uacce->ops->flags & UACCE_DEV_FAULT_FROM_DEV) + if (uacce->flags & UACCE_DEV_FAULT_FROM_DEV) return UACCE_QFRT_INVALID; break; @@ -767,8 +767,8 @@ uacce_get_region_type(struct uacce *uacce, struct vm_area_struct *vma) /* make sure the mapping size is exactly the same as the region */ if (type < UACCE_QFRT_SS) { for (i = type + 1; i < UACCE_QFRT_MAX; i++) - if (uacce->ops->qf_pg_start[i] != UACCE_QFR_NA) { - next_start = uacce->ops->qf_pg_start[i]; + if (uacce->qf_pg_start[i] != UACCE_QFR_NA) { + next_start = uacce->qf_pg_start[i]; break; } @@ -779,12 +779,12 @@ uacce_get_region_type(struct uacce *uacce, struct vm_area_struct *vma) } if (vma_pages(vma) != - next_start - uacce->ops->qf_pg_start[type]) { + next_start - uacce->qf_pg_start[type]) { dev_err(&uacce->dev, "invalid mmap size " "(%ld vs %ld pages) for region %s.\n", vma_pages(vma), - next_start - uacce->ops->qf_pg_start[type], + next_start - uacce->qf_pg_start[type], qfrt_str[type]); return UACCE_QFRT_INVALID; } @@ -830,27 +830,27 @@ static int uacce_fops_mmap(struct file *filep, struct vm_area_struct *vma) flags = UACCE_QFRF_MAP | UACCE_QFRF_MMAP; - if (uacce->ops->flags & UACCE_DEV_NOIOMMU) + if (uacce->flags & UACCE_DEV_NOIOMMU) flags |= UACCE_QFRF_DMA; break; case UACCE_QFRT_DKO: flags = UACCE_QFRF_MAP | UACCE_QFRF_KMAP; - if (uacce->ops->flags & UACCE_DEV_NOIOMMU) + if (uacce->flags & UACCE_DEV_NOIOMMU) flags |= UACCE_QFRF_DMA; break; case UACCE_QFRT_DUS: - if (q->uacce->ops->flags & UACCE_DEV_DRVMAP_DUS) { + if (q->uacce->flags & UACCE_DEV_DRVMAP_DUS) { flags = UACCE_QFRF_SELFMT; break; } flags = UACCE_QFRF_MAP | UACCE_QFRF_MMAP; - if (q->uacce->ops->flags & UACCE_DEV_KMAP_DUS) + if (q->uacce->flags & UACCE_DEV_KMAP_DUS) flags |= UACCE_QFRF_KMAP; - if (q->uacce->ops->flags & UACCE_DEV_NOIOMMU) + if (q->uacce->flags & UACCE_DEV_NOIOMMU) flags |= UACCE_QFRF_DMA; break; @@ -930,7 +930,7 @@ uacce_dev_show_api(struct device *dev, struct device_attribute *attr, char *buf) { struct uacce *uacce = UACCE_FROM_CDEV_ATTR(dev); - return sprintf(buf, "%s\n", uacce->ops->api_ver); + return sprintf(buf, "%s\n", uacce->api_ver); } static DEVICE_ATTR(api, S_IRUGO, uacce_dev_show_api, NULL); @@ -971,7 +971,7 @@ uacce_dev_show_flags(struct device *dev, { struct uacce *uacce = UACCE_FROM_CDEV_ATTR(dev); - return sprintf(buf, "%d\n", uacce->ops->flags); + return sprintf(buf, "%d\n", uacce->flags); } static DEVICE_ATTR(flags, S_IRUGO, uacce_dev_show_flags, NULL); @@ -1008,7 +1008,7 @@ static ssize_t uacce_dev_show_qfrs_offset(struct device *dev, unsigned long offset; for (i = 0, ret = 0; i < UACCE_QFRT_MAX; i++) { - offset = uacce->ops->qf_pg_start[i]; + offset = uacce->qf_pg_start[i]; if (offset != UACCE_QFR_NA) offset = offset << PAGE_SHIFT; if (i == UACCE_QFRT_SS) @@ -1053,7 +1053,7 @@ static int uacce_create_chrdev(struct uacce *uacce) cdev_init(&uacce->cdev, &uacce_fops); uacce->dev_id = ret; - uacce->cdev.owner = uacce->ops->owner; + uacce->cdev.owner = THIS_MODULE; device_initialize(&uacce->dev); uacce->dev.devt = MKDEV(MAJOR(uacce_devt), uacce->dev_id); uacce->dev.class = uacce_class; @@ -1141,7 +1141,7 @@ static int uacce_set_iommu_domain(struct uacce *uacce) phys_addr_t resv_msi_base = 0; int ret; - if (uacce->ops->flags & UACCE_DEV_NOIOMMU) + if (uacce->flags & UACCE_DEV_NOIOMMU) return 0; /* @@ -1213,7 +1213,7 @@ static void uacce_unset_iommu_domain(struct uacce *uacce) struct iommu_domain *domain; struct device *dev = uacce->pdev; - if (uacce->ops->flags & UACCE_DEV_NOIOMMU) + if (uacce->flags & UACCE_DEV_NOIOMMU) return; domain = iommu_get_domain_for_dev(dev); @@ -1240,7 +1240,7 @@ int uacce_register(struct uacce *uacce) return -ENODEV; } - if (uacce->ops->flags & UACCE_DEV_NOIOMMU) { + if (uacce->flags & UACCE_DEV_NOIOMMU) { add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); dev_warn(dev, "register to noiommu mode, " "this may export kernel data to user space and " @@ -1248,8 +1248,8 @@ int uacce_register(struct uacce *uacce) } /* if dev support fault-from-dev, it should support pasid */ - if ((uacce->ops->flags & UACCE_DEV_FAULT_FROM_DEV) && - !(uacce->ops->flags & UACCE_DEV_PASID)) { + if ((uacce->flags & UACCE_DEV_FAULT_FROM_DEV) && + !(uacce->flags & UACCE_DEV_PASID)) { dev_warn(dev, "SVM/SAV device should support PASID\n"); return -EINVAL; } @@ -1275,7 +1275,7 @@ int uacce_register(struct uacce *uacce) goto err_with_lock; } - if (uacce->ops->flags & UACCE_DEV_PASID) { + if (uacce->flags & UACCE_DEV_PASID) { #ifdef CONFIG_IOMMU_SVA ret = iommu_sva_init_device(uacce->pdev, IOMMU_SVA_FEAT_IOPF, 0, 0, NULL); @@ -1285,7 +1285,7 @@ int uacce_register(struct uacce *uacce) goto err_with_lock; } #else - uacce->ops->flags &= + uacce->flags &= ~(UACCE_DEV_FAULT_FROM_DEV | UACCE_DEV_PASID); #endif } diff --git a/include/linux/uacce.h b/include/linux/uacce.h index b1d50f6530c4e1d76ccdc91ae141e986027dd7cb..7c4fb78d1461d9b38500e383c7ec0b18e2081798 100644 --- a/include/linux/uacce.h +++ b/include/linux/uacce.h @@ -44,11 +44,6 @@ struct uacce_qfile_region { * @ioctl: ioctl for user space users of the queue */ struct uacce_ops { - struct module *owner; - const char *api_ver; - int flags; - unsigned long qf_pg_start[UACCE_QFRT_MAX]; - int (*get_available_instances)(struct uacce *uacce); int (*get_queue)(struct uacce *uacce, unsigned long arg, struct uacce_queue **q); @@ -91,6 +86,9 @@ struct uacce { const char *name; const char *drv_name; const char *algs; + const char *api_ver; + int flags; + unsigned long qf_pg_start[UACCE_QFRT_MAX]; int status; struct uacce_ops *ops; struct device *pdev;