net: hns3: add handling of two bits in mac tunnel interrupts

driver inclusion
category: bugfix
bugzilla: NA
CVE: NA

LINK_UP and LINK_DOWN are two bits of mac tunnel interrupts, but previous hns3
driver didn't handle them. If ther were enabled, value of these two registers
will changed during link down and link up, which will cause hns3 driver keep
receiving irq but can't handle them.
This patch add handling of these two bits, we will clear and record them as
what we do to other mac tunnel interrupts.

Feature or Bugfix: Bugfix
Signed-off-by: Nliweihang <liweihang@huawei.com>
Reviewed-by: Nlipeng <lipeng321@huawei.com>
Reviewed-by: NYang Yingliang <yangyingliang@huawei.com>
Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c

@@ -1074,7 +1074,7 @@ static void hclge_dbg_dump_mac_tnl_status(struct hclge_dev *hdev)
 
 	while (kfifo_get(&hdev->mac_tnl_log, &stats)) {
 		rem_nsec = do_div(stats.time, HCLGE_BILLION_NANO_SECONDS);
-		dev_info(&hdev->pdev->dev, "[%07lu.%03lu]status = 0x%x\n",
+		dev_info(&hdev->pdev->dev, "[%07lu.%03lu] status = 0x%x\n",
 			 (unsigned long)stats.time, rem_nsec / 1000,
 			 stats.status);
 	}

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c

@@ -662,16 +662,6 @@ int hclge_clear_error(struct hclge_dev *hdev, struct hclge_desc *desc, int num)
 	return hclge_cmd_send(&hdev->hw, &desc[0], num);
 }
 
-static int hclge_clear_mac_tnl_int(struct hclge_dev *hdev)
-{
-	struct hclge_desc desc;
-
-	hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CLEAR_MAC_TNL_INT, false);
-	desc.data[0] = cpu_to_le32(HCLGE_MAC_TNL_INT_CLR);
-
-	return hclge_cmd_send(&hdev->hw, &desc, 1);
-}
-
 struct hclge_desc *hclge_query_bd_num(struct hclge_dev *hdev,
 				      struct hclge_bd_num *bd_num,
 				      enum hclge_opcode_type opcode)
@@ -736,6 +726,16 @@ static int hclge_cmd_query_error(struct hclge_dev *hdev,
 	return ret;
 }
 
+static int hclge_clear_mac_tnl_int(struct hclge_dev *hdev)
+{
+	struct hclge_desc desc;
+
+	hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CLEAR_MAC_TNL_INT, false);
+	desc.data[0] = cpu_to_le32(HCLGE_MAC_TNL_INT_CLR);
+
+	return hclge_cmd_send(&hdev->hw, &desc, 1);
+}
+
 static int hclge_config_common_hw_err_int(struct hclge_dev *hdev, bool en)
 {
 	struct device *dev = &hdev->pdev->dev;

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h

@@ -47,9 +47,9 @@
 #define HCLGE_NCSI_ERR_INT_TYPE	0x9
 #define HCLGE_MAC_COMMON_ERR_INT_EN		0x107FF
 #define HCLGE_MAC_COMMON_ERR_INT_EN_MASK	0x107FF
-#define HCLGE_MAC_TNL_INT_EN			GENMASK(7, 0)
-#define HCLGE_MAC_TNL_INT_EN_MASK		GENMASK(7, 0)
-#define HCLGE_MAC_TNL_INT_CLR			GENMASK(7, 0)
+#define HCLGE_MAC_TNL_INT_EN			GENMASK(9, 0)
+#define HCLGE_MAC_TNL_INT_EN_MASK		GENMASK(9, 0)
+#define HCLGE_MAC_TNL_INT_CLR			GENMASK(9, 0)
 #define HCLGE_PPU_MPF_ABNORMAL_INT0_EN		GENMASK(31, 0)
 #define HCLGE_PPU_MPF_ABNORMAL_INT0_EN_MASK	GENMASK(31, 0)
 #define HCLGE_PPU_MPF_ABNORMAL_INT1_EN		GENMASK(31, 0)